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charset="utf-8" NXP imx8qm integrates 1 cdns3 IP. This is glue layer device bindings. Signed-off-by: Frank Li Reviewed-by: Krzysztof Kozlowski --- Change from v4 to v5 - Use shorter clock name according to rob's comments Change from v3 to v4 - Drop all clock-assign Change from v2 to v3 - Drop two fixed frequency clocks, it is system reset value, no need set no= w. If need, futher work/discuss on driver or dts change. It will not block this basic enablement work. - Drop lable - Drop some descriptions - Reg as second property. Change from v1 to v2. - new add binding doc .../bindings/usb/fsl,imx8qm-cdns3.yaml | 103 ++++++++++++++++++ 1 file changed, 103 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/fsl,imx8qm-cdns3.= yaml diff --git a/Documentation/devicetree/bindings/usb/fsl,imx8qm-cdns3.yaml b/= Documentation/devicetree/bindings/usb/fsl,imx8qm-cdns3.yaml new file mode 100644 index 000000000000..ceb76394af60 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/fsl,imx8qm-cdns3.yaml @@ -0,0 +1,103 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (c) 2020 NXP +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/fsl,imx8qm-cdns3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP iMX8QM Soc USB Controller + +maintainers: + - Frank Li + +properties: + compatible: + const: fsl,imx8qm-usb3 + + reg: + items: + - description: Register set for iMX USB3 Platform Control + + "#address-cells": + enum: [ 1, 2 ] + + "#size-cells": + enum: [ 1, 2 ] + + ranges: true + + clocks: + items: + - description: Standby clock. Used during ultra low power states. + - description: USB bus clock for usb3 controller. + - description: AXI clock for AXI interface. + - description: ipg clock for register access. + - description: Core clock for usb3 controller. + + clock-names: + items: + - const: lpm + - const: bus + - const: aclk + - const: ipg + - const: core + + power-domains: + maxItems: 1 + +# Required child node: + +patternProperties: + "^usb@[0-9a-f]+$": + $ref: cdns,usb3.yaml# + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - ranges + - clocks + - clock-names + - power-domains + +additionalProperties: false + +examples: + - | + #include + #include + #include + + usb@5b110000 { + compatible =3D "fsl,imx8qm-usb3"; + reg =3D <0x5b110000 0x10000>; + ranges; + clocks =3D <&usb3_lpcg IMX_LPCG_CLK_1>, + <&usb3_lpcg IMX_LPCG_CLK_0>, + <&usb3_lpcg IMX_LPCG_CLK_7>, + <&usb3_lpcg IMX_LPCG_CLK_4>, + <&usb3_lpcg IMX_LPCG_CLK_5>; + clock-names =3D "lpm", "bus", "aclk", "ipg", "core"; + assigned-clocks =3D <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_MST_BUS>; + assigned-clock-rates =3D <250000000>; + power-domains =3D <&pd IMX_SC_R_USB_2>; + #address-cells =3D <1>; + #size-cells =3D <1>; + + usb@5b120000 { + compatible =3D "cdns,usb3"; + reg =3D <0x5b120000 0x10000>, /* memory area for OTG/DRD registe= rs */ + <0x5b130000 0x10000>, /* memory area for HOST registers */ + <0x5b140000 0x10000>; /* memory area for DEVICE registers = */ + reg-names =3D "otg", "xhci", "dev"; + interrupt-parent =3D <&gic>; + interrupts =3D , + , + , + ; + interrupt-names =3D "host", "peripheral", "otg", "wakeup"; + phys =3D <&usb3_phy>; + phy-names =3D "cdns3,usb3-phy"; + }; + }; --=20 2.34.1