From nobody Thu Nov 14 18:12:08 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 72379C761AF for ; Mon, 27 Mar 2023 03:14:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231913AbjC0DOf (ORCPT ); Sun, 26 Mar 2023 23:14:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49002 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232215AbjC0DN6 (ORCPT ); Sun, 26 Mar 2023 23:13:58 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 08D9F5589; Sun, 26 Mar 2023 20:13:45 -0700 (PDT) X-UUID: 5def37f4cc4d11edb6b9f13eb10bd0fe-20230327 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=KpS7zOQiS8xm+MgSXF0zo7YlE8zlcISMKY7OkefTdQ8=; b=LiSVo88otfiZLIsH6j3xwIVh5vgqzIcqPlCxFeyKGcWZaCUtye1tKOQPOMUqqJU9NA80Y/RsXdOnPGdM2/2WzImix8EnzRUpY1wXl/05/l44Q/lyKxB1GqrwYPGIdekmnjkdAEjfs8AKjw1MekwNZJESQkn4XVMQRT5O7AiFd58=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.22,REQID:9f1b5251-3baf-4810-915d-4a004a9f1c44,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:95 X-CID-INFO: VERSION:1.1.22,REQID:9f1b5251-3baf-4810-915d-4a004a9f1c44,IP:0,URL :0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTION :quarantine,TS:95 X-CID-META: VersionHash:120426c,CLOUDID:b9f870b4-beed-4dfc-bd9c-e1b22fa6ccc4,B ulkID:230327111339EGEJ7AOR,BulkQuantity:0,Recheck:0,SF:38|29|28|17|19|48,T C:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 ,OSI:0,OSA:0,AV:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-UUID: 5def37f4cc4d11edb6b9f13eb10bd0fe-20230327 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 277477412; Mon, 27 Mar 2023 11:13:37 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.25; Mon, 27 Mar 2023 11:13:37 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.25 via Frontend Transport; Mon, 27 Mar 2023 11:13:37 +0800 From: Moudy Ho To: Mauro Carvalho Chehab , Matthias Brugger , Hans Verkuil , Ping-Hsun Wu CC: , , , , , Moudy Ho Subject: [PATCH v7 10/12] media: platform: mtk-mdp3: Split general definitions used in MDP3 Date: Mon, 27 Mar 2023 11:13:33 +0800 Message-ID: <20230327031335.9663-11-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230327031335.9663-1-moudy.ho@mediatek.com> References: <20230327031335.9663-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Separate the generic definitions used in MDP3 to avoid recursive includes when splitting chip-related definitions in further. Signed-off-by: Moudy Ho --- .../platform/mediatek/mdp3/mtk-img-ipi.h | 46 +--------------- .../platform/mediatek/mdp3/mtk-mdp3-type.h | 53 +++++++++++++++++++ 2 files changed, 54 insertions(+), 45 deletions(-) create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-type.h diff --git a/drivers/media/platform/mediatek/mdp3/mtk-img-ipi.h b/drivers/m= edia/platform/mediatek/mdp3/mtk-img-ipi.h index c7f231f8ea3e..f5296994137a 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-img-ipi.h +++ b/drivers/media/platform/mediatek/mdp3/mtk-img-ipi.h @@ -8,7 +8,7 @@ #ifndef __MTK_IMG_IPI_H__ #define __MTK_IMG_IPI_H__ =20 -#include +#include "mtk-mdp3-type.h" =20 /* * ISP-MDP generic input information @@ -16,12 +16,6 @@ * 6da52bdcf4bf76a0983b313e1d4745d6 */ =20 -#define IMG_MAX_HW_INPUTS 3 - -#define IMG_MAX_HW_OUTPUTS 4 - -#define IMG_MAX_PLANES 3 - #define IMG_IPI_INIT 1 #define IMG_IPI_DEINIT 2 #define IMG_IPI_FRAME 3 @@ -71,17 +65,6 @@ struct img_image_buffer { =20 #define IMG_SUBPIXEL_SHIFT 20 =20 -struct img_crop { - s32 left; - s32 top; - u32 width; - u32 height; - u32 left_subpix; - u32 top_subpix; - u32 width_subpix; - u32 height_subpix; -} __packed; - #define IMG_CTRL_FLAG_HFLIP BIT(0) #define IMG_CTRL_FLAG_DITHER BIT(1) #define IMG_CTRL_FLAG_SHARPNESS BIT(4) @@ -146,20 +129,6 @@ struct img_comp_frame { u32 out_total_width; } __packed; =20 -struct img_region { - s32 left; - s32 right; - s32 top; - s32 bottom; -} __packed; - -struct img_offset { - s32 left; - s32 top; - u32 left_subpix; - u32 top_subpix; -} __packed; - struct img_comp_subfrm { u32 tile_disable; struct img_region in; @@ -267,19 +236,6 @@ struct img_compparam { }; } __packed; =20 -#define IMG_MAX_COMPONENTS 20 - -struct img_mux { - u32 reg; - u32 value; - u32 subsys_id; -} __packed; - -struct img_mmsys_ctrl { - struct img_mux sets[IMG_MAX_COMPONENTS * 2]; - u32 num_sets; -} __packed; - struct img_config { struct img_compparam components[IMG_MAX_COMPONENTS]; u32 num_components; diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-type.h b/drivers= /media/platform/mediatek/mdp3/mtk-mdp3-type.h new file mode 100644 index 000000000000..ae0396806152 --- /dev/null +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-type.h @@ -0,0 +1,53 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2023 MediaTek Inc. + * Author: Ping-Hsun Wu + */ + +#ifndef __MTK_MDP3_TYPE_H__ +#define __MTK_MDP3_TYPE_H__ + +#include + +#define IMG_MAX_HW_INPUTS 3 +#define IMG_MAX_HW_OUTPUTS 4 +#define IMG_MAX_PLANES 3 +#define IMG_MAX_COMPONENTS 20 + +struct img_crop { + s32 left; + s32 top; + u32 width; + u32 height; + u32 left_subpix; + u32 top_subpix; + u32 width_subpix; + u32 height_subpix; +} __packed; + +struct img_region { + s32 left; + s32 right; + s32 top; + s32 bottom; +} __packed; + +struct img_offset { + s32 left; + s32 top; + u32 left_subpix; + u32 top_subpix; +} __packed; + +struct img_mux { + u32 reg; + u32 value; + u32 subsys_id; +} __packed; + +struct img_mmsys_ctrl { + struct img_mux sets[IMG_MAX_COMPONENTS * 2]; + u32 num_sets; +} __packed; + +#endif /* __MTK_MDP3_TYPE_H__ */ --=20 2.18.0