From nobody Thu May 2 11:58:29 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2714CC6FD1C for ; Sun, 26 Mar 2023 14:08:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231966AbjCZOIi (ORCPT ); Sun, 26 Mar 2023 10:08:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41200 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231771AbjCZOId (ORCPT ); Sun, 26 Mar 2023 10:08:33 -0400 Received: from mail-qv1-xf34.google.com (mail-qv1-xf34.google.com [IPv6:2607:f8b0:4864:20::f34]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3F99149F2; Sun, 26 Mar 2023 07:08:32 -0700 (PDT) Received: by mail-qv1-xf34.google.com with SMTP id 31so5165894qvc.1; Sun, 26 Mar 2023 07:08:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1679839711; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hlqMgsbtMdGDwnYgR2vesfxbv2C04RSOqe9u/KU4Ors=; b=KHOvRSfqQyWTy9ScGQJ8IWC0p7ihFilYWFRWGp1cuRjLBuNtSqMAa18k5ewbyq7Per F9Zk2ka0l6LdpkLmJi/Jpob3ws2xH4WfNayNory3VwV5s01MDbRtJD+d/ca8hTYcOUbk rYzAWbueY94VBEaN34s2DeUNNiWKowsy1r7nY0nG2FdjSAFre1PQjh9aTMXfw8NMxG6Y WGm/cKKdHhn0iG8Nsy8zyybIr/PS6FCBCq+fHQv87wIZFGhkjaqAjqoyqUUJcfFystzZ ADKkLHoTDOIc3nWfngO1AOjGoSQtIM/JOyjzymCi0bR4wnPBYnx+Y03BkBl4M1Ky0IE5 epbg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679839711; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hlqMgsbtMdGDwnYgR2vesfxbv2C04RSOqe9u/KU4Ors=; b=C7UwsxAHM2IDlgQMlLMXaw7tStheHWSenny3rVB6WCMXZXr3dqM/uHs9ItnfYr5Blg SMELBbPhkBXeMLanWVUF0dU/eTxvZjpsIBlIlRurk2asq0+n8fshZbpie8OIxD0J9hJH 5fojsM0CEkWBYWcQwvsTqRnchA/6AwhwRnPuORIMqVuZ8uo1xVWHaFnt2o7uOBrscu10 9XKD/KJu3sHMN8kX+qZUYU15nVEZQmpDxeD33MEWXhwoFGcasbU1w8zm0LHS6meiDqLs DYx0zcqGUmvr6hxQzRASkWRfiTh8Ss+/mT7AG5jcD6zQpqIH4jTLTDIY/cWlK0rrKH1m APxg== X-Gm-Message-State: AAQBX9dDB0pjR3pO/aXO83EJv42K1hIAerL4YCwPTlWqWlag1ifjsbDj qWEjVcAY1O/4NdTYCxZ0fWQ= X-Google-Smtp-Source: AKy350bQt+rT9tKjyp+jcmLOuyVtQ8y49KPu+aHAFnNI18NCKk4Cu4hKAl6gcnlq2J65UPddcNsBWw== X-Received: by 2002:a05:6214:258a:b0:56f:c138:2844 with SMTP id fq10-20020a056214258a00b0056fc1382844mr16074703qvb.37.1679839711363; Sun, 26 Mar 2023 07:08:31 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id j5-20020a0ce6a5000000b005dd8b93458esm2212220qvn.38.2023.03.26.07.08.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Mar 2023 07:08:31 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King , =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Russell King , Landen Chao , Ilya Lipnitskiy , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net 1/7] net: dsa: mt7530: fix comments regarding port 5 and 6 for both switches Date: Sun, 26 Mar 2023 17:08:12 +0300 Message-Id: <20230326140818.246575-2-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230326140818.246575-1-arinc.unal@arinc9.com> References: <20230326140818.246575-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL There's no logic to numerically order the CPU ports. State the port number and its being a CPU port instead. Remove the irrelevant PHY muxing information from mt7530_mac_port_get_caps(). Explain the supported MII modes instead. Remove the out of place PHY muxing information from mt753x_phylink_mac_config(). The function is for both the MT7530 and MT7531 switches but there's no phy muxing on MT7531. Fixes: ca366d6c889b ("net: dsa: mt7530: Convert to PHYLINK API") Fixes: 38f790a80560 ("net: dsa: mt7530: Add support for port 5") Fixes: 88bdef8be9f6 ("net: dsa: mt7530: Extend device data ready for adding= a new hardware") Fixes: c288575f7810 ("net: dsa: mt7530: Add the support of MT7531 switch") Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 02410ac439b7..62a4b899a961 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2454,7 +2454,7 @@ static void mt7530_mac_port_get_caps(struct dsa_switc= h *ds, int port, config->supported_interfaces); break; =20 - case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */ + case 5: /* Port 5, a CPU port, supports rgmii, mii, and gmii. */ phy_interface_set_rgmii(config->supported_interfaces); __set_bit(PHY_INTERFACE_MODE_MII, config->supported_interfaces); @@ -2462,7 +2462,7 @@ static void mt7530_mac_port_get_caps(struct dsa_switc= h *ds, int port, config->supported_interfaces); break; =20 - case 6: /* 1st cpu port */ + case 6: /* Port 6, a CPU port, supports rgmii and trgmii. */ __set_bit(PHY_INTERFACE_MODE_RGMII, config->supported_interfaces); __set_bit(PHY_INTERFACE_MODE_TRGMII, @@ -2487,14 +2487,14 @@ static void mt7531_mac_port_get_caps(struct dsa_swi= tch *ds, int port, config->supported_interfaces); break; =20 - case 5: /* 2nd cpu port supports either rgmii or sgmii/8023z */ + case 5: /* Port 5, a CPU port, supports rgmii and sgmii/802.3z. */ if (mt7531_is_rgmii_port(priv, port)) { phy_interface_set_rgmii(config->supported_interfaces); break; } fallthrough; =20 - case 6: /* 1st cpu port supports sgmii/8023z only */ + case 6: /* Port 6, a CPU port, supports sgmii/802.3z only. */ __set_bit(PHY_INTERFACE_MODE_SGMII, config->supported_interfaces); __set_bit(PHY_INTERFACE_MODE_1000BASEX, @@ -2772,7 +2772,7 @@ mt753x_phylink_mac_config(struct dsa_switch *ds, int = port, unsigned int mode, if (state->interface !=3D PHY_INTERFACE_MODE_GMII) goto unsupported; break; - case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */ + case 5: /* Port 5, a CPU port. */ if (priv->p5_interface =3D=3D state->interface) break; =20 @@ -2782,7 +2782,7 @@ mt753x_phylink_mac_config(struct dsa_switch *ds, int = port, unsigned int mode, if (priv->p5_intf_sel !=3D P5_DISABLED) priv->p5_interface =3D state->interface; break; - case 6: /* 1st cpu port */ + case 6: /* Port 6, a CPU port. */ if (priv->p6_interface =3D=3D state->interface) break; =20 --=20 2.37.2 From nobody Thu May 2 11:58:29 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 87C24C77B61 for ; Sun, 26 Mar 2023 14:08:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231771AbjCZOIu (ORCPT ); Sun, 26 Mar 2023 10:08:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41366 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231928AbjCZOIj (ORCPT ); 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Sun, 26 Mar 2023 07:08:35 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King , =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Russell King , Landen Chao , Ilya Lipnitskiy , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net 2/7] net: dsa: mt7530: fix phylink for port 5 and fix port 5 modes Date: Sun, 26 Mar 2023 17:08:13 +0300 Message-Id: <20230326140818.246575-3-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230326140818.246575-1-arinc.unal@arinc9.com> References: <20230326140818.246575-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL There're two call paths for setting up port 5: mt7530_setup() -> mt7530_setup_port5() mt753x_phylink_mac_config() -> mt753x_mac_config() -> mt7530_mac_config() -> mt7530_setup_port5() The first call path is supposed to run when phy muxing is being used. In this case, port 5 is somewhat of a hidden port. It won't be defined on the devicetree so phylink can't be used to manage the port. The second call path used to call mt7530_setup_port5() directly under case 5 on mt7530_phylink_mac_config() before it was moved to mt7530_mac_config() with 88bdef8be9f6 ("net: dsa: mt7530: Extend device data ready for adding a new hardware"). mt7530_setup_port5() will never run through this call path because the current code on mt7530_setup() bypasses phylink for all cases of port 5. Leave it to phylink if port 5 is used as a CPU port or a user port. For the cases of phy muxing or the port being disabled, call mt7530_setup_port5() directly from mt7530_setup_port5() without involving phylink. Move setting the interface and P5_DISABLED mode to a more specific location. They're supposed to be overwritten if phy muxing is detected. Add comments which explain the process. Fixes: 38f790a80560 ("net: dsa: mt7530: Add support for port 5") Tested-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 62a4b899a961..eba356249ada 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2247,16 +2247,18 @@ mt7530_setup(struct dsa_switch *ds) return ret; =20 /* Setup port 5 */ - priv->p5_intf_sel =3D P5_DISABLED; - interface =3D PHY_INTERFACE_MODE_NA; - if (!dsa_is_unused_port(ds, 5)) { + /* Set the interface selection of port 5 to GMAC5 when it's used + * as a CPU port or a user port. Let phylink handle the rest. + */ priv->p5_intf_sel =3D P5_INTF_SEL_GMAC5; - ret =3D of_get_phy_mode(dsa_to_port(ds, 5)->dn, &interface); - if (ret && ret !=3D -ENODEV) - return ret; } else { - /* Scan the ethernet nodes. look for GMAC1, lookup used phy */ + /* Scan the ethernet nodes. Look for GMAC1, lookup the used phy. + * Determine if phy muxing is defined and which phy to mux. + */ + priv->p5_intf_sel =3D P5_DISABLED; + interface =3D PHY_INTERFACE_MODE_NA; + for_each_child_of_node(dn, mac_np) { if (!of_device_is_compatible(mac_np, "mediatek,eth-mac")) @@ -2287,6 +2289,8 @@ mt7530_setup(struct dsa_switch *ds) of_node_put(phy_node); break; } + + mt7530_setup_port5(ds, interface); } =20 #ifdef CONFIG_GPIOLIB @@ -2297,8 +2301,6 @@ mt7530_setup(struct dsa_switch *ds) } #endif /* CONFIG_GPIOLIB */ =20 - mt7530_setup_port5(ds, interface); - /* Flush the FDB table */ ret =3D mt7530_fdb_cmd(priv, MT7530_FDB_FLUSH, NULL); if (ret < 0) --=20 2.37.2 From nobody Thu May 2 11:58:29 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 615AEC761AF for ; Sun, 26 Mar 2023 14:09:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232196AbjCZOJB (ORCPT ); Sun, 26 Mar 2023 10:09:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41364 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232134AbjCZOIs (ORCPT ); Sun, 26 Mar 2023 10:08:48 -0400 Received: from mail-qv1-xf2b.google.com (mail-qv1-xf2b.google.com [IPv6:2607:f8b0:4864:20::f2b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EFBD35FF9; Sun, 26 Mar 2023 07:08:41 -0700 (PDT) Received: by mail-qv1-xf2b.google.com with SMTP id g9so5080617qvt.8; Sun, 26 Mar 2023 07:08:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1679839721; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=OZg7tvfajeNq18GFXC3qap3a+zEsuUc1lJRtB/LOjbQ=; b=kue9NahdmEFNFyi9Z9Kz+d6ev+kVXTNIPGO4kEw4t5gZOePO6QCbTzsp4J2nifJLua IvVE35jxat4ieYUrXcrzHb4x5W8p21TysgFzvp0p3/vYkBbV5xwuumCEx5OpRm2qmQtR +3IWUiRLB2cZp6IJJU6nDHArLhTbp/oIdO32Y0dDpSr8oFTBKDLmLF3dKLFNAnblnK5E 4Wr86j1QaZ147zL0eak8zzxON0GVY/gePSBwTsdoQFwVkQfYDidKNTZOixQfy+FyO8aW AJ8VdyTPDzdGSbVFJZL7iWEcjrMXBhsbSF0B9Uw9ZkNCWVH6GG9dy31Dl3335S/Y7vM8 NuzQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679839721; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OZg7tvfajeNq18GFXC3qap3a+zEsuUc1lJRtB/LOjbQ=; b=qZq30z6DP7mQmpRhIKfIIsfWOJ+WrJGCqX8zgjSFrYjTuNMi9YjqaCecK2HsxYYYHL 3g1Rq+NBuvflzMG/qLReTe9C7WOAm6Gv3C4EQTHuxbTF6l2YE+22tBDyXqN8R5J6JdO7 eurl3ev7+Ll5XnTPrIzV+oP45YyHCnObR2+VVs2lG2AHJ9je9Z3IX78QY2sV277eXdW/ XAFazjMmg9GOkEuv9caxzPOMCEXh4vfo/oiOfvION8Z3q13txlq8QGHkkxyqTX1yy77Q MP5N9W/K6jsdQjOAAashkqov+F47pYKZe4CDjmliLMTvN34JpjYxlzZXDcHQxuHAtgCG iqDw== X-Gm-Message-State: AAQBX9dYfK0CPCJgdtUplAqLFFuVlN3hsz9WoDx5h6/+r/EggiPCemBH XR35/JneLinnt7C9LsXqhD8= X-Google-Smtp-Source: AKy350bUQGpng0t7Er8DLfWm+MeX5EgNvC3Zf1IA9OKQCjTVHq37FERAld7067znB0Xsj5mlftsQqw== X-Received: by 2002:a05:6214:e66:b0:583:8e58:6c0f with SMTP id jz6-20020a0562140e6600b005838e586c0fmr13020778qvb.40.1679839721008; Sun, 26 Mar 2023 07:08:41 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id j5-20020a0ce6a5000000b005dd8b93458esm2212220qvn.38.2023.03.26.07.08.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Mar 2023 07:08:40 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King , =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Russell King , Landen Chao , Ilya Lipnitskiy , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net 3/7] net: dsa: mt7530: do not run mt7530_setup_port5() if port 5 is disabled Date: Sun, 26 Mar 2023 17:08:14 +0300 Message-Id: <20230326140818.246575-4-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230326140818.246575-1-arinc.unal@arinc9.com> References: <20230326140818.246575-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL There's no need to run all the code on mt7530_setup_port5() if port 5 is disabled. Run mt7530_setup_port5() if priv->p5_intf_sel is not P5_DISABLED and remove the P5_DISABLED case from mt7530_setup_port5(). Stop initialising the interface variable as the remaining cases will always call mt7530_setup_port5() with it initialised. Fixes: 38f790a80560 ("net: dsa: mt7530: Add support for port 5") Tested-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index eba356249ada..6d33c1050458 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -949,9 +949,6 @@ static void mt7530_setup_port5(struct dsa_switch *ds, p= hy_interface_t interface) /* MT7530_P5_MODE_GMAC: P5 -> External phy or 2nd GMAC */ val &=3D ~MHWTRAP_P5_DIS; break; - case P5_DISABLED: - interface =3D PHY_INTERFACE_MODE_NA; - break; default: dev_err(ds->dev, "Unsupported p5_intf_sel %d\n", priv->p5_intf_sel); @@ -2257,7 +2254,6 @@ mt7530_setup(struct dsa_switch *ds) * Determine if phy muxing is defined and which phy to mux. */ priv->p5_intf_sel =3D P5_DISABLED; - interface =3D PHY_INTERFACE_MODE_NA; =20 for_each_child_of_node(dn, mac_np) { if (!of_device_is_compatible(mac_np, @@ -2290,7 +2286,8 @@ mt7530_setup(struct dsa_switch *ds) break; } =20 - mt7530_setup_port5(ds, interface); + if (priv->p5_intf_sel !=3D P5_DISABLED) + mt7530_setup_port5(ds, interface); } =20 #ifdef CONFIG_GPIOLIB --=20 2.37.2 From nobody Thu May 2 11:58:29 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23C9AC761AF for ; Sun, 26 Mar 2023 14:09:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232240AbjCZOJU (ORCPT ); Sun, 26 Mar 2023 10:09:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41522 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231877AbjCZOJC (ORCPT ); Sun, 26 Mar 2023 10:09:02 -0400 Received: from mail-qv1-xf29.google.com (mail-qv1-xf29.google.com [IPv6:2607:f8b0:4864:20::f29]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F14015FDC; Sun, 26 Mar 2023 07:08:46 -0700 (PDT) Received: by mail-qv1-xf29.google.com with SMTP id 59so5038502qva.11; Sun, 26 Mar 2023 07:08:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1679839726; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gZ3M3RaLFnNGnHTnAZjnH0dZMMcYJsuKybc/E0bZ/Sg=; b=PeCR9X86QsaVx20aY4cZ/N/U/BGXc9v0DseOfWum4DxYo6HDHO24fXFQLN385sn7Ak ZnG+jG5QCzkpJ5OEPA4GGNujEszVt6QCOLJqDleCWpkO2MvcSaSYN9J7THCkRyhj7dy9 P7Su8HM8g/fddSiIMePJNUY8gHW02b2wpKHcIcEb+FKDaXzhdb0AdbacaM/cIeruVxsm CZu38ZsgmVurt3yKyYDFLeRrUh8iHltb17BOTd27+2wzzJfAgtws7/vAybMOAgcnFh4Z bVXqgEIdaM2bEl5swVmeZPpepIvamUtvQXclBqIfn2V7fJmLVvHsibGC3GOAiXlzSqE0 aAeg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679839726; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gZ3M3RaLFnNGnHTnAZjnH0dZMMcYJsuKybc/E0bZ/Sg=; b=amkYmb+5iK4h+YWyR4xT+LbJjn88rvnNqhyQZiKwO7yB/QebncrSltp8MvHoHF9FJC +vGzyVuvWqTlEji/To8pTFz/cZUwxjXarATR3K0LlJAkqROL1mH4xoX/buSn3kQtbgZj q1GrDy6pAYveQJz6A8nat/CeNNeKKYnZFi+PnT9CCDCqYf31IacvmZa3I2YMK0ATiVrM yZtgxF1LPsyIhkCV/YAZQGLsVKVhr7LWZ4Gsv6NKau30C6KfL1lstKtibe6xYhv2d20i Ga1aklAHnZY/4DVFvIciKCSERD7mJuNDEwjAoRlUd6lsgRmIPksarLPrHAB53jhXD7DU GIEQ== X-Gm-Message-State: AAQBX9e8zKb3cmwkKTHVIfVw3oznmMv46vpj1VcDfwe/fhGrjfMdbWx4 POqe2KJ8qkd5S54Bb4qTOjs= X-Google-Smtp-Source: AKy350bmLDXXIZMwWIHi9YWMFSuPyoUC5Stl7CpvUKVBBwX6hYz/oXixnBj/Ni0i+8VU4sVOQf3erQ== X-Received: by 2002:a05:6214:f67:b0:5aa:d98a:8ace with SMTP id iy7-20020a0562140f6700b005aad98a8acemr17506531qvb.19.1679839725854; Sun, 26 Mar 2023 07:08:45 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id j5-20020a0ce6a5000000b005dd8b93458esm2212220qvn.38.2023.03.26.07.08.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Mar 2023 07:08:45 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King , =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Russell King , Landen Chao , Ilya Lipnitskiy , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net 4/7] net: dsa: mt7530: set both CPU port interfaces to PHY_INTERFACE_MODE_NA Date: Sun, 26 Mar 2023 17:08:15 +0300 Message-Id: <20230326140818.246575-5-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230326140818.246575-1-arinc.unal@arinc9.com> References: <20230326140818.246575-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL Set interfaces of both CPU ports to PHY_INTERFACE_MODE_NA. Either phylink or mt7530_setup_port5() on mt7530_setup() will handle the rest. This is already being done for port 6, do it for port 5 as well. Fixes: 38f790a80560 ("net: dsa: mt7530: Add support for port 5") Tested-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 6d33c1050458..3deebdcfeedf 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2203,14 +2203,18 @@ mt7530_setup(struct dsa_switch *ds) mt7530_rmw(priv, MT7530_TRGMII_RD(i), RD_TAP_MASK, RD_TAP(16)); =20 + /* Let phylink decide the interface later. If port 5 is used for phy + * muxing, its interface will be handled without involving phylink. + */ + priv->p5_interface =3D PHY_INTERFACE_MODE_NA; + priv->p6_interface =3D PHY_INTERFACE_MODE_NA; + /* Enable port 6 */ val =3D mt7530_read(priv, MT7530_MHWTRAP); val &=3D ~MHWTRAP_P6_DIS & ~MHWTRAP_PHY_ACCESS; val |=3D MHWTRAP_MANUAL; mt7530_write(priv, MT7530_MHWTRAP, val); =20 - priv->p6_interface =3D PHY_INTERFACE_MODE_NA; - /* Enable and reset MIB counters */ mt7530_mib_reset(ds); =20 --=20 2.37.2 From nobody Thu May 2 11:58:29 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B833C761AF for ; Sun, 26 Mar 2023 14:09:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232223AbjCZOJb (ORCPT ); Sun, 26 Mar 2023 10:09:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43010 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232224AbjCZOJM (ORCPT ); Sun, 26 Mar 2023 10:09:12 -0400 Received: from mail-qv1-xf35.google.com (mail-qv1-xf35.google.com [IPv6:2607:f8b0:4864:20::f35]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 937164C37; Sun, 26 Mar 2023 07:08:51 -0700 (PDT) Received: by mail-qv1-xf35.google.com with SMTP id 31so5166336qvc.1; Sun, 26 Mar 2023 07:08:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1679839730; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FE6q6p+dFTrGAKyKj7RnvQhsdIZfEftFuQ5+sKNAZxc=; b=D76MU+xeNJzZVMvqN9aEJ1ImGKcrDzJVZlZFme9Q3QdJoQ9B/u7bQc2xY9xU4pKoT1 tb7z1KGlHTGabEi5HyvKL8Br8kcZSf+lUmoyZg6wST2TKSwEC4kmk+/L5CtVekjC1imm IUtcob0hiVfbBhjPkFtS9NHg0mlLRyfeyJ6tWab6Qw9U0nDQZSsLQMtu3ABd3+Rc1iZ0 x0p9R9twv0stKHFHlOuGHkolzkdxQFW+G8azSKEMkD9srJqFvgj6Xzna9Z1zVzPNyoZX W5gb5hvef0MtcoE9/8m8O3/ZWF1CixamuO1WSS3fFlmnTzC9N9kzCatkBY66YwFUy+Hu O3Ig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679839730; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FE6q6p+dFTrGAKyKj7RnvQhsdIZfEftFuQ5+sKNAZxc=; b=kGXrbBND1YR9GUVdFf8oWwd7J9WYxWCVzVAGyLR5G39OK3Mh6ZZHFYYH1/eDx4NX9r qAytsuzsjyduW3GwB+9CG0Lkj3Tydt5ftxzewNeMeP4gb2p2i+ZYxsA0JmwdIj/Agy26 qau6kjjHm/ZyMk82n+++e06xWGuYC4oOjIWzXTxGuknLrWUluqw7uO2Ozodi0J4H9SJj yTpXsptuhVXey0cTXgFbuA2rLRuaz8Gb32y2PzddddYQE8i6FJdNaIt+wJs/0psqCIhl /qxP8KLtpjLRfvPtMklVYhxL1MFrEjodNkviq5QzlF2NoAEtwD5JBRRWjzTPf4ZpZlwf pekw== X-Gm-Message-State: AAQBX9fcp9IoE+ILj7e47LngWvbg+4gkwg2iXYLMSCppC9LqalmhHHOb CgMQ9wHkO6p5N1buJAAhq4o= X-Google-Smtp-Source: AKy350ZXYJBESOoxkQUOuwbRFbnXJKrJen8y5qornJklJSyCE/pS7djMghLwkglOYXW7p2HrKG/5HQ== X-Received: by 2002:a05:6214:29e4:b0:5a9:ed32:1765 with SMTP id jv4-20020a05621429e400b005a9ed321765mr14734612qvb.23.1679839730704; Sun, 26 Mar 2023 07:08:50 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id j5-20020a0ce6a5000000b005dd8b93458esm2212220qvn.38.2023.03.26.07.08.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Mar 2023 07:08:50 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King , =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Russell King , Landen Chao , Ilya Lipnitskiy , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net 5/7] net: dsa: mt7530: set up port 5 before CPU ports are enabled Date: Sun, 26 Mar 2023 17:08:16 +0300 Message-Id: <20230326140818.246575-6-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230326140818.246575-1-arinc.unal@arinc9.com> References: <20230326140818.246575-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL Set priv->p5_intf_sel before the CPU ports are enabled. This makes sure the 'if (priv->p5_intf_sel !=3D P5_DISABLED)' check on mt753x_phylink_mac_config() runs with priv->p5_intf_sel initialised. Set up port 5 for phy muxing right after priv->p5_interface is set to PHY_INTERFACE_MODE_NA. Fixes: 38f790a80560 ("net: dsa: mt7530: Add support for port 5") Tested-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530.c | 76 ++++++++++++++++++++-------------------- 1 file changed, 38 insertions(+), 38 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 3deebdcfeedf..2397d63cec29 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2209,44 +2209,6 @@ mt7530_setup(struct dsa_switch *ds) priv->p5_interface =3D PHY_INTERFACE_MODE_NA; priv->p6_interface =3D PHY_INTERFACE_MODE_NA; =20 - /* Enable port 6 */ - val =3D mt7530_read(priv, MT7530_MHWTRAP); - val &=3D ~MHWTRAP_P6_DIS & ~MHWTRAP_PHY_ACCESS; - val |=3D MHWTRAP_MANUAL; - mt7530_write(priv, MT7530_MHWTRAP, val); - - /* Enable and reset MIB counters */ - mt7530_mib_reset(ds); - - for (i =3D 0; i < MT7530_NUM_PORTS; i++) { - /* Disable forwarding by default on all ports */ - mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK, - PCR_MATRIX_CLR); - - /* Disable learning by default on all ports */ - mt7530_set(priv, MT7530_PSC_P(i), SA_DIS); - - if (dsa_is_cpu_port(ds, i)) { - ret =3D mt753x_cpu_port_enable(ds, i); - if (ret) - return ret; - } else { - mt7530_port_disable(ds, i); - - /* Set default PVID to 0 on all user ports */ - mt7530_rmw(priv, MT7530_PPBV1_P(i), G0_PORT_VID_MASK, - G0_PORT_VID_DEF); - } - /* Enable consistent egress tag */ - mt7530_rmw(priv, MT7530_PVC_P(i), PVC_EG_TAG_MASK, - PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT)); - } - - /* Setup VLAN ID 0 for VLAN-unaware bridges */ - ret =3D mt7530_setup_vlan0(priv); - if (ret) - return ret; - /* Setup port 5 */ if (!dsa_is_unused_port(ds, 5)) { /* Set the interface selection of port 5 to GMAC5 when it's used @@ -2294,6 +2256,44 @@ mt7530_setup(struct dsa_switch *ds) mt7530_setup_port5(ds, interface); } =20 + /* Enable port 6 */ + val =3D mt7530_read(priv, MT7530_MHWTRAP); + val &=3D ~MHWTRAP_P6_DIS & ~MHWTRAP_PHY_ACCESS; + val |=3D MHWTRAP_MANUAL; + mt7530_write(priv, MT7530_MHWTRAP, val); + + /* Enable and reset MIB counters */ + mt7530_mib_reset(ds); + + for (i =3D 0; i < MT7530_NUM_PORTS; i++) { + /* Disable forwarding by default on all ports */ + mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK, + PCR_MATRIX_CLR); + + /* Disable learning by default on all ports */ + mt7530_set(priv, MT7530_PSC_P(i), SA_DIS); + + if (dsa_is_cpu_port(ds, i)) { + ret =3D mt753x_cpu_port_enable(ds, i); + if (ret) + return ret; + } else { + mt7530_port_disable(ds, i); + + /* Set default PVID to 0 on all user ports */ + mt7530_rmw(priv, MT7530_PPBV1_P(i), G0_PORT_VID_MASK, + G0_PORT_VID_DEF); + } + /* Enable consistent egress tag */ + mt7530_rmw(priv, MT7530_PVC_P(i), PVC_EG_TAG_MASK, + PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT)); + } + + /* Setup VLAN ID 0 for VLAN-unaware bridges */ + ret =3D mt7530_setup_vlan0(priv); + if (ret) + return ret; + #ifdef CONFIG_GPIOLIB if (of_property_read_bool(priv->dev->of_node, "gpio-controller")) { ret =3D mt7530_setup_gpio(priv); --=20 2.37.2 From nobody Thu May 2 11:58:29 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DF901C74A5B for ; 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Sun, 26 Mar 2023 07:08:55 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King , =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Russell King , Landen Chao , Ilya Lipnitskiy , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net 6/7] net: dsa: mt7530: call port 6 setup from mt7530_mac_config() Date: Sun, 26 Mar 2023 17:08:17 +0300 Message-Id: <20230326140818.246575-7-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230326140818.246575-1-arinc.unal@arinc9.com> References: <20230326140818.246575-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL mt7530_pad_clk_setup() is called if port 6 is enabled. It used to do more things than setting up port 6. That part was moved to more appropriate locations, mt7530_setup() and mt7530_pll_setup(). Now that all it does is set up port 6, rename it to mt7530_setup_port6(), and move it to a more appropriate location, under mt7530_mac_config(). Leave an empty mt7530_pad_clk_setup() to satisfy the pad_setup function pointer. This is the call path for setting up the ports before: mt753x_phylink_mac_config() -> mt753x_mac_config() -> mt7530_mac_config() -> mt7530_setup_port5() -> mt753x_pad_setup() -> mt7530_pad_clk_setup() This is after: mt753x_phylink_mac_config() -> mt753x_mac_config() -> mt7530_mac_config() -> mt7530_setup_port5() -> mt7530_setup_port6() Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 sw= itch") Tested-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530.c | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 2397d63cec29..8d49803f7522 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -421,7 +421,7 @@ static void mt7530_pll_setup(struct mt7530_priv *priv) =20 /* Setup port 6 interface mode and TRGMII TX circuit */ static int -mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) +mt7530_setup_port6(struct dsa_switch *ds, phy_interface_t interface) { struct mt7530_priv *priv =3D ds->priv; u32 ncpo1, ssc_delta, trgint, xtal; @@ -493,6 +493,12 @@ mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interf= ace_t interface) return 0; } =20 +static int +mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) +{ + return 0; +} + static bool mt7531_dual_sgmii_supported(struct mt7530_priv *priv) { u32 val; @@ -2523,12 +2529,15 @@ mt7530_mac_config(struct dsa_switch *ds, int port, = unsigned int mode, phy_interface_t interface) { struct mt7530_priv *priv =3D ds->priv; + int ret; =20 - /* Only need to setup port5. */ - if (port !=3D 5) - return 0; - - mt7530_setup_port5(priv->ds, interface); + if (port =3D=3D 5) { + mt7530_setup_port5(priv->ds, interface); + } else if (port =3D=3D 6) { + ret =3D mt7530_setup_port6(priv->ds, interface); + if (ret) + return ret; + } =20 return 0; } --=20 2.37.2 From nobody Thu May 2 11:58:29 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 355A5C761AF for ; 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Sun, 26 Mar 2023 07:09:00 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Landen Chao , DENG Qingfang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King , =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Russell King , Landen Chao , Ilya Lipnitskiy , Richard van Schagen , Richard van Schagen , Frank Wunderlich , erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net 7/7] net: dsa: mt7530: remove pad_setup function pointer Date: Sun, 26 Mar 2023 17:08:18 +0300 Message-Id: <20230326140818.246575-8-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230326140818.246575-1-arinc.unal@arinc9.com> References: <20230326140818.246575-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL The pad_setup function pointer was introduced with 88bdef8be9f6 ("net: dsa: mt7530: Extend device data ready for adding a new hardware"). It was being used to set up the core clock and port 6 of the MT7530 switch, and pll of the MT7531 switch. All of these were moved to more appropriate locations so this function pointer hasn't got a use anymore. Remove it. Fixes: 88bdef8be9f6 ("net: dsa: mt7530: Extend device data ready for adding= a new hardware") Tested-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL --- drivers/net/dsa/mt7530.c | 30 ++---------------------------- drivers/net/dsa/mt7530.h | 3 --- 2 files changed, 2 insertions(+), 31 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 8d49803f7522..83dcd888f82b 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -493,12 +493,6 @@ mt7530_setup_port6(struct dsa_switch *ds, phy_interfac= e_t interface) return 0; } =20 -static int -mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) -{ - return 0; -} - static bool mt7531_dual_sgmii_supported(struct mt7530_priv *priv) { u32 val; @@ -508,12 +502,6 @@ static bool mt7531_dual_sgmii_supported(struct mt7530_= priv *priv) return (val & PAD_DUAL_SGMII_EN) !=3D 0; } =20 -static int -mt7531_pad_setup(struct dsa_switch *ds, phy_interface_t interface) -{ - return 0; -} - static void mt7531_pll_setup(struct mt7530_priv *priv) { @@ -2516,14 +2504,6 @@ static void mt7531_mac_port_get_caps(struct dsa_swit= ch *ds, int port, } } =20 -static int -mt753x_pad_setup(struct dsa_switch *ds, const struct phylink_link_state *s= tate) -{ - struct mt7530_priv *priv =3D ds->priv; - - return priv->info->pad_setup(ds, state->interface); -} - static int mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode, phy_interface_t interface) @@ -2798,8 +2778,6 @@ mt753x_phylink_mac_config(struct dsa_switch *ds, int = port, unsigned int mode, if (priv->p6_interface =3D=3D state->interface) break; =20 - mt753x_pad_setup(ds, state); - if (mt753x_mac_config(ds, port, mode, state) < 0) goto unsupported; =20 @@ -3215,7 +3193,6 @@ static const struct mt753x_info mt753x_table[] =3D { .phy_write_c22 =3D mt7530_phy_write_c22, .phy_read_c45 =3D mt7530_phy_read_c45, .phy_write_c45 =3D mt7530_phy_write_c45, - .pad_setup =3D mt7530_pad_clk_setup, .mac_port_get_caps =3D mt7530_mac_port_get_caps, .mac_port_config =3D mt7530_mac_config, }, @@ -3227,7 +3204,6 @@ static const struct mt753x_info mt753x_table[] =3D { .phy_write_c22 =3D mt7530_phy_write_c22, .phy_read_c45 =3D mt7530_phy_read_c45, .phy_write_c45 =3D mt7530_phy_write_c45, - .pad_setup =3D mt7530_pad_clk_setup, .mac_port_get_caps =3D mt7530_mac_port_get_caps, .mac_port_config =3D mt7530_mac_config, }, @@ -3239,7 +3215,6 @@ static const struct mt753x_info mt753x_table[] =3D { .phy_write_c22 =3D mt7531_ind_c22_phy_write, .phy_read_c45 =3D mt7531_ind_c45_phy_read, .phy_write_c45 =3D mt7531_ind_c45_phy_write, - .pad_setup =3D mt7531_pad_setup, .cpu_port_config =3D mt7531_cpu_port_config, .mac_port_get_caps =3D mt7531_mac_port_get_caps, .mac_port_config =3D mt7531_mac_config, @@ -3297,9 +3272,8 @@ mt7530_probe(struct mdio_device *mdiodev) /* Sanity check if these required device operations are filled * properly. */ - if (!priv->info->sw_setup || !priv->info->pad_setup || - !priv->info->phy_read_c22 || !priv->info->phy_write_c22 || - !priv->info->mac_port_get_caps || + if (!priv->info->sw_setup || !priv->info->phy_read_c22 || + !priv->info->phy_write_c22 || !priv->info->mac_port_get_caps || !priv->info->mac_port_config) return -EINVAL; =20 diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h index 6b2fc6290ea8..fd050d3110c6 100644 --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h @@ -754,8 +754,6 @@ struct mt753x_pcs { * @phy_write_c22: Holding the way writing PHY port using C22 * @phy_read_c45: Holding the way reading PHY port using C45 * @phy_write_c45: Holding the way writing PHY port using C45 - * @pad_setup: Holding the way setting up the bus pad for a certain - * MAC port * @phy_mode_supported: Check if the PHY type is being supported on a cert= ain * port * @mac_port_validate: Holding the way to set addition validate type for a @@ -776,7 +774,6 @@ struct mt753x_info { int regnum); int (*phy_write_c45)(struct mt7530_priv *priv, int port, int devad, int regnum, u16 val); - int (*pad_setup)(struct dsa_switch *ds, phy_interface_t interface); int (*cpu_port_config)(struct dsa_switch *ds, int port); void (*mac_port_get_caps)(struct dsa_switch *ds, int port, struct phylink_config *config); --=20 2.37.2