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Fri, 24 Mar 2023 05:00:01 -0700 From: Akhil R To: , , , , , , , , , CC: Subject: [PATCH v4 1/2] i2c: tegra: Fix PEC support for SMBUS block read Date: Fri, 24 Mar 2023 17:29:23 +0530 Message-ID: <20230324115924.64218-2-akhilrajeev@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230324115924.64218-1-akhilrajeev@nvidia.com> References: <20230324115924.64218-1-akhilrajeev@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT071:EE_|SN7PR12MB7955:EE_ X-MS-Office365-Filtering-Correlation-Id: 29285520-2bb9-4bdc-605d-08db2c5f5242 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: EP9p3RsbDWeHO+TyD/o12D8UG20wUSC6zPskssxlsVQ4vcsiGyoblLsQjO5805TgbcLl+HzfduP8Sn4HiCG7Q4k6OaNhdthZ6W/X2IDjiXuj0KheZMYaMcvFzrB0A3xIrnccztHEURB9ixXXYgRFZqYBZFKe7IsWQs8PlSv49Gx1L/9UF7zJTt5lJeypghxi7cVkS1JKrzbYSLtITKZqka9OulxSabaNoes3GRo12fINpiSx+xsUSl85BJDQ65/HlyM8eT+Do/eALDJ2qXtKxrmMiMD4U/gmz3LSjgXEp7zcvjMqAsdN7zWZoOaziMS6eyL+MZ1AzeFdWFKp1YQ3NXur343+AHQ7YMfH/zKv8lUGawDLC9/Usuo9tFlDwftmeURvHyqUlOAAkl5JIeL8TbkcqAhIa3xPEzvhHwsE4SgGMO0Qy3bJgMqNbJvgqQ3YFFHdMYrog5wTPJcR0ec8Wfqx7HDQseRP/9vR+Q+E8F4lwqBbC/8IqKMyA9yp+TqOJqKMapsMJKyNkvu93DDfgz8z0ufBFbLsD1t5uVtqIcxmjDmcruVD91Am3OK4CxQmndBAW0jYq5eMwNyw1F+cyMjSi3Sj9HwHqCs/9Bsdig0OgJBTCgT/YtMC1o1JiR+eCz54VYxMatNDRmgiLSSWS26RJeEMUZVZmtw4cBX8qgxrZgYwkSVZdcwK20oj5InnI0xiv1oWDRoRNcx2OS6PIwAIEmY0R6YU2rqUtWx45AelTRVfDzTeARjVOSClpmXl6fnv48wEi7RS021ZUB9ObN5J7KMj59T7Ab9/4QE6mUQ+44hLu/nxhJl4iEHeY6rl X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230025)(4636009)(39860400002)(346002)(136003)(396003)(376002)(451199018)(40470700004)(36840700001)(46966006)(110136005)(316002)(70586007)(5660300002)(70206006)(8936002)(478600001)(7696005)(4326008)(8676002)(41300700001)(2906002)(6666004)(107886003)(1076003)(186003)(26005)(2616005)(40460700003)(82740400003)(7636003)(336012)(426003)(47076005)(83380400001)(36756003)(36860700001)(40480700001)(921005)(356005)(82310400005)(86362001)(83996005)(2101003);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Mar 2023 12:00:11.5560 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 29285520-2bb9-4bdc-605d-08db2c5f5242 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT071.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7955 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Update the msg->len value correctly for SMBUS block read. The discrepancy went unnoticed as msg->len is used in SMBUS transfers only when a PEC byte is added. Fixes: d7583c8a5748 ("i2c: tegra: Add SMBus block read function") Signed-off-by: Akhil R Acked-by: Thierry Reding --- drivers/i2c/busses/i2c-tegra.c | 38 +++++++++++++++++++++++----------- 1 file changed, 26 insertions(+), 12 deletions(-) diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index 6aab84c8d22b..83e74b8baf67 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -245,6 +245,7 @@ struct tegra_i2c_hw_feature { * @msg_err: error code for completed message * @msg_buf: pointer to current message data * @msg_buf_remaining: size of unsent data in the message buffer + * @msg_len: length of message in current transfer * @msg_read: indicates that the transfer is a read access * @timings: i2c timings information like bus frequency * @multimaster_mode: indicates that I2C controller is in multi-master mode @@ -279,6 +280,7 @@ struct tegra_i2c_dev { size_t msg_buf_remaining; int msg_err; u8 *msg_buf; + __u16 msg_len; =20 struct completion dma_complete; struct dma_chan *tx_dma_chan; @@ -1169,7 +1171,7 @@ static void tegra_i2c_push_packet_header(struct tegra= _i2c_dev *i2c_dev, else i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO); =20 - packet_header =3D msg->len - 1; + packet_header =3D i2c_dev->msg_len - 1; =20 if (i2c_dev->dma_mode && !i2c_dev->msg_read) *dma_buf++ =3D packet_header; @@ -1242,20 +1244,32 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev = *i2c_dev, return err; =20 i2c_dev->msg_buf =3D msg->buf; + i2c_dev->msg_len =3D msg->len; =20 - /* The condition true implies smbus block read and len is already read */ - if (msg->flags & I2C_M_RECV_LEN && end_state !=3D MSG_END_CONTINUE) - i2c_dev->msg_buf =3D msg->buf + 1; - - i2c_dev->msg_buf_remaining =3D msg->len; i2c_dev->msg_err =3D I2C_ERR_NONE; i2c_dev->msg_read =3D !!(msg->flags & I2C_M_RD); reinit_completion(&i2c_dev->msg_complete); =20 + /* * + * For SMBUS block read command, read only 1 byte in the first transfer. + * Adjust that 1 byte for the next transfer in the msg buffer and msg + * length. + */ + if (msg->flags & I2C_M_RECV_LEN) { + if (end_state =3D=3D MSG_END_CONTINUE) { + i2c_dev->msg_len =3D 1; + } else { + i2c_dev->msg_buf +=3D 1; + i2c_dev->msg_len -=3D 1; + } + } + + i2c_dev->msg_buf_remaining =3D i2c_dev->msg_len; + if (i2c_dev->msg_read) - xfer_size =3D msg->len; + xfer_size =3D i2c_dev->msg_len; else - xfer_size =3D msg->len + I2C_PACKET_HEADER_SIZE; + xfer_size =3D i2c_dev->msg_len + I2C_PACKET_HEADER_SIZE; =20 xfer_size =3D ALIGN(xfer_size, BYTES_PER_FIFO_WORD); =20 @@ -1295,7 +1309,7 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i= 2c_dev, if (!i2c_dev->msg_read) { if (i2c_dev->dma_mode) { memcpy(i2c_dev->dma_buf + I2C_PACKET_HEADER_SIZE, - msg->buf, msg->len); + msg->buf, i2c_dev->msg_len); =20 dma_sync_single_for_device(i2c_dev->dma_dev, i2c_dev->dma_phys, @@ -1352,7 +1366,7 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i= 2c_dev, i2c_dev->dma_phys, xfer_size, DMA_FROM_DEVICE); =20 - memcpy(i2c_dev->msg_buf, i2c_dev->dma_buf, msg->len); + memcpy(i2c_dev->msg_buf, i2c_dev->dma_buf, i2c_dev->msg_len); } } =20 @@ -1408,8 +1422,8 @@ static int tegra_i2c_xfer(struct i2c_adapter *adap, s= truct i2c_msg msgs[], ret =3D tegra_i2c_xfer_msg(i2c_dev, &msgs[i], MSG_END_CONTINUE); if (ret) break; - /* Set the read byte as msg len */ - msgs[i].len =3D msgs[i].buf[0]; + /* Set the msg length from first byte */ + msgs[i].len +=3D msgs[i].buf[0]; dev_dbg(i2c_dev->dev, "reading %d bytes\n", msgs[i].len); } ret =3D tegra_i2c_xfer_msg(i2c_dev, &msgs[i], end_type); --=20 2.17.1