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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id e13-20020a9d63cd000000b0069f9a73a65fsm847319otl.29.2023.03.22.10.35.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Mar 2023 10:35:54 -0700 (PDT) Received: (nullmailer pid 3972257 invoked by uid 1000); Wed, 22 Mar 2023 17:35:53 -0000 From: Rob Herring To: Linus Walleij , Michael Turquette , Stephen Boyd , Krzysztof Kozlowski , Geert Uytterhoeven , Sylwester Nawrocki , Tomasz Figa , Chanwoo Choi , Alim Akhtar , Orson Zhai , Baolin Wang , Chunyan Zhang , Matthias Brugger , AngeloGioacchino Del Regno Cc: linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH] dt-bindings: clock: Drop unneeded quotes Date: Wed, 22 Mar 2023 12:35:48 -0500 Message-Id: <20230322173549.3972106-1-robh@kernel.org> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Cleanup bindings dropping unneeded quotes. Once all these are fixed, checking for this can be enabled in yamllint. Signed-off-by: Rob Herring Acked-by: Geert Uytterhoeven Acked-by: Stephen Boyd Reviewed-by: Chanwoo Choi Reviewed-by: Krzysztof Kozlowski Reviewed-by: Linus Walleij --- Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml | 4 ++-- .../devicetree/bindings/clock/mediatek,apmixedsys.yaml | 4 ++-- .../devicetree/bindings/clock/mediatek,topckgen.yaml | 4 ++-- Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml | 4 ++-- .../bindings/clock/renesas,rcar-usb2-clock-sel.yaml | 4 ++-- .../devicetree/bindings/clock/renesas,rzg2l-cpg.yaml | 4 ++-- .../devicetree/bindings/clock/samsung,exynos850-clock.yaml | 2 +- Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml | 4 ++-- Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml | 4 ++-- .../devicetree/bindings/clock/xlnx,clocking-wizard.yaml | 4 ++-- 10 files changed, 19 insertions(+), 19 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml b= /Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml index 90eadf6869b2..b5533f81307c 100644 --- a/Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml +++ b/Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml @@ -81,11 +81,11 @@ properties: maxItems: 1 =20 lock-offset: - $ref: '/schemas/types.yaml#/definitions/uint32' + $ref: /schemas/types.yaml#/definitions/uint32 description: Offset to the unlocking register for the oscillator =20 vco-offset: - $ref: '/schemas/types.yaml#/definitions/uint32' + $ref: /schemas/types.yaml#/definitions/uint32 description: Offset to the VCO register for the oscillator deprecated: true =20 diff --git a/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.ya= ml b/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml index dae25dba4ba6..372c1d744bc2 100644 --- a/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml +++ b/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/clock/mediatek,apmixedsys.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/clock/mediatek,apmixedsys.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# =20 title: MediaTek AP Mixedsys Controller =20 diff --git a/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml= b/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml index 0fdf56414833..6d087ded7437 100644 --- a/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml +++ b/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/clock/mediatek,topckgen.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/clock/mediatek,topckgen.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# =20 title: MediaTek Top Clock Generator Controller =20 diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml = b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml index e57bc40d307a..9c3dc6c4fa94 100644 --- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/clock/renesas,cpg-mssr.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/clock/renesas,cpg-mssr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# =20 title: Renesas Clock Pulse Generator / Module Standby and Software Reset =20 diff --git a/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-cloc= k-sel.yaml b/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-cloc= k-sel.yaml index 81f09df7147e..c84f29f1810f 100644 --- a/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.y= aml +++ b/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.y= aml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/clock/renesas,rcar-usb2-clock-sel.yaml= #" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/clock/renesas,rcar-usb2-clock-sel.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# =20 title: Renesas R-Car USB 2.0 clock selector =20 diff --git a/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml= b/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml index 487f74cdc749..fe2fba18ae84 100644 --- a/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/clock/renesas,rzg2l-cpg.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/clock/renesas,rzg2l-cpg.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# =20 title: Renesas RZ/{G2L,V2L,V2M} Clock Pulse Generator / Module Standby Mode =20 diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos850-cloc= k.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.ya= ml index 141cf173f87d..7737fbec482c 100644 --- a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml @@ -183,7 +183,7 @@ allOf: - description: External RTC clock (32768 Hz) - description: CMU_HSI bus clock (from CMU_TOP) - description: SD card clock (from CMU_TOP) - - description: "USB 2.0 DRD clock (from CMU_TOP)" + - description: USB 2.0 DRD clock (from CMU_TOP) =20 clock-names: items: diff --git a/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml = b/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml index 785a12797a42..1703e305e6d8 100644 --- a/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml +++ b/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml @@ -2,8 +2,8 @@ # Copyright 2019 Unisoc Inc. %YAML 1.2 --- -$id: "http://devicetree.org/schemas/clock/sprd,sc9863a-clk.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/clock/sprd,sc9863a-clk.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# =20 title: SC9863A Clock Control Unit =20 diff --git a/Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml b= /Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml index 5f747b0471cf..43d2b6c31357 100644 --- a/Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml +++ b/Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml @@ -2,8 +2,8 @@ # Copyright 2022 Unisoc Inc. %YAML 1.2 --- -$id: "http://devicetree.org/schemas/clock/sprd,ums512-clk.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/clock/sprd,ums512-clk.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# =20 title: UMS512 Soc clock controller =20 diff --git a/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.y= aml b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml index 634b7b964606..c1f04830a832 100644 --- a/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml +++ b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml @@ -1,8 +1,8 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- -$id: "http://devicetree.org/schemas/clock/xlnx,clocking-wizard.yaml#" -$schema: "http://devicetree.org/meta-schemas/core.yaml#" +$id: http://devicetree.org/schemas/clock/xlnx,clocking-wizard.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# =20 title: Xilinx clocking wizard =20 --=20 2.39.2