From nobody Tue Feb 10 01:14:53 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA36CC761AF for ; Tue, 21 Mar 2023 21:58:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230056AbjCUV6F (ORCPT ); Tue, 21 Mar 2023 17:58:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58102 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230076AbjCUV5D (ORCPT ); Tue, 21 Mar 2023 17:57:03 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A374753DB3; Tue, 21 Mar 2023 14:56:50 -0700 (PDT) Received: from localhost (unknown [188.24.179.102]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id AFA8566030EB; Tue, 21 Mar 2023 21:56:48 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1679435808; bh=ebvOxKanu6MoxWyeCbmEv5UBMJrCH6Tv4wEIv8LZNec=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eXz8t03pxfzBmsapf6cd6G89Or+RWnz7/e2HJoapOb+cUUDYdDwMyV9nyMWjP7bXn gPDfpzmv2AxOh1y61tizCPX3P9uH8Lbt4gg22UWdt3BUS5YKBfpbyrvpxCk2lkag2a AkM84D91q8aSZ043ov2UWIy/pu15jpHinmBbwGYR6Z6zVyi6ZfnnwbZTL8EJgBCNxI RCoZbpeTKhzcHmoYIgZzv8HZU+Uz4iQyGrFl/JmXjnWcsP8F7OIoMGQEbuRN8YlFcJ OBqs+jRyHHtUdX6bN1k7qpFjs1pXpMjXtIXbD9PR9LilSpqX6/yv7/zQaJzc5+r6BO cjffKcVVyD63g== From: Cristian Ciocaltea To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Heiko Stuebner , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Nicolas Frattaroli Cc: linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-rockchip@lists.infradead.org, linux-riscv@lists.infradead.org, kernel@collabora.com Subject: [PATCH v2 06/10] riscv: dts: allwinner: d1: Switch dma-names order for snps,dw-apb-uart nodes Date: Tue, 21 Mar 2023 23:56:20 +0200 Message-Id: <20230321215624.78383-7-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230321215624.78383-1-cristian.ciocaltea@collabora.com> References: <20230321215624.78383-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Commit 370f696e4474 ("dt-bindings: serial: snps-dw-apb-uart: add dma & dma-names properties") documented dma-names property to handle Allwinner D1 dtbs_check warnings, but relies on the rx->tx ordering, which is the reverse of what a bunch of different boards expect. The initial proposed solution was to allow a flexible dma-names order in the binding, due to potential ABI breakage concerns after fixing the DTS files. But luckily the Allwinner boards are not affected, since they are using a shared DMA channel for rx and tx. Hence, the first step in fixing the inconsistency was to change dma-names order in the binding to tx->rx. Do the same for the snps,dw-apb-uart nodes in the DTS file. Signed-off-by: Cristian Ciocaltea Reviewed-by: Conor Dooley --- arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv= /boot/dts/allwinner/sunxi-d1s-t113.dtsi index 951810d46307..922e8e0e2c09 100644 --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi @@ -211,7 +211,7 @@ uart0: serial@2500000 { clocks =3D <&ccu CLK_BUS_UART0>; resets =3D <&ccu RST_BUS_UART0>; dmas =3D <&dma 14>, <&dma 14>; - dma-names =3D "rx", "tx"; + dma-names =3D "tx", "rx"; status =3D "disabled"; }; =20 @@ -224,7 +224,7 @@ uart1: serial@2500400 { clocks =3D <&ccu CLK_BUS_UART1>; resets =3D <&ccu RST_BUS_UART1>; dmas =3D <&dma 15>, <&dma 15>; - dma-names =3D "rx", "tx"; + dma-names =3D "tx", "rx"; status =3D "disabled"; }; =20 @@ -237,7 +237,7 @@ uart2: serial@2500800 { clocks =3D <&ccu CLK_BUS_UART2>; resets =3D <&ccu RST_BUS_UART2>; dmas =3D <&dma 16>, <&dma 16>; - dma-names =3D "rx", "tx"; + dma-names =3D "tx", "rx"; status =3D "disabled"; }; =20 @@ -250,7 +250,7 @@ uart3: serial@2500c00 { clocks =3D <&ccu CLK_BUS_UART3>; resets =3D <&ccu RST_BUS_UART3>; dmas =3D <&dma 17>, <&dma 17>; - dma-names =3D "rx", "tx"; + dma-names =3D "tx", "rx"; status =3D "disabled"; }; =20 @@ -263,7 +263,7 @@ uart4: serial@2501000 { clocks =3D <&ccu CLK_BUS_UART4>; resets =3D <&ccu RST_BUS_UART4>; dmas =3D <&dma 18>, <&dma 18>; - dma-names =3D "rx", "tx"; + dma-names =3D "tx", "rx"; status =3D "disabled"; }; =20 @@ -276,7 +276,7 @@ uart5: serial@2501400 { clocks =3D <&ccu CLK_BUS_UART5>; resets =3D <&ccu RST_BUS_UART5>; dmas =3D <&dma 19>, <&dma 19>; - dma-names =3D "rx", "tx"; + dma-names =3D "tx", "rx"; status =3D "disabled"; }; =20 --=20 2.40.0