From nobody Tue Feb 10 01:16:27 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7A749C6FD1D for ; Tue, 21 Mar 2023 21:57:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229783AbjCUV5E (ORCPT ); Tue, 21 Mar 2023 17:57:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57256 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230056AbjCUV4s (ORCPT ); Tue, 21 Mar 2023 17:56:48 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C651A5291F; Tue, 21 Mar 2023 14:56:43 -0700 (PDT) Received: from localhost (unknown [188.24.179.102]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id 59F2166030E0; Tue, 21 Mar 2023 21:56:42 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1679435802; bh=N/ZvfamKX7ttvXbRjuUCngvIStvDvApje9cACLj84nc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DqaZ5y5wGDXGe9EAD5npPYnOvO8wTs3kNVCLiDkTuyJH7ci44MX8ygIEFgwNjQNyv sqBKfbH5NULmGNhEnqAny3aDt1UklimcwMHGKe3QsS4C18Php76Uwvcy5C5acRqSgU 9ymwDXiVb3HW6dfk2SD+FWFK00TmK8vZVuyHZfdSzqLZwJb3Rp66yXy5Wd+mniHzQm HbaocTMIi2y2VmHj5H97kNMjZNVLXihy5ZuEYBfvyQ+vcefBsOSeIeE9tCqVfiLsna mtjcISN1N3a5tKbCODUy2AMlT5JCuwLsdKudj5rXfD1XCRuVVo74Qv8JEVlTjMCfyB s20AE7DVsgyug== From: Cristian Ciocaltea To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Heiko Stuebner , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Nicolas Frattaroli Cc: linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-rockchip@lists.infradead.org, linux-riscv@lists.infradead.org, kernel@collabora.com Subject: [PATCH v2 04/10] ARM: dts: sun8i: v3s: Switch dma-names order for snps,dw-apb-uart nodes Date: Tue, 21 Mar 2023 23:56:18 +0200 Message-Id: <20230321215624.78383-5-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230321215624.78383-1-cristian.ciocaltea@collabora.com> References: <20230321215624.78383-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Commit 370f696e4474 ("dt-bindings: serial: snps-dw-apb-uart: add dma & dma-names properties") documented dma-names property to handle Allwinner D1 dtbs_check warnings, but relies on the rx->tx ordering, which is the reverse of what a bunch of different boards expect. The initial proposed solution was to allow a flexible dma-names order in the binding, due to potential ABI breakage concerns after fixing the DTS files. But luckily the Allwinner boards are not affected, since they are using a shared DMA channel for rx and tx. Hence, the first step in fixing the inconsistency was to change dma-names order in the binding to tx->rx. Do the same for the snps,dw-apb-uart nodes in the DTS file. Signed-off-by: Cristian Ciocaltea Acked-by: Jernej Skrabec --- arch/arm/boot/dts/sun8i-v3s.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s= .dtsi index db194c606fdc..b001251644f7 100644 --- a/arch/arm/boot/dts/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi @@ -479,7 +479,7 @@ uart0: serial@1c28000 { reg-io-width =3D <4>; clocks =3D <&ccu CLK_BUS_UART0>; dmas =3D <&dma 6>, <&dma 6>; - dma-names =3D "rx", "tx"; + dma-names =3D "tx", "rx"; resets =3D <&ccu RST_BUS_UART0>; status =3D "disabled"; }; @@ -492,7 +492,7 @@ uart1: serial@1c28400 { reg-io-width =3D <4>; clocks =3D <&ccu CLK_BUS_UART1>; dmas =3D <&dma 7>, <&dma 7>; - dma-names =3D "rx", "tx"; + dma-names =3D "tx", "rx"; resets =3D <&ccu RST_BUS_UART1>; status =3D "disabled"; }; @@ -505,7 +505,7 @@ uart2: serial@1c28800 { reg-io-width =3D <4>; clocks =3D <&ccu CLK_BUS_UART2>; dmas =3D <&dma 8>, <&dma 8>; - dma-names =3D "rx", "tx"; + dma-names =3D "tx", "rx"; resets =3D <&ccu RST_BUS_UART2>; pinctrl-0 =3D <&uart2_pins>; pinctrl-names =3D "default"; --=20 2.40.0