From nobody Thu Nov 14 18:12:40 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 70481C76196 for ; Fri, 17 Mar 2023 21:32:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230241AbjCQVcU (ORCPT ); Fri, 17 Mar 2023 17:32:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44126 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230403AbjCQVbs (ORCPT ); Fri, 17 Mar 2023 17:31:48 -0400 Received: from mail-ed1-x52e.google.com (mail-ed1-x52e.google.com [IPv6:2a00:1450:4864:20::52e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 695532F042; Fri, 17 Mar 2023 14:31:14 -0700 (PDT) Received: by mail-ed1-x52e.google.com with SMTP id o12so25382189edb.9; Fri, 17 Mar 2023 14:31:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1679088664; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8yu8jx+Bn0uWS9+tZTglcUL4SPeA/bfBOXrCTgW/Wh8=; b=NCH49KH2VkHoh831KGaAOFlseyHE3VCIXNcClKuzOAwnzCuK9IDHNy/okJHMGbuqqe iUJeo5btO3kz/xFM7Z2k+Xo3lJyo8PB/49N8vNLF9D37EONx3lHvA04OmQfLjeR7BbtU XYVrKZDf675Agr6C2qHmJPSEuoxJYSGRPlwa5v+GRUogygtO+A9Vz2KpDywXPS+ZLBny sBoftZdbLj0xmqgykSlfgxPXjpzoLKyLP3K0hKhMWD3ZiiErs+TaNSJudXm9ed+xKMWl YOZ/8kCQ7DOfhFsJ+zYyxTKo2DfsQs4zHaklXGW+l9JmfbnyUTUMvBwyAjP2+U1Vu/b6 /P3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679088664; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8yu8jx+Bn0uWS9+tZTglcUL4SPeA/bfBOXrCTgW/Wh8=; b=C04EOTUM2LBCZwX5pfyKqb7j7ap1Hf+Gckq31Xv92Xh01gBANtJyugWE4Avye1VrYP QCExRC7kytnQ6sOaP7IZQVspBrXp3100ELvJrC3KPQoPas2bw7M4/fczYTAk1NrjEtpv 0RjqRb1m6LDmGzyjFn/Spyg2es9x4vp4qeRbHIYZmJjUyYcU4NAVQ2G3PHY0SBjQYd1o WwgtTVFTcFzHF0tCBI5mWGSezFNN9YAnkiufjE0r4d/SgVCWpxgvfGHBzKKCKXdLyHdo fRcKOhfdd0bqj9EWwWRDND1KvDFNtSjk33evZi2uR6117AKH/ogSpSxHhvBm4dFKnGkb o4AQ== X-Gm-Message-State: AO0yUKVBqLx4716V8UYfznfnT/ZJzWptEgHnog+plKd5G5tqxqx/vx0x XGir2hIwZ3btQbz0jIXPpcg= X-Google-Smtp-Source: AK7set+XWrvn/B2c82lPXMjGRfcClzfOs4Wo1ND1mkunRJMAvsfAC6nfbVm8A1au4PCBEBGAenKWhg== X-Received: by 2002:a17:906:118e:b0:930:6db6:39c0 with SMTP id n14-20020a170906118e00b009306db639c0mr901706eja.61.1679088664479; Fri, 17 Mar 2023 14:31:04 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id v19-20020a17090651d300b0092b86d41dbasm1404683ejk.114.2023.03.17.14.31.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Mar 2023 14:31:04 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Linus Walleij , Rob Herring , Krzysztof Kozlowski Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Rob Herring , William Dean , Sean Wang , Andy Teng , Del Regno , Daniel Golle , Hui Liu , Zhiyong Tao , =?UTF-8?q?Bernhard=20Rosenkr=C3=A4nzer?= , Sergio Paracuellos , Daniel Santos , Luiz Angelo Daros de Luca , Frank Wunderlich , Landen Chao , DENG Qingfang , Sean Wang , erkin.bozoglu@xeront.com, Matthias Brugger , linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org Subject: [PATCH v3 19/21] dt-bindings: pinctrl: ralink: rt305x: split binding Date: Sat, 18 Mar 2023 00:30:09 +0300 Message-Id: <20230317213011.13656-20-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230317213011.13656-1-arinc.unal@arinc9.com> References: <20230317213011.13656-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL The RT3352 and RT5350 SoCs each contain different pin muxing information, therefore, should be split. This can be done now that there are compatible strings to distinguish them from other SoCs. Split the schema out to ralink,rt3352-pinctrl.yaml and ralink,rt5350-pinctrl.yaml. Remove ralink,rt3352-pinctrl and ralink,rt5350-pinctrl from rt305x. Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Reviewed-by: Rob Herring --- .../pinctrl/ralink,rt305x-pinctrl.yaml | 83 +----- .../pinctrl/ralink,rt3352-pinctrl.yaml | 243 ++++++++++++++++++ .../pinctrl/ralink,rt5350-pinctrl.yaml | 206 +++++++++++++++ 3 files changed, 455 insertions(+), 77 deletions(-) create mode 100644 Documentation/devicetree/bindings/pinctrl/ralink,rt3352= -pinctrl.yaml create mode 100644 Documentation/devicetree/bindings/pinctrl/ralink,rt5350= -pinctrl.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctr= l.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.ya= ml index 55c6f9826e76..95a904273009 100644 --- a/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml @@ -11,17 +11,13 @@ maintainers: - Sergio Paracuellos =20 description: | - Ralink RT305X pin controller for RT3050, RT3052, RT3350, RT3352 and RT53= 50 - SoCs. + Ralink RT305X pin controller for RT3050, RT3052, and RT3350 SoCs. The pin controller can only set the muxing of pin groups. Muxing individ= ual pins is not supported. There is no pinconf support. =20 properties: compatible: - enum: - - ralink,rt305x-pinctrl - - ralink,rt3352-pinctrl - - ralink,rt5350-pinctrl + const: ralink,rt305x-pinctrl =20 patternProperties: '-pins$': @@ -39,21 +35,9 @@ patternProperties: function: description: A string containing the name of the function to mux to the g= roup. - anyOf: - - description: For RT3050, RT3052 and RT3350 SoCs - enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, m= dio, - pcm gpio, pcm i2s, pcm uartf, rgmii, sdram, spi, ua= rtf, - uartlite] - - - description: For RT3352 SoC - enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, l= ed, - lna, mdio, pa, pcm gpio, pcm i2s, pcm uartf, rgmii,= spi, - spi_cs1, uartf, uartlite, wdg_cs1] - - - description: For RT5350 SoC - enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, l= ed, - pcm gpio, pcm i2s, pcm uartf, spi, spi_cs1, uartf, - uartlite, wdg_cs1] + enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, mdio, + pcm gpio, pcm i2s, pcm uartf, rgmii, sdram, spi, uartf, + uartlite] =20 groups: description: @@ -72,17 +56,7 @@ patternProperties: then: properties: groups: - anyOf: - - description: For RT3050, RT3052 and RT3350 SoCs - enum: [i2c, jtag, mdio, rgmii, sdram, spi, uartf, - uartlite] - - - description: For RT3352 SoC - enum: [i2c, jtag, led, lna, mdio, pa, rgmii, spi, sp= i_cs1, - uartf, uartlite] - - - description: For RT5350 SoC - enum: [i2c, jtag, led, spi, spi_cs1, uartf, uartlite] + enum: [i2c, jtag, mdio, rgmii, sdram, spi, uartf, uartli= te] =20 - if: properties: @@ -129,24 +103,6 @@ patternProperties: groups: enum: [jtag] =20 - - if: - properties: - function: - const: led - then: - properties: - groups: - enum: [led] - - - if: - properties: - function: - const: lna - then: - properties: - groups: - enum: [lna] - - if: properties: function: @@ -156,15 +112,6 @@ patternProperties: groups: enum: [mdio] =20 - - if: - properties: - function: - const: pa - then: - properties: - groups: - enum: [pa] - - if: properties: function: @@ -219,15 +166,6 @@ patternProperties: groups: enum: [spi] =20 - - if: - properties: - function: - const: spi_cs1 - then: - properties: - groups: - enum: [spi_cs1] - - if: properties: function: @@ -246,15 +184,6 @@ patternProperties: groups: enum: [uartlite] =20 - - if: - properties: - function: - const: wdg_cs1 - then: - properties: - groups: - enum: [spi_cs1] - allOf: - $ref: pinctrl.yaml# =20 diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,rt3352-pinctr= l.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,rt3352-pinctrl.ya= ml new file mode 100644 index 000000000000..c9bc6cfd834c --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/ralink,rt3352-pinctrl.yaml @@ -0,0 +1,243 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/ralink,rt3352-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ralink RT3352 Pin Controller + +maintainers: + - Ar=C4=B1n=C3=A7 =C3=9CNAL + - Sergio Paracuellos + +description: | + Ralink RT3352 pin controller for RT3352 SoC. + The pin controller can only set the muxing of pin groups. Muxing individ= ual + pins is not supported. There is no pinconf support. + +properties: + compatible: + const: ralink,rt3352-pinctrl + +patternProperties: + '-pins$': + type: object + additionalProperties: false + + patternProperties: + '^(.*-)?pinmux$': + type: object + description: node for pinctrl. + $ref: pinmux-node.yaml# + additionalProperties: false + + properties: + function: + description: + A string containing the name of the function to mux to the g= roup. + enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, led, = lna, + mdio, pa, pcm gpio, pcm i2s, pcm uartf, rgmii, spi, spi= _cs1, + uartf, uartlite, wdg_cs1] + + groups: + description: + An array of strings. Each string contains the name of a grou= p. + maxItems: 1 + + required: + - groups + - function + + allOf: + - if: + properties: + function: + const: gpio + then: + properties: + groups: + enum: [i2c, jtag, led, lna, mdio, pa, rgmii, spi, spi_cs= 1, + uartf, uartlite] + + - if: + properties: + function: + const: gpio i2s + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: gpio uartf + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: i2c + then: + properties: + groups: + enum: [i2c] + + - if: + properties: + function: + const: i2s uartf + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: jtag + then: + properties: + groups: + enum: [jtag] + + - if: + properties: + function: + const: led + then: + properties: + groups: + enum: [led] + + - if: + properties: + function: + const: lna + then: + properties: + groups: + enum: [lna] + + - if: + properties: + function: + const: mdio + then: + properties: + groups: + enum: [mdio] + + - if: + properties: + function: + const: pa + then: + properties: + groups: + enum: [pa] + + - if: + properties: + function: + const: pcm gpio + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: pcm i2s + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: pcm uartf + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: rgmii + then: + properties: + groups: + enum: [rgmii] + + - if: + properties: + function: + const: spi + then: + properties: + groups: + enum: [spi] + + - if: + properties: + function: + const: spi_cs1 + then: + properties: + groups: + enum: [spi_cs1] + + - if: + properties: + function: + const: uartf + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: uartlite + then: + properties: + groups: + enum: [uartlite] + + - if: + properties: + function: + const: wdg_cs1 + then: + properties: + groups: + enum: [spi_cs1] + +allOf: + - $ref: pinctrl.yaml# + +required: + - compatible + +additionalProperties: false + +examples: + - | + pinctrl { + compatible =3D "ralink,rt3352-pinctrl"; + + i2c_pins: i2c0-pins { + pinmux { + groups =3D "i2c"; + function =3D "i2c"; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,rt5350-pinctr= l.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,rt5350-pinctrl.ya= ml new file mode 100644 index 000000000000..f248202ce866 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/ralink,rt5350-pinctrl.yaml @@ -0,0 +1,206 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/ralink,rt5350-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ralink RT5350 Pin Controller + +maintainers: + - Ar=C4=B1n=C3=A7 =C3=9CNAL + - Sergio Paracuellos + +description: | + Ralink RT5350 pin controller for RT5350 SoC. + The pin controller can only set the muxing of pin groups. Muxing individ= ual + pins is not supported. There is no pinconf support. + +properties: + compatible: + const: ralink,rt5350-pinctrl + +patternProperties: + '-pins$': + type: object + additionalProperties: false + + patternProperties: + '^(.*-)?pinmux$': + type: object + description: node for pinctrl. + $ref: pinmux-node.yaml# + additionalProperties: false + + properties: + function: + description: + A string containing the name of the function to mux to the g= roup. + enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, led, + pcm gpio, pcm i2s, pcm uartf, spi, spi_cs1, uartf, uart= lite, + wdg_cs1] + + groups: + description: + An array of strings. Each string contains the name of a grou= p. + maxItems: 1 + + required: + - groups + - function + + allOf: + - if: + properties: + function: + const: gpio + then: + properties: + groups: + enum: [i2c, jtag, led, spi, spi_cs1, uartf, uartlite] + + - if: + properties: + function: + const: gpio i2s + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: gpio uartf + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: i2c + then: + properties: + groups: + enum: [i2c] + + - if: + properties: + function: + const: i2s uartf + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: jtag + then: + properties: + groups: + enum: [jtag] + + - if: + properties: + function: + const: led + then: + properties: + groups: + enum: [led] + + - if: + properties: + function: + const: pcm gpio + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: pcm i2s + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: pcm uartf + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: spi + then: + properties: + groups: + enum: [spi] + + - if: + properties: + function: + const: spi_cs1 + then: + properties: + groups: + enum: [spi_cs1] + + - if: + properties: + function: + const: uartf + then: + properties: + groups: + enum: [uartf] + + - if: + properties: + function: + const: uartlite + then: + properties: + groups: + enum: [uartlite] + + - if: + properties: + function: + const: wdg_cs1 + then: + properties: + groups: + enum: [spi_cs1] + +allOf: + - $ref: pinctrl.yaml# + +required: + - compatible + +additionalProperties: false + +examples: + - | + pinctrl { + compatible =3D "ralink,rt5350-pinctrl"; + + i2c_pins: i2c0-pins { + pinmux { + groups =3D "i2c"; + function =3D "i2c"; + }; + }; + }; --=20 2.37.2