From nobody Sun Nov 10 20:58:15 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B22D8C7619A for ; Fri, 17 Mar 2023 21:31:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230500AbjCQVbW (ORCPT ); Fri, 17 Mar 2023 17:31:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43010 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230492AbjCQVbH (ORCPT ); Fri, 17 Mar 2023 17:31:07 -0400 Received: from mail-ed1-x52b.google.com (mail-ed1-x52b.google.com [IPv6:2a00:1450:4864:20::52b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 71E6D60D41; Fri, 17 Mar 2023 14:30:41 -0700 (PDT) Received: by mail-ed1-x52b.google.com with SMTP id z21so25476710edb.4; Fri, 17 Mar 2023 14:30:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1679088639; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=g3sp6QmVh7Rvu6BYvs/4TvtXukT0lH08BB5qr/XfDtE=; b=GdqMRlbbMdqy6mBryn6qXANvu20qLcsphW6f1CwS2ByufSCoUvCno/NyxPCmjwTkvl H1TqqmMvztp/DMucW1PN7pMx9B2Ufue7tAApNNk8OzbjkwUc9sizLC29NBeXchmO5R8z T8A/ouG2DUMLdZw13luqQ9wv2z5xKY+xJN0dXpvOEjmv4uSW1dRVaWkcYfR7IkoShKJm lcT/MZAVPZr0XcFp3tTJZZSDa6i6M/nQSsqWVOqQcqe/YeaqalcfBw8ZuKkCVd/0RKjN wTtbAB8n+DZIJe3G/Shq0GdMO4ymTpRPYgkkm9/jLHJ8ZzZhamNfQBhV/JJf4SklK1zu x/Cg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679088639; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=g3sp6QmVh7Rvu6BYvs/4TvtXukT0lH08BB5qr/XfDtE=; b=T9/N71WAx5p6sUVwO+QB82Fejm+NlnvDsTHaNkhF6Rfh+J34rcwvMf4k4hJ+KEHipF niOel0H7/bY/QLf/y+TpfcDb9EEcl+RpqkjRWRf+kZXnimi1K2iVJWiAKexhvuzxg9vB pKet+rsuc9aKiLPpFRZMZWTBoh4ohZw+3hJipSapjfs1+uRfFlCBzqrf6aU9WzDYowkd BfMeAcQPb6nL+9H2GwLsZNv6H8TKdUYh9aICaqyl3DMeUMK86/gknmtH+CmQWBOT5R7Z N98y+6VCcND+shzprR0Wz+sdgbj+fhrvbCr1XOv6Ppo3ZE5V5WlGM0SCPi0E9spZjETy iCPw== X-Gm-Message-State: AO0yUKV+Kn4IyA/atV4hwOuA8vpPmET08cp4dZ5fRk7N7NbdMmz9V21d FiDPNNHJljm/UUZkJPVgaSg= X-Google-Smtp-Source: AK7set/9K2BNiDB/LyvS/AlwDYgBXQTTnanfENeD02BnpjOWxSsJ3zmb4GYZB96xyu/KaC775A3WmQ== X-Received: by 2002:a17:906:2a51:b0:87f:5d0a:c610 with SMTP id k17-20020a1709062a5100b0087f5d0ac610mr774374eje.32.1679088639122; Fri, 17 Mar 2023 14:30:39 -0700 (PDT) Received: from arinc9-PC.lan ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id v19-20020a17090651d300b0092b86d41dbasm1404683ejk.114.2023.03.17.14.30.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Mar 2023 14:30:38 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Linus Walleij , Rob Herring , Krzysztof Kozlowski Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Rob Herring , William Dean , Sean Wang , Andy Teng , Del Regno , Daniel Golle , Hui Liu , Zhiyong Tao , =?UTF-8?q?Bernhard=20Rosenkr=C3=A4nzer?= , Sergio Paracuellos , Daniel Santos , Luiz Angelo Daros de Luca , Frank Wunderlich , Landen Chao , DENG Qingfang , Sean Wang , erkin.bozoglu@xeront.com, Matthias Brugger , linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org Subject: [PATCH v3 09/21] dt-bindings: pinctrl: ralink: {mt7620,mt7621}: rename to mediatek Date: Sat, 18 Mar 2023 00:29:59 +0300 Message-Id: <20230317213011.13656-10-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230317213011.13656-1-arinc.unal@arinc9.com> References: <20230317213011.13656-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL Rename schemas of pin controllers for MediaTek MT7620 and MT7621 SoCs to be on par with other pin controllers for MediaTek SoCs. Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Reviewed-by: Rob Herring --- ...ink,mt7620-pinctrl.yaml =3D> mediatek,mt7620-pinctrl.yaml} | 6 +++--- ...ink,mt7621-pinctrl.yaml =3D> mediatek,mt7621-pinctrl.yaml} | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) rename Documentation/devicetree/bindings/pinctrl/{ralink,mt7620-pinctrl.ya= ml =3D> mediatek,mt7620-pinctrl.yaml} (98%) rename Documentation/devicetree/bindings/pinctrl/{ralink,mt7621-pinctrl.ya= ml =3D> mediatek,mt7621-pinctrl.yaml} (97%) diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctr= l.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.= yaml similarity index 98% rename from Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl= .yaml rename to Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl= .yaml index 09ebb8ac22ac..0dcdc3788e66 100644 --- a/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml @@ -1,17 +1,17 @@ # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- -$id: http://devicetree.org/schemas/pinctrl/ralink,mt7620-pinctrl.yaml# +$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7620-pinctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# =20 -title: Ralink MT7620 Pin Controller +title: MediaTek MT7620 Pin Controller =20 maintainers: - Ar=C4=B1n=C3=A7 =C3=9CNAL - Sergio Paracuellos =20 description: - Ralink MT7620 pin controller for MT7620, MT7628 and MT7688 SoCs. + MediaTek MT7620 pin controller for MT7620, MT7628 and MT7688 SoCs. The pin controller can only set the muxing of pin groups. Muxing individ= ual pins is not supported. There is no pinconf support. =20 diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,mt7621-pinctr= l.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7621-pinctrl.= yaml similarity index 97% rename from Documentation/devicetree/bindings/pinctrl/ralink,mt7621-pinctrl= .yaml rename to Documentation/devicetree/bindings/pinctrl/mediatek,mt7621-pinctrl= .yaml index fb8c5459ea93..32506c538459 100644 --- a/Documentation/devicetree/bindings/pinctrl/ralink,mt7621-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7621-pinctrl.yaml @@ -1,17 +1,17 @@ # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- -$id: http://devicetree.org/schemas/pinctrl/ralink,mt7621-pinctrl.yaml# +$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7621-pinctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# =20 -title: Ralink MT7621 Pin Controller +title: MediaTek MT7621 Pin Controller =20 maintainers: - Ar=C4=B1n=C3=A7 =C3=9CNAL - Sergio Paracuellos =20 description: - Ralink MT7621 pin controller for MT7621 SoC. + MediaTek MT7621 pin controller for MT7621 SoC. The pin controller can only set the muxing of pin groups. Muxing individ= ual pins is not supported. There is no pinconf support. =20 --=20 2.37.2