From nobody Wed Sep 10 11:07:58 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BAEA0C64EC4 for ; Wed, 8 Mar 2023 16:59:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230151AbjCHQ7U (ORCPT ); Wed, 8 Mar 2023 11:59:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50970 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229634AbjCHQ66 (ORCPT ); Wed, 8 Mar 2023 11:58:58 -0500 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7FF8BC78D8; Wed, 8 Mar 2023 08:57:30 -0800 (PST) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 328Gtvvb046092; Wed, 8 Mar 2023 10:55:57 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1678294557; bh=ZzKVlyCPHyTxRj4e2SffrTyR2DUIDFnjXsjccSjcXd8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=MszOK0s40jPI/Vw6oFZPyvZFMGSyPNW09NYOzb/ZVkFVt4pkTo63bg6JE0QXCymUN jiI9pVobtz13wLSroANT2oQcq0ORIe5UpQr+f3U2rSl1VD1ZNc3Rz4RQ5nwOiPovqL Ertho3O8wUHr4ia73cXcJ5ZPMKRntT7b2CJl1AAk= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 328GtvA2018511 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 8 Mar 2023 10:55:57 -0600 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Wed, 8 Mar 2023 10:55:57 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Wed, 8 Mar 2023 10:55:57 -0600 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 328Gtval014057; Wed, 8 Mar 2023 10:55:57 -0600 From: Andrew Davis To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Linus Walleij , Geert Uytterhoeven , Daniel Tang , Fabian Vogt CC: , , , Andrew Davis Subject: [PATCH v6 3/9] ARM: dts: nspire: Fix cpu node to conform with DT binding Date: Wed, 8 Mar 2023 10:55:50 -0600 Message-ID: <20230308165557.2242-4-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308165557.2242-1-afd@ti.com> References: <20230308165557.2242-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This node does not follow the DT binding schema, correct this. Should result in no functional change. Signed-off-by: Andrew Davis --- arch/arm/boot/dts/nspire.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/nspire.dtsi b/arch/arm/boot/dts/nspire.dtsi index 48fbc9d533c3..cb7237051512 100644 --- a/arch/arm/boot/dts/nspire.dtsi +++ b/arch/arm/boot/dts/nspire.dtsi @@ -11,8 +11,13 @@ / { interrupt-parent =3D <&intc>; =20 cpus { + #address-cells =3D <1>; + #size-cells =3D <0>; + cpu@0 { compatible =3D "arm,arm926ej-s"; + device_type =3D "cpu"; + reg =3D <0>; }; }; =20 --=20 2.39.2