From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08206C678D5 for ; Wed, 8 Mar 2023 13:02:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231600AbjCHNCm (ORCPT ); Wed, 8 Mar 2023 08:02:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38852 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231538AbjCHNBO (ORCPT ); Wed, 8 Mar 2023 08:01:14 -0500 X-Greylist: delayed 424 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Wed, 08 Mar 2023 05:00:12 PST Received: from smtp-bc0c.mail.infomaniak.ch (smtp-bc0c.mail.infomaniak.ch [45.157.188.12]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3BA8FC5619; Wed, 8 Mar 2023 05:00:11 -0800 (PST) Received: from smtp-2-0000.mail.infomaniak.ch (unknown [10.5.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4PWsg668cDzMrS9g; Wed, 8 Mar 2023 13:53:06 +0100 (CET) Received: from unknown by smtp-2-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4PWsg62B2NzMslsN; Wed, 8 Mar 2023 13:53:06 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1678279986; bh=yAeHdLmNq0F5EokzLcRFWZBsN9ekfmdOHINZBq0Uhjg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=y3u1AIvpBr5ZrTByBfQETXo7UIdaniWIBtbXnI96u8x5t2Y6XOyqUjdlXs0TsKq1E Ox8GM9EB1YvSZtkzawK1hCSla7iqSsu+SNWViNGu0t6zMtCOTi7TzHk9o8sRG1Ol71 hEhdR1/hvf/cSp+MdAyVyVrdc2mxtHqo0ZOpGWRM= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , linux-kernel@vger.kernel.org Subject: [PATCH v1 01/25] arm64: dts: colibri-imx8x: Prepare for qxp and dx variants Date: Wed, 8 Mar 2023 13:52:35 +0100 Message-Id: <20230308125300.58244-2-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker Toradex sells the Colibri iMX8X module in variants with the i.MX 8QXP and i.MX8DX SoC. Prepare for this by moving majority of stuff from imx8qxp-colibri.dtsi into imx8x-colibri.dtsi. Remove DX from the model string. This commit intends no functional change. Signed-off-by: Philippe Schenker --- .../dts/freescale/imx8qxp-colibri-eval-v3.dts | 4 +- .../boot/dts/freescale/imx8qxp-colibri.dtsi | 590 +---------------- ...val-v3.dtsi =3D> imx8x-colibri-eval-v3.dtsi} | 0 .../boot/dts/freescale/imx8x-colibri.dtsi | 593 ++++++++++++++++++ 4 files changed, 597 insertions(+), 590 deletions(-) rename arch/arm64/boot/dts/freescale/{imx8qxp-colibri-eval-v3.dtsi =3D> im= x8x-colibri-eval-v3.dtsi} (100%) create mode 100644 arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dts b/ar= ch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dts index 6b21a295c126..413a9e9d6c28 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dts +++ b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dts @@ -6,10 +6,10 @@ /dts-v1/; =20 #include "imx8qxp-colibri.dtsi" -#include "imx8qxp-colibri-eval-v3.dtsi" +#include "imx8x-colibri-eval-v3.dtsi" =20 / { - model =3D "Toradex Colibri iMX8QXP/DX on Colibri Evaluation Board V3"; + model =3D "Toradex Colibri iMX8QXP on Colibri Evaluation Board V3"; compatible =3D "toradex,colibri-imx8x-eval-v3", "toradex,colibri-imx8x", "fsl,imx8qxp"; }; diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi b/arch/arm6= 4/boot/dts/freescale/imx8qxp-colibri.dtsi index 89d70e030433..1ffc42f4a4b3 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi @@ -4,595 +4,9 @@ */ =20 #include "imx8qxp.dtsi" +#include "imx8x-colibri.dtsi" =20 / { - model =3D "Toradex Colibri iMX8QXP/DX Module"; + model =3D "Toradex Colibri iMX8QXP Module"; compatible =3D "toradex,colibri-imx8x", "fsl,imx8qxp"; - - chosen { - stdout-path =3D &lpuart3; - }; - - reg_module_3v3: regulator-module-3v3 { - compatible =3D "regulator-fixed"; - regulator-name =3D "+V3.3"; - regulator-min-microvolt =3D <3300000>; - regulator-max-microvolt =3D <3300000>; - }; -}; - -/* On-module I2C */ -&i2c0 { - #address-cells =3D <1>; - #size-cells =3D <0>; - clock-frequency =3D <100000>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_i2c0>, <&pinctrl_sgtl5000_usb_clk>; - status =3D "okay"; - - /* Touch controller */ - touchscreen@2c { - compatible =3D "adi,ad7879-1"; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_ad7879_int>; - reg =3D <0x2c>; - interrupt-parent =3D <&lsio_gpio3>; - interrupts =3D <5 IRQ_TYPE_EDGE_FALLING>; - touchscreen-max-pressure =3D <4096>; - adi,resistance-plate-x =3D <120>; - adi,first-conversion-delay =3D /bits/ 8 <3>; - adi,acquisition-time =3D /bits/ 8 <1>; - adi,median-filter-size =3D /bits/ 8 <2>; - adi,averaging =3D /bits/ 8 <1>; - adi,conversion-interval =3D /bits/ 8 <255>; - }; -}; - -/* Colibri I2C */ -&i2c1 { - #address-cells =3D <1>; - #size-cells =3D <0>; - clock-frequency =3D <100000>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_i2c1>; -}; - -/* Colibri UART_B */ -&lpuart0 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_lpuart0>; -}; - -/* Colibri UART_C */ -&lpuart2 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_lpuart2>; -}; - -/* Colibri UART_A */ -&lpuart3 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_lpuart3>, <&pinctrl_lpuart3_ctrl>; -}; - -/* Colibri FastEthernet */ -&fec1 { - pinctrl-names =3D "default", "sleep"; - pinctrl-0 =3D <&pinctrl_fec1>; - pinctrl-1 =3D <&pinctrl_fec1_sleep>; - phy-mode =3D "rmii"; - phy-handle =3D <ðphy0>; - fsl,magic-packet; - - mdio { - #address-cells =3D <1>; - #size-cells =3D <0>; - - ethphy0: ethernet-phy@2 { - compatible =3D "ethernet-phy-ieee802.3-c22"; - max-speed =3D <100>; - reg =3D <2>; - }; - }; -}; - -/* On-module eMMC */ -&usdhc1 { - bus-width =3D <8>; - non-removable; - no-sd; - no-sdio; - pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; - pinctrl-0 =3D <&pinctrl_usdhc1>; - pinctrl-1 =3D <&pinctrl_usdhc1_100mhz>; - pinctrl-2 =3D <&pinctrl_usdhc1_200mhz>; - status =3D "okay"; -}; - -/* Colibri SD/MMC Card */ -&usdhc2 { - bus-width =3D <4>; - cd-gpios =3D <&lsio_gpio3 9 GPIO_ACTIVE_LOW>; - vmmc-supply =3D <®_module_3v3>; - pinctrl-names =3D "default", "state_100mhz", "state_200mhz", "sleep"; - pinctrl-0 =3D <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; - pinctrl-1 =3D <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; - pinctrl-2 =3D <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; - pinctrl-3 =3D <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>; - disable-wp; -}; - -&iomuxc { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>; - - /* On-module touch pen-down interrupt */ - pinctrl_ad7879_int: ad7879intgrp { - fsl,pins =3D < - IMX8QXP_MIPI_CSI0_I2C0_SCL_LSIO_GPIO3_IO05 0x21 - >; - }; - - /* Colibri Analogue Inputs */ - pinctrl_adc0: adc0grp { - fsl,pins =3D < - IMX8QXP_ADC_IN0_ADMA_ADC_IN0 0x60 /* SODIMM 8 */ - IMX8QXP_ADC_IN1_ADMA_ADC_IN1 0x60 /* SODIMM 6 */ - IMX8QXP_ADC_IN4_ADMA_ADC_IN4 0x60 /* SODIMM 4 */ - IMX8QXP_ADC_IN5_ADMA_ADC_IN5 0x60 /* SODIMM 2 */ - >; - }; - - pinctrl_can_int: canintgrp { - fsl,pins =3D < - IMX8QXP_QSPI0A_DQS_LSIO_GPIO3_IO13 0x40 /* SODIMM 73 */ - >; - }; - - pinctrl_csi_ctl: csictlgrp { - fsl,pins =3D < - IMX8QXP_QSPI0A_SS0_B_LSIO_GPIO3_IO14 0x20 /* SODIMM 77 */ - IMX8QXP_QSPI0A_SS1_B_LSIO_GPIO3_IO15 0x20 /* SODIMM 89 */ - >; - }; - - pinctrl_ext_io0: extio0grp { - fsl,pins =3D < - IMX8QXP_ENET0_RGMII_RXD3_LSIO_GPIO5_IO08 0x06000040 /* SODIMM 135 */ - >; - }; - - /* Colibri Ethernet: On-module 100Mbps PHY Micrel KSZ8041 */ - pinctrl_fec1: fec1grp { - fsl,pins =3D < - IMX8QXP_ENET0_MDC_CONN_ENET0_MDC 0x06000020 - IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020 - IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x61 - IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RCLK50M_OUT 0x06000061 - IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x61 - IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x61 - IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x61 - IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x61 - IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x61 - IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RMII_RX_ER 0x61 - >; - }; - - pinctrl_fec1_sleep: fec1slpgrp { - fsl,pins =3D < - IMX8QXP_ENET0_MDC_LSIO_GPIO5_IO11 0x06000041 - IMX8QXP_ENET0_MDIO_LSIO_GPIO5_IO10 0x06000041 - IMX8QXP_ENET0_RGMII_TX_CTL_LSIO_GPIO4_IO30 0x41 - IMX8QXP_ENET0_RGMII_TXC_LSIO_GPIO4_IO29 0x41 - IMX8QXP_ENET0_RGMII_TXD0_LSIO_GPIO4_IO31 0x41 - IMX8QXP_ENET0_RGMII_TXD1_LSIO_GPIO5_IO00 0x41 - IMX8QXP_ENET0_RGMII_RX_CTL_LSIO_GPIO5_IO04 0x41 - IMX8QXP_ENET0_RGMII_RXD0_LSIO_GPIO5_IO05 0x41 - IMX8QXP_ENET0_RGMII_RXD1_LSIO_GPIO5_IO06 0x41 - IMX8QXP_ENET0_RGMII_RXD2_LSIO_GPIO5_IO07 0x41 - >; - }; - - /* Colibri optional CAN on UART_B RTS/CTS */ - pinctrl_flexcan1: flexcan0grp { - fsl,pins =3D < - IMX8QXP_FLEXCAN0_TX_ADMA_FLEXCAN0_TX 0x21 /* SODIMM 32 */ - IMX8QXP_FLEXCAN0_RX_ADMA_FLEXCAN0_RX 0x21 /* SODIMM 34 */ - >; - }; - - /* Colibri optional CAN on PS2 */ - pinctrl_flexcan2: flexcan1grp { - fsl,pins =3D < - IMX8QXP_FLEXCAN1_TX_ADMA_FLEXCAN1_TX 0x21 /* SODIMM 55 */ - IMX8QXP_FLEXCAN1_RX_ADMA_FLEXCAN1_RX 0x21 /* SODIMM 63 */ - >; - }; - - /* Colibri optional CAN on UART_A TXD/RXD */ - pinctrl_flexcan3: flexcan2grp { - fsl,pins =3D < - IMX8QXP_FLEXCAN2_TX_ADMA_FLEXCAN2_TX 0x21 /* SODIMM 35 */ - IMX8QXP_FLEXCAN2_RX_ADMA_FLEXCAN2_RX 0x21 /* SODIMM 33 */ - >; - }; - - /* Colibri LCD Back-Light GPIO */ - pinctrl_gpio_bl_on: gpioblongrp { - fsl,pins =3D < - IMX8QXP_QSPI0A_DATA3_LSIO_GPIO3_IO12 0x60 /* SODIMM 71 */ - >; - }; - - pinctrl_gpiokeys: gpiokeysgrp { - fsl,pins =3D < - IMX8QXP_QSPI0A_DATA1_LSIO_GPIO3_IO10 0x06700041 /* SODIMM 45 */ - >; - }; - - pinctrl_hog0: hog0grp { - fsl,pins =3D < - IMX8QXP_ENET0_RGMII_TXD3_LSIO_GPIO5_IO02 0x06000020 /* SODIMM 65 */ - IMX8QXP_CSI_D07_CI_PI_D09 0x61 /* SODIMM 65 */ - IMX8QXP_QSPI0A_DATA2_LSIO_GPIO3_IO11 0x20 /* SODIMM 69 */ - IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26 0x20 /* SODIMM 79 */ - IMX8QXP_CSI_D02_CI_PI_D04 0x61 /* SODIMM 79 */ - IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03 0x06000020 /* SODIMM 85 */ - IMX8QXP_CSI_D06_CI_PI_D08 0x61 /* SODIMM 85 */ - IMX8QXP_QSPI0B_SCLK_LSIO_GPIO3_IO17 0x20 /* SODIMM 95 */ - IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27 0x20 /* SODIMM 97 */ - IMX8QXP_CSI_D03_CI_PI_D05 0x61 /* SODIMM 97 */ - IMX8QXP_QSPI0B_DATA0_LSIO_GPIO3_IO18 0x20 /* SODIMM 99 */ - IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28 0x20 /* SODIMM 101 */ - IMX8QXP_CSI_D00_CI_PI_D02 0x61 /* SODIMM 101 */ - IMX8QXP_SAI0_TXD_LSIO_GPIO0_IO25 0x20 /* SODIMM 103 */ - IMX8QXP_CSI_D01_CI_PI_D03 0x61 /* SODIMM 103 */ - IMX8QXP_QSPI0B_DATA1_LSIO_GPIO3_IO19 0x20 /* SODIMM 105 */ - IMX8QXP_QSPI0B_DATA2_LSIO_GPIO3_IO20 0x20 /* SODIMM 107 */ - IMX8QXP_USB_SS3_TC2_LSIO_GPIO4_IO05 0x20 /* SODIMM 127 */ - IMX8QXP_USB_SS3_TC3_LSIO_GPIO4_IO06 0x20 /* SODIMM 131 */ - IMX8QXP_USB_SS3_TC1_LSIO_GPIO4_IO04 0x20 /* SODIMM 133 */ - IMX8QXP_CSI_PCLK_LSIO_GPIO3_IO00 0x20 /* SODIMM 96 */ - IMX8QXP_QSPI0B_DATA3_LSIO_GPIO3_IO21 0x20 /* SODIMM 98 */ - IMX8QXP_SAI1_RXFS_LSIO_GPIO0_IO31 0x20 /* SODIMM 100 */ - IMX8QXP_QSPI0B_DQS_LSIO_GPIO3_IO22 0x20 /* SODIMM 102 */ - IMX8QXP_QSPI0B_SS0_B_LSIO_GPIO3_IO23 0x20 /* SODIMM 104 */ - IMX8QXP_QSPI0B_SS1_B_LSIO_GPIO3_IO24 0x20 /* SODIMM 106 */ - >; - }; - - pinctrl_hog1: hog1grp { - fsl,pins =3D < - IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01 0x20 /* SODIMM 75 */ - IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16 0x20 /* SODIMM 93 */ - >; - }; - - /* - * This pin is used in the SCFW as a UART. Using it from - * Linux would require rewritting the SCFW board file. - */ - pinctrl_hog_scfw: hogscfwgrp { - fsl,pins =3D < - IMX8QXP_SCU_GPIO0_00_LSIO_GPIO2_IO03 0x20 /* SODIMM 144 */ - >; - }; - - /* On Module I2C */ - pinctrl_i2c0: i2c0grp { - fsl,pins =3D < - IMX8QXP_MIPI_CSI0_GPIO0_00_ADMA_I2C0_SCL 0x06000021 - IMX8QXP_MIPI_CSI0_GPIO0_01_ADMA_I2C0_SDA 0x06000021 - >; - }; - - /* MIPI DSI I2C accessible on SODIMM (X1) and FFC (X2) */ - pinctrl_i2c0_mipi_lvds0: i2c0mipilvds0grp { - fsl,pins =3D < - IMX8QXP_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc6000020 /* SODIMM 140 = */ - IMX8QXP_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc6000020 /* SODIMM 142 = */ - >; - }; - - /* MIPI CSI I2C accessible on SODIMM (X1) and FFC (X3) */ - pinctrl_i2c0_mipi_lvds1: i2c0mipilvds1grp { - fsl,pins =3D < - IMX8QXP_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc6000020 /* SODIMM 186 = */ - IMX8QXP_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc6000020 /* SODIMM 188 = */ - >; - }; - - /* Colibri I2C */ - pinctrl_i2c1: i2c1grp { - fsl,pins =3D < - IMX8QXP_MIPI_DSI0_GPIO0_00_ADMA_I2C1_SCL 0x06000021 /* SODIMM 196 */ - IMX8QXP_MIPI_DSI0_GPIO0_01_ADMA_I2C1_SDA 0x06000021 /* SODIMM 194 */ - >; - }; - - /* Colibri Parallel RGB LCD Interface */ - pinctrl_lcdif: lcdifgrp { - fsl,pins =3D < - IMX8QXP_MCLK_OUT0_ADMA_LCDIF_CLK 0x60 /* SODIMM 56 */ - IMX8QXP_SPI3_CS0_ADMA_LCDIF_HSYNC 0x60 /* SODIMM 68 */ - IMX8QXP_MCLK_IN0_ADMA_LCDIF_VSYNC 0x60 /* SODIMM 82 */ - IMX8QXP_MCLK_IN1_ADMA_LCDIF_EN 0x60 /* SODIMM 44 */ - IMX8QXP_USDHC1_RESET_B_LSIO_GPIO4_IO19 0x60 /* SODIMM 44 */ - IMX8QXP_ESAI0_FSR_ADMA_LCDIF_D00 0x60 /* SODIMM 76 */ - IMX8QXP_USDHC1_WP_LSIO_GPIO4_IO21 0x60 /* SODIMM 76 */ - IMX8QXP_ESAI0_FST_ADMA_LCDIF_D01 0x60 /* SODIMM 70 */ - IMX8QXP_ESAI0_SCKR_ADMA_LCDIF_D02 0x60 /* SODIMM 60 */ - IMX8QXP_ESAI0_SCKT_ADMA_LCDIF_D03 0x60 /* SODIMM 58 */ - IMX8QXP_ESAI0_TX0_ADMA_LCDIF_D04 0x60 /* SODIMM 78 */ - IMX8QXP_ESAI0_TX1_ADMA_LCDIF_D05 0x60 /* SODIMM 72 */ - IMX8QXP_ESAI0_TX2_RX3_ADMA_LCDIF_D06 0x60 /* SODIMM 80 */ - IMX8QXP_ESAI0_TX3_RX2_ADMA_LCDIF_D07 0x60 /* SODIMM 46 */ - IMX8QXP_ESAI0_TX4_RX1_ADMA_LCDIF_D08 0x60 /* SODIMM 62 */ - IMX8QXP_ESAI0_TX5_RX0_ADMA_LCDIF_D09 0x60 /* SODIMM 48 */ - IMX8QXP_SPDIF0_RX_ADMA_LCDIF_D10 0x60 /* SODIMM 74 */ - IMX8QXP_SPDIF0_TX_ADMA_LCDIF_D11 0x60 /* SODIMM 50 */ - IMX8QXP_SPDIF0_EXT_CLK_ADMA_LCDIF_D12 0x60 /* SODIMM 52 */ - IMX8QXP_SPI3_SCK_ADMA_LCDIF_D13 0x60 /* SODIMM 54 */ - IMX8QXP_SPI3_SDO_ADMA_LCDIF_D14 0x60 /* SODIMM 66 */ - IMX8QXP_SPI3_SDI_ADMA_LCDIF_D15 0x60 /* SODIMM 64 */ - IMX8QXP_SPI3_CS1_ADMA_LCDIF_D16 0x60 /* SODIMM 57 */ - IMX8QXP_ENET0_RGMII_TXD2_LSIO_GPIO5_IO01 0x60 /* SODIMM 57 */ - IMX8QXP_UART1_CTS_B_ADMA_LCDIF_D17 0x60 /* SODIMM 61 */ - >; - }; - - /* Colibri SPI */ - pinctrl_lpspi2: lpspi2grp { - fsl,pins =3D < - IMX8QXP_SPI2_CS0_LSIO_GPIO1_IO00 0x21 /* SODIMM 86 */ - IMX8QXP_SPI2_SDO_ADMA_SPI2_SDO 0x06000040 /* SODIMM 92 */ - IMX8QXP_SPI2_SDI_ADMA_SPI2_SDI 0x06000040 /* SODIMM 90 */ - IMX8QXP_SPI2_SCK_ADMA_SPI2_SCK 0x06000040 /* SODIMM 88 */ - >; - }; - - /* Colibri UART_B */ - pinctrl_lpuart0: lpuart0grp { - fsl,pins =3D < - IMX8QXP_UART0_RX_ADMA_UART0_RX 0x06000020 /* SODIMM 36 */ - IMX8QXP_UART0_TX_ADMA_UART0_TX 0x06000020 /* SODIMM 38 */ - IMX8QXP_FLEXCAN0_RX_ADMA_UART0_RTS_B 0x06000020 /* SODIMM 34 */ - IMX8QXP_FLEXCAN0_TX_ADMA_UART0_CTS_B 0x06000020 /* SODIMM 32 */ - >; - }; - - /* Colibri UART_C */ - pinctrl_lpuart2: lpuart2grp { - fsl,pins =3D < - IMX8QXP_UART2_RX_ADMA_UART2_RX 0x06000020 /* SODIMM 19 */ - IMX8QXP_UART2_TX_ADMA_UART2_TX 0x06000020 /* SODIMM 21 */ - >; - }; - - /* Colibri UART_A */ - pinctrl_lpuart3: lpuart3grp { - fsl,pins =3D < - IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX 0x06000020 /* SODIMM 33 */ - IMX8QXP_FLEXCAN2_TX_ADMA_UART3_TX 0x06000020 /* SODIMM 35 */ - >; - }; - - /* Colibri UART_A Control */ - pinctrl_lpuart3_ctrl: lpuart3ctrlgrp { - fsl,pins =3D < - IMX8QXP_MIPI_DSI1_GPIO0_01_LSIO_GPIO2_IO00 0x20 /* SODIMM 23 */ - IMX8QXP_SAI1_RXD_LSIO_GPIO0_IO29 0x20 /* SODIMM 25 */ - IMX8QXP_SAI1_RXC_LSIO_GPIO0_IO30 0x20 /* SODIMM 27 */ - IMX8QXP_CSI_RESET_LSIO_GPIO3_IO03 0x20 /* SODIMM 29 */ - IMX8QXP_USDHC1_CD_B_LSIO_GPIO4_IO22 0x20 /* SODIMM 31 */ - IMX8QXP_CSI_EN_LSIO_GPIO3_IO02 0x20 /* SODIMM 37 */ - >; - }; - - /* On module wifi module */ - pinctrl_pcieb: pciebgrp { - fsl,pins =3D < - IMX8QXP_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01 0x04000061 /* SODIMM 178 */ - IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 0x04000061 /* SODIMM 94 */ - IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 0x60 /* SODIMM 81 */ - >; - }; - - /* Colibri PWM_A */ - pinctrl_pwm_a: pwmagrp { - /* both pins are connected together, reserve the unused CSI_D05 */ - fsl,pins =3D < - IMX8QXP_CSI_D05_CI_PI_D07 0x61 /* SODIMM 59 */ - IMX8QXP_SPI0_CS1_ADMA_LCD_PWM0_OUT 0x60 /* SODIMM 59 */ - >; - }; - - /* Colibri PWM_B */ - pinctrl_pwm_b: pwmbgrp { - fsl,pins =3D < - IMX8QXP_UART1_TX_LSIO_PWM0_OUT 0x60 /* SODIMM 28 */ - >; - }; - - /* Colibri PWM_C */ - pinctrl_pwm_c: pwmcgrp { - fsl,pins =3D < - IMX8QXP_UART1_RX_LSIO_PWM1_OUT 0x60 /* SODIMM 30 */ - >; - }; - - /* Colibri PWM_D */ - pinctrl_pwm_d: pwmdgrp { - /* both pins are connected together, reserve the unused CSI_D04 */ - fsl,pins =3D < - IMX8QXP_CSI_D04_CI_PI_D06 0x61 /* SODIMM 67 */ - IMX8QXP_UART1_RTS_B_LSIO_PWM2_OUT 0x60 /* SODIMM 67 */ - >; - }; - - /* On-module I2S */ - pinctrl_sai0: sai0grp { - fsl,pins =3D < - IMX8QXP_SPI0_SDI_ADMA_SAI0_TXD 0x06000040 - IMX8QXP_SPI0_CS0_ADMA_SAI0_RXD 0x06000040 - IMX8QXP_SPI0_SCK_ADMA_SAI0_TXC 0x06000040 - IMX8QXP_SPI0_SDO_ADMA_SAI0_TXFS 0x06000040 - >; - }; - - /* Colibri Audio Analogue Microphone GND */ - pinctrl_sgtl5000: sgtl5000grp { - fsl,pins =3D < - /* MIC GND EN */ - IMX8QXP_MIPI_CSI0_I2C0_SDA_LSIO_GPIO3_IO06 0x41 - >; - }; - - /* On-module SGTL5000 clock */ - pinctrl_sgtl5000_usb_clk: sgtl5000usbclkgrp { - fsl,pins =3D < - IMX8QXP_ADC_IN3_ADMA_ACM_MCLK_OUT0 0x21 - >; - }; - - /* On-module USB interrupt */ - pinctrl_usb3503a: usb3503agrp { - fsl,pins =3D < - IMX8QXP_MIPI_CSI0_MCLK_OUT_LSIO_GPIO3_IO04 0x61 - >; - }; - - /* Colibri USB Client Cable Detect */ - pinctrl_usbc_det: usbcdetgrp { - fsl,pins =3D < - IMX8QXP_ENET0_REFCLK_125M_25M_LSIO_GPIO5_IO09 0x06000040 /* SODIMM 137 = */ - >; - }; - - /* USB Host Power Enable */ - pinctrl_usbh1_reg: usbh1reggrp { - fsl,pins =3D < - IMX8QXP_USB_SS3_TC0_LSIO_GPIO4_IO03 0x06000040 /* SODIMM 129 */ - >; - }; - - /* On-module eMMC */ - pinctrl_usdhc1: usdhc1grp { - fsl,pins =3D < - IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 - IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21 - IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21 - IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21 - IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21 - IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21 - IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21 - IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21 - IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21 - IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21 - IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41 - IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21 - >; - }; - - pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { - fsl,pins =3D < - IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 - IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21 - IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21 - IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21 - IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21 - IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21 - IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21 - IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21 - IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21 - IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21 - IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41 - IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21 - >; - }; - - pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { - fsl,pins =3D < - IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 - IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21 - IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21 - IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21 - IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21 - IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21 - IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21 - IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21 - IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21 - IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21 - IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41 - IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21 - >; - }; - - /* Colibri SD/MMC Card Detect */ - pinctrl_usdhc2_gpio: usdhc2gpiogrp { - fsl,pins =3D < - IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09 0x06000021 /* SODIMM 43 */ - >; - }; - - pinctrl_usdhc2_gpio_sleep: usdhc2gpioslpgrp { - fsl,pins =3D < - IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09 0x60 /* SODIMM 43 */ - >; - }; - - /* Colibri SD/MMC Card */ - pinctrl_usdhc2: usdhc2grp { - fsl,pins =3D < - IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 47 */ - IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 190 */ - IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21 /* SODIMM 192 */ - IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21 /* SODIMM 49 */ - IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21 /* SODIMM 51 */ - IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21 /* SODIMM 53 */ - IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21 - >; - }; - - pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { - fsl,pins =3D < - IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 47 */ - IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 190 */ - IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21 /* SODIMM 192 */ - IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21 /* SODIMM 49 */ - IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21 /* SODIMM 51 */ - IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21 /* SODIMM 53 */ - IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21 - >; - }; - - pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { - fsl,pins =3D < - IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 47 */ - IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 190 */ - IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21 /* SODIMM 192 */ - IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21 /* SODIMM 49 */ - IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21 /* SODIMM 51 */ - IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21 /* SODIMM 53 */ - IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21 - >; - }; - - pinctrl_usdhc2_sleep: usdhc2slpgrp { - fsl,pins =3D < - IMX8QXP_USDHC1_CLK_LSIO_GPIO4_IO23 0x60 /* SODIMM 47 */ - IMX8QXP_USDHC1_CMD_LSIO_GPIO4_IO24 0x60 /* SODIMM 190 */ - IMX8QXP_USDHC1_DATA0_LSIO_GPIO4_IO25 0x60 /* SODIMM 192 */ - IMX8QXP_USDHC1_DATA1_LSIO_GPIO4_IO26 0x60 /* SODIMM 49 */ - IMX8QXP_USDHC1_DATA2_LSIO_GPIO4_IO27 0x60 /* SODIMM 51 */ - IMX8QXP_USDHC1_DATA3_LSIO_GPIO4_IO28 0x60 /* SODIMM 53 */ - IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21 - >; - }; - - pinctrl_wifi: wifigrp { - fsl,pins =3D < - IMX8QXP_SCU_BOOT_MODE3_SCU_DSC_RTC_CLOCK_OUTPUT_32K 0x20 - >; - }; }; diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtsi b/a= rch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi similarity index 100% rename from arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtsi rename to arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/= boot/dts/freescale/imx8x-colibri.dtsi new file mode 100644 index 000000000000..cb22bde19ea0 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi @@ -0,0 +1,593 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright 2019 Toradex + */ + +/ { + chosen { + stdout-path =3D &lpuart3; + }; + + reg_module_3v3: regulator-module-3v3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "+V3.3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; +}; + +/* On-module I2C */ +&i2c0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + clock-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i2c0>, <&pinctrl_sgtl5000_usb_clk>; + status =3D "okay"; + + /* Touch controller */ + touchscreen@2c { + compatible =3D "adi,ad7879-1"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_ad7879_int>; + reg =3D <0x2c>; + interrupt-parent =3D <&lsio_gpio3>; + interrupts =3D <5 IRQ_TYPE_EDGE_FALLING>; + touchscreen-max-pressure =3D <4096>; + adi,resistance-plate-x =3D <120>; + adi,first-conversion-delay =3D /bits/ 8 <3>; + adi,acquisition-time =3D /bits/ 8 <1>; + adi,median-filter-size =3D /bits/ 8 <2>; + adi,averaging =3D /bits/ 8 <1>; + adi,conversion-interval =3D /bits/ 8 <255>; + }; +}; + +/* Colibri I2C */ +&i2c1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + clock-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i2c1>; +}; + +/* Colibri UART_B */ +&lpuart0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lpuart0>; +}; + +/* Colibri UART_C */ +&lpuart2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lpuart2>; +}; + +/* Colibri UART_A */ +&lpuart3 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lpuart3>, <&pinctrl_lpuart3_ctrl>; +}; + +/* Colibri FastEthernet */ +&fec1 { + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&pinctrl_fec1>; + pinctrl-1 =3D <&pinctrl_fec1_sleep>; + phy-mode =3D "rmii"; + phy-handle =3D <ðphy0>; + fsl,magic-packet; + + mdio { + #address-cells =3D <1>; + #size-cells =3D <0>; + + ethphy0: ethernet-phy@2 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + max-speed =3D <100>; + reg =3D <2>; + }; + }; +}; + +/* On-module eMMC */ +&usdhc1 { + bus-width =3D <8>; + non-removable; + no-sd; + no-sdio; + pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; + pinctrl-0 =3D <&pinctrl_usdhc1>; + pinctrl-1 =3D <&pinctrl_usdhc1_100mhz>; + pinctrl-2 =3D <&pinctrl_usdhc1_200mhz>; + status =3D "okay"; +}; + +/* Colibri SD/MMC Card */ +&usdhc2 { + bus-width =3D <4>; + cd-gpios =3D <&lsio_gpio3 9 GPIO_ACTIVE_LOW>; + vmmc-supply =3D <®_module_3v3>; + pinctrl-names =3D "default", "state_100mhz", "state_200mhz", "sleep"; + pinctrl-0 =3D <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-1 =3D <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-2 =3D <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-3 =3D <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>; + disable-wp; +}; + +&iomuxc { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>; + + /* On-module touch pen-down interrupt */ + pinctrl_ad7879_int: ad7879intgrp { + fsl,pins =3D < + IMX8QXP_MIPI_CSI0_I2C0_SCL_LSIO_GPIO3_IO05 0x21 + >; + }; + + /* Colibri Analogue Inputs */ + pinctrl_adc0: adc0grp { + fsl,pins =3D < + IMX8QXP_ADC_IN0_ADMA_ADC_IN0 0x60 /* SODIMM 8 */ + IMX8QXP_ADC_IN1_ADMA_ADC_IN1 0x60 /* SODIMM 6 */ + IMX8QXP_ADC_IN4_ADMA_ADC_IN4 0x60 /* SODIMM 4 */ + IMX8QXP_ADC_IN5_ADMA_ADC_IN5 0x60 /* SODIMM 2 */ + >; + }; + + pinctrl_can_int: canintgrp { + fsl,pins =3D < + IMX8QXP_QSPI0A_DQS_LSIO_GPIO3_IO13 0x40 /* SODIMM 73 */ + >; + }; + + pinctrl_csi_ctl: csictlgrp { + fsl,pins =3D < + IMX8QXP_QSPI0A_SS0_B_LSIO_GPIO3_IO14 0x20 /* SODIMM 77 */ + IMX8QXP_QSPI0A_SS1_B_LSIO_GPIO3_IO15 0x20 /* SODIMM 89 */ + >; + }; + + pinctrl_ext_io0: extio0grp { + fsl,pins =3D < + IMX8QXP_ENET0_RGMII_RXD3_LSIO_GPIO5_IO08 0x06000040 /* SODIMM 135 */ + >; + }; + + /* Colibri Ethernet: On-module 100Mbps PHY Micrel KSZ8041 */ + pinctrl_fec1: fec1grp { + fsl,pins =3D < + IMX8QXP_ENET0_MDC_CONN_ENET0_MDC 0x06000020 + IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020 + IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x61 + IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RCLK50M_OUT 0x06000061 + IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x61 + IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x61 + IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x61 + IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x61 + IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x61 + IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RMII_RX_ER 0x61 + >; + }; + + pinctrl_fec1_sleep: fec1slpgrp { + fsl,pins =3D < + IMX8QXP_ENET0_MDC_LSIO_GPIO5_IO11 0x06000041 + IMX8QXP_ENET0_MDIO_LSIO_GPIO5_IO10 0x06000041 + IMX8QXP_ENET0_RGMII_TX_CTL_LSIO_GPIO4_IO30 0x41 + IMX8QXP_ENET0_RGMII_TXC_LSIO_GPIO4_IO29 0x41 + IMX8QXP_ENET0_RGMII_TXD0_LSIO_GPIO4_IO31 0x41 + IMX8QXP_ENET0_RGMII_TXD1_LSIO_GPIO5_IO00 0x41 + IMX8QXP_ENET0_RGMII_RX_CTL_LSIO_GPIO5_IO04 0x41 + IMX8QXP_ENET0_RGMII_RXD0_LSIO_GPIO5_IO05 0x41 + IMX8QXP_ENET0_RGMII_RXD1_LSIO_GPIO5_IO06 0x41 + IMX8QXP_ENET0_RGMII_RXD2_LSIO_GPIO5_IO07 0x41 + >; + }; + + /* Colibri optional CAN on UART_B RTS/CTS */ + pinctrl_flexcan1: flexcan0grp { + fsl,pins =3D < + IMX8QXP_FLEXCAN0_TX_ADMA_FLEXCAN0_TX 0x21 /* SODIMM 32 */ + IMX8QXP_FLEXCAN0_RX_ADMA_FLEXCAN0_RX 0x21 /* SODIMM 34 */ + >; + }; + + /* Colibri optional CAN on PS2 */ + pinctrl_flexcan2: flexcan1grp { + fsl,pins =3D < + IMX8QXP_FLEXCAN1_TX_ADMA_FLEXCAN1_TX 0x21 /* SODIMM 55 */ + IMX8QXP_FLEXCAN1_RX_ADMA_FLEXCAN1_RX 0x21 /* SODIMM 63 */ + >; + }; + + /* Colibri optional CAN on UART_A TXD/RXD */ + pinctrl_flexcan3: flexcan2grp { + fsl,pins =3D < + IMX8QXP_FLEXCAN2_TX_ADMA_FLEXCAN2_TX 0x21 /* SODIMM 35 */ + IMX8QXP_FLEXCAN2_RX_ADMA_FLEXCAN2_RX 0x21 /* SODIMM 33 */ + >; + }; + + /* Colibri LCD Back-Light GPIO */ + pinctrl_gpio_bl_on: gpioblongrp { + fsl,pins =3D < + IMX8QXP_QSPI0A_DATA3_LSIO_GPIO3_IO12 0x60 /* SODIMM 71 */ + >; + }; + + pinctrl_gpiokeys: gpiokeysgrp { + fsl,pins =3D < + IMX8QXP_QSPI0A_DATA1_LSIO_GPIO3_IO10 0x06700041 /* SODIMM 45 */ + >; + }; + + pinctrl_hog0: hog0grp { + fsl,pins =3D < + IMX8QXP_ENET0_RGMII_TXD3_LSIO_GPIO5_IO02 0x06000020 /* SODIMM 65 */ + IMX8QXP_CSI_D07_CI_PI_D09 0x61 /* SODIMM 65 */ + IMX8QXP_QSPI0A_DATA2_LSIO_GPIO3_IO11 0x20 /* SODIMM 69 */ + IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26 0x20 /* SODIMM 79 */ + IMX8QXP_CSI_D02_CI_PI_D04 0x61 /* SODIMM 79 */ + IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03 0x06000020 /* SODIMM 85 */ + IMX8QXP_CSI_D06_CI_PI_D08 0x61 /* SODIMM 85 */ + IMX8QXP_QSPI0B_SCLK_LSIO_GPIO3_IO17 0x20 /* SODIMM 95 */ + IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27 0x20 /* SODIMM 97 */ + IMX8QXP_CSI_D03_CI_PI_D05 0x61 /* SODIMM 97 */ + IMX8QXP_QSPI0B_DATA0_LSIO_GPIO3_IO18 0x20 /* SODIMM 99 */ + IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28 0x20 /* SODIMM 101 */ + IMX8QXP_CSI_D00_CI_PI_D02 0x61 /* SODIMM 101 */ + IMX8QXP_SAI0_TXD_LSIO_GPIO0_IO25 0x20 /* SODIMM 103 */ + IMX8QXP_CSI_D01_CI_PI_D03 0x61 /* SODIMM 103 */ + IMX8QXP_QSPI0B_DATA1_LSIO_GPIO3_IO19 0x20 /* SODIMM 105 */ + IMX8QXP_QSPI0B_DATA2_LSIO_GPIO3_IO20 0x20 /* SODIMM 107 */ + IMX8QXP_USB_SS3_TC2_LSIO_GPIO4_IO05 0x20 /* SODIMM 127 */ + IMX8QXP_USB_SS3_TC3_LSIO_GPIO4_IO06 0x20 /* SODIMM 131 */ + IMX8QXP_USB_SS3_TC1_LSIO_GPIO4_IO04 0x20 /* SODIMM 133 */ + IMX8QXP_CSI_PCLK_LSIO_GPIO3_IO00 0x20 /* SODIMM 96 */ + IMX8QXP_QSPI0B_DATA3_LSIO_GPIO3_IO21 0x20 /* SODIMM 98 */ + IMX8QXP_SAI1_RXFS_LSIO_GPIO0_IO31 0x20 /* SODIMM 100 */ + IMX8QXP_QSPI0B_DQS_LSIO_GPIO3_IO22 0x20 /* SODIMM 102 */ + IMX8QXP_QSPI0B_SS0_B_LSIO_GPIO3_IO23 0x20 /* SODIMM 104 */ + IMX8QXP_QSPI0B_SS1_B_LSIO_GPIO3_IO24 0x20 /* SODIMM 106 */ + >; + }; + + pinctrl_hog1: hog1grp { + fsl,pins =3D < + IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01 0x20 /* SODIMM 75 */ + IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16 0x20 /* SODIMM 93 */ + >; + }; + + /* + * This pin is used in the SCFW as a UART. Using it from + * Linux would require rewritting the SCFW board file. + */ + pinctrl_hog_scfw: hogscfwgrp { + fsl,pins =3D < + IMX8QXP_SCU_GPIO0_00_LSIO_GPIO2_IO03 0x20 /* SODIMM 144 */ + >; + }; + + /* On Module I2C */ + pinctrl_i2c0: i2c0grp { + fsl,pins =3D < + IMX8QXP_MIPI_CSI0_GPIO0_00_ADMA_I2C0_SCL 0x06000021 + IMX8QXP_MIPI_CSI0_GPIO0_01_ADMA_I2C0_SDA 0x06000021 + >; + }; + + /* MIPI DSI I2C accessible on SODIMM (X1) and FFC (X2) */ + pinctrl_i2c0_mipi_lvds0: i2c0mipilvds0grp { + fsl,pins =3D < + IMX8QXP_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc6000020 /* SODIMM 140 = */ + IMX8QXP_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc6000020 /* SODIMM 142 = */ + >; + }; + + /* MIPI CSI I2C accessible on SODIMM (X1) and FFC (X3) */ + pinctrl_i2c0_mipi_lvds1: i2c0mipilvds1grp { + fsl,pins =3D < + IMX8QXP_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc6000020 /* SODIMM 186 = */ + IMX8QXP_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc6000020 /* SODIMM 188 = */ + >; + }; + + /* Colibri I2C */ + pinctrl_i2c1: i2c1grp { + fsl,pins =3D < + IMX8QXP_MIPI_DSI0_GPIO0_00_ADMA_I2C1_SCL 0x06000021 /* SODIMM 196 */ + IMX8QXP_MIPI_DSI0_GPIO0_01_ADMA_I2C1_SDA 0x06000021 /* SODIMM 194 */ + >; + }; + + /* Colibri Parallel RGB LCD Interface */ + pinctrl_lcdif: lcdifgrp { + fsl,pins =3D < + IMX8QXP_MCLK_OUT0_ADMA_LCDIF_CLK 0x60 /* SODIMM 56 */ + IMX8QXP_SPI3_CS0_ADMA_LCDIF_HSYNC 0x60 /* SODIMM 68 */ + IMX8QXP_MCLK_IN0_ADMA_LCDIF_VSYNC 0x60 /* SODIMM 82 */ + IMX8QXP_MCLK_IN1_ADMA_LCDIF_EN 0x60 /* SODIMM 44 */ + IMX8QXP_USDHC1_RESET_B_LSIO_GPIO4_IO19 0x60 /* SODIMM 44 */ + IMX8QXP_ESAI0_FSR_ADMA_LCDIF_D00 0x60 /* SODIMM 76 */ + IMX8QXP_USDHC1_WP_LSIO_GPIO4_IO21 0x60 /* SODIMM 76 */ + IMX8QXP_ESAI0_FST_ADMA_LCDIF_D01 0x60 /* SODIMM 70 */ + IMX8QXP_ESAI0_SCKR_ADMA_LCDIF_D02 0x60 /* SODIMM 60 */ + IMX8QXP_ESAI0_SCKT_ADMA_LCDIF_D03 0x60 /* SODIMM 58 */ + IMX8QXP_ESAI0_TX0_ADMA_LCDIF_D04 0x60 /* SODIMM 78 */ + IMX8QXP_ESAI0_TX1_ADMA_LCDIF_D05 0x60 /* SODIMM 72 */ + IMX8QXP_ESAI0_TX2_RX3_ADMA_LCDIF_D06 0x60 /* SODIMM 80 */ + IMX8QXP_ESAI0_TX3_RX2_ADMA_LCDIF_D07 0x60 /* SODIMM 46 */ + IMX8QXP_ESAI0_TX4_RX1_ADMA_LCDIF_D08 0x60 /* SODIMM 62 */ + IMX8QXP_ESAI0_TX5_RX0_ADMA_LCDIF_D09 0x60 /* SODIMM 48 */ + IMX8QXP_SPDIF0_RX_ADMA_LCDIF_D10 0x60 /* SODIMM 74 */ + IMX8QXP_SPDIF0_TX_ADMA_LCDIF_D11 0x60 /* SODIMM 50 */ + IMX8QXP_SPDIF0_EXT_CLK_ADMA_LCDIF_D12 0x60 /* SODIMM 52 */ + IMX8QXP_SPI3_SCK_ADMA_LCDIF_D13 0x60 /* SODIMM 54 */ + IMX8QXP_SPI3_SDO_ADMA_LCDIF_D14 0x60 /* SODIMM 66 */ + IMX8QXP_SPI3_SDI_ADMA_LCDIF_D15 0x60 /* SODIMM 64 */ + IMX8QXP_SPI3_CS1_ADMA_LCDIF_D16 0x60 /* SODIMM 57 */ + IMX8QXP_ENET0_RGMII_TXD2_LSIO_GPIO5_IO01 0x60 /* SODIMM 57 */ + IMX8QXP_UART1_CTS_B_ADMA_LCDIF_D17 0x60 /* SODIMM 61 */ + >; + }; + + /* Colibri SPI */ + pinctrl_lpspi2: lpspi2grp { + fsl,pins =3D < + IMX8QXP_SPI2_CS0_LSIO_GPIO1_IO00 0x21 /* SODIMM 86 */ + IMX8QXP_SPI2_SDO_ADMA_SPI2_SDO 0x06000040 /* SODIMM 92 */ + IMX8QXP_SPI2_SDI_ADMA_SPI2_SDI 0x06000040 /* SODIMM 90 */ + IMX8QXP_SPI2_SCK_ADMA_SPI2_SCK 0x06000040 /* SODIMM 88 */ + >; + }; + + /* Colibri UART_B */ + pinctrl_lpuart0: lpuart0grp { + fsl,pins =3D < + IMX8QXP_UART0_RX_ADMA_UART0_RX 0x06000020 /* SODIMM 36 */ + IMX8QXP_UART0_TX_ADMA_UART0_TX 0x06000020 /* SODIMM 38 */ + IMX8QXP_FLEXCAN0_RX_ADMA_UART0_RTS_B 0x06000020 /* SODIMM 34 */ + IMX8QXP_FLEXCAN0_TX_ADMA_UART0_CTS_B 0x06000020 /* SODIMM 32 */ + >; + }; + + /* Colibri UART_C */ + pinctrl_lpuart2: lpuart2grp { + fsl,pins =3D < + IMX8QXP_UART2_RX_ADMA_UART2_RX 0x06000020 /* SODIMM 19 */ + IMX8QXP_UART2_TX_ADMA_UART2_TX 0x06000020 /* SODIMM 21 */ + >; + }; + + /* Colibri UART_A */ + pinctrl_lpuart3: lpuart3grp { + fsl,pins =3D < + IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX 0x06000020 /* SODIMM 33 */ + IMX8QXP_FLEXCAN2_TX_ADMA_UART3_TX 0x06000020 /* SODIMM 35 */ + >; + }; + + /* Colibri UART_A Control */ + pinctrl_lpuart3_ctrl: lpuart3ctrlgrp { + fsl,pins =3D < + IMX8QXP_MIPI_DSI1_GPIO0_01_LSIO_GPIO2_IO00 0x20 /* SODIMM 23 */ + IMX8QXP_SAI1_RXD_LSIO_GPIO0_IO29 0x20 /* SODIMM 25 */ + IMX8QXP_SAI1_RXC_LSIO_GPIO0_IO30 0x20 /* SODIMM 27 */ + IMX8QXP_CSI_RESET_LSIO_GPIO3_IO03 0x20 /* SODIMM 29 */ + IMX8QXP_USDHC1_CD_B_LSIO_GPIO4_IO22 0x20 /* SODIMM 31 */ + IMX8QXP_CSI_EN_LSIO_GPIO3_IO02 0x20 /* SODIMM 37 */ + >; + }; + + /* On module wifi module */ + pinctrl_pcieb: pciebgrp { + fsl,pins =3D < + IMX8QXP_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01 0x04000061 /* SODIMM 178 */ + IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 0x04000061 /* SODIMM 94 */ + IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 0x60 /* SODIMM 81 */ + >; + }; + + /* Colibri PWM_A */ + pinctrl_pwm_a: pwmagrp { + /* both pins are connected together, reserve the unused CSI_D05 */ + fsl,pins =3D < + IMX8QXP_CSI_D05_CI_PI_D07 0x61 /* SODIMM 59 */ + IMX8QXP_SPI0_CS1_ADMA_LCD_PWM0_OUT 0x60 /* SODIMM 59 */ + >; + }; + + /* Colibri PWM_B */ + pinctrl_pwm_b: pwmbgrp { + fsl,pins =3D < + IMX8QXP_UART1_TX_LSIO_PWM0_OUT 0x60 /* SODIMM 28 */ + >; + }; + + /* Colibri PWM_C */ + pinctrl_pwm_c: pwmcgrp { + fsl,pins =3D < + IMX8QXP_UART1_RX_LSIO_PWM1_OUT 0x60 /* SODIMM 30 */ + >; + }; + + /* Colibri PWM_D */ + pinctrl_pwm_d: pwmdgrp { + /* both pins are connected together, reserve the unused CSI_D04 */ + fsl,pins =3D < + IMX8QXP_CSI_D04_CI_PI_D06 0x61 /* SODIMM 67 */ + IMX8QXP_UART1_RTS_B_LSIO_PWM2_OUT 0x60 /* SODIMM 67 */ + >; + }; + + /* On-module I2S */ + pinctrl_sai0: sai0grp { + fsl,pins =3D < + IMX8QXP_SPI0_SDI_ADMA_SAI0_TXD 0x06000040 + IMX8QXP_SPI0_CS0_ADMA_SAI0_RXD 0x06000040 + IMX8QXP_SPI0_SCK_ADMA_SAI0_TXC 0x06000040 + IMX8QXP_SPI0_SDO_ADMA_SAI0_TXFS 0x06000040 + >; + }; + + /* Colibri Audio Analogue Microphone GND */ + pinctrl_sgtl5000: sgtl5000grp { + fsl,pins =3D < + /* MIC GND EN */ + IMX8QXP_MIPI_CSI0_I2C0_SDA_LSIO_GPIO3_IO06 0x41 + >; + }; + + /* On-module SGTL5000 clock */ + pinctrl_sgtl5000_usb_clk: sgtl5000usbclkgrp { + fsl,pins =3D < + IMX8QXP_ADC_IN3_ADMA_ACM_MCLK_OUT0 0x21 + >; + }; + + /* On-module USB interrupt */ + pinctrl_usb3503a: usb3503agrp { + fsl,pins =3D < + IMX8QXP_MIPI_CSI0_MCLK_OUT_LSIO_GPIO3_IO04 0x61 + >; + }; + + /* Colibri USB Client Cable Detect */ + pinctrl_usbc_det: usbcdetgrp { + fsl,pins =3D < + IMX8QXP_ENET0_REFCLK_125M_25M_LSIO_GPIO5_IO09 0x06000040 /* SODIMM 137 = */ + >; + }; + + /* USB Host Power Enable */ + pinctrl_usbh1_reg: usbh1reggrp { + fsl,pins =3D < + IMX8QXP_USB_SS3_TC0_LSIO_GPIO4_IO03 0x06000040 /* SODIMM 129 */ + >; + }; + + /* On-module eMMC */ + pinctrl_usdhc1: usdhc1grp { + fsl,pins =3D < + IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 + IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21 + IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21 + IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21 + IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21 + IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21 + IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21 + IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21 + IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21 + IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21 + IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41 + IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21 + >; + }; + + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { + fsl,pins =3D < + IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 + IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21 + IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21 + IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21 + IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21 + IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21 + IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21 + IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21 + IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21 + IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21 + IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41 + IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21 + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { + fsl,pins =3D < + IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 + IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21 + IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21 + IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21 + IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21 + IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21 + IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21 + IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21 + IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21 + IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21 + IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41 + IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21 + >; + }; + + /* Colibri SD/MMC Card Detect */ + pinctrl_usdhc2_gpio: usdhc2gpiogrp { + fsl,pins =3D < + IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09 0x06000021 /* SODIMM 43 */ + >; + }; + + pinctrl_usdhc2_gpio_sleep: usdhc2gpioslpgrp { + fsl,pins =3D < + IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09 0x60 /* SODIMM 43 */ + >; + }; + + /* Colibri SD/MMC Card */ + pinctrl_usdhc2: usdhc2grp { + fsl,pins =3D < + IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 47 */ + IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 190 */ + IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21 /* SODIMM 192 */ + IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21 /* SODIMM 49 */ + IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21 /* SODIMM 51 */ + IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21 /* SODIMM 53 */ + IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21 + >; + }; + + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { + fsl,pins =3D < + IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 47 */ + IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 190 */ + IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21 /* SODIMM 192 */ + IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21 /* SODIMM 49 */ + IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21 /* SODIMM 51 */ + IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21 /* SODIMM 53 */ + IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21 + >; + }; + + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { + fsl,pins =3D < + IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 47 */ + IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 190 */ + IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21 /* SODIMM 192 */ + IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21 /* SODIMM 49 */ + IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21 /* SODIMM 51 */ + IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21 /* SODIMM 53 */ + IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21 + >; + }; + + pinctrl_usdhc2_sleep: usdhc2slpgrp { + fsl,pins =3D < + IMX8QXP_USDHC1_CLK_LSIO_GPIO4_IO23 0x60 /* SODIMM 47 */ + IMX8QXP_USDHC1_CMD_LSIO_GPIO4_IO24 0x60 /* SODIMM 190 */ + IMX8QXP_USDHC1_DATA0_LSIO_GPIO4_IO25 0x60 /* SODIMM 192 */ + IMX8QXP_USDHC1_DATA1_LSIO_GPIO4_IO26 0x60 /* SODIMM 49 */ + IMX8QXP_USDHC1_DATA2_LSIO_GPIO4_IO27 0x60 /* SODIMM 51 */ + IMX8QXP_USDHC1_DATA3_LSIO_GPIO4_IO28 0x60 /* SODIMM 53 */ + IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21 + >; + }; + + pinctrl_wifi: wifigrp { + fsl,pins =3D < + IMX8QXP_SCU_BOOT_MODE3_SCU_DSC_RTC_CLOCK_OUTPUT_32K 0x20 + >; + }; +}; --=20 2.39.2 From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C49E2C678D5 for ; Wed, 8 Mar 2023 13:13:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231367AbjCHNNN (ORCPT ); Wed, 8 Mar 2023 08:13:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59930 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229911AbjCHNMr (ORCPT ); Wed, 8 Mar 2023 08:12:47 -0500 Received: from smtp-bc0c.mail.infomaniak.ch (smtp-bc0c.mail.infomaniak.ch [IPv6:2001:1600:4:17::bc0c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9267FC80A5 for ; Wed, 8 Mar 2023 05:09:59 -0800 (PST) Received: from smtp-2-0000.mail.infomaniak.ch (unknown [10.5.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4PWsg73Dg6zMqmg2; Wed, 8 Mar 2023 13:53:07 +0100 (CET) Received: from unknown by smtp-2-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4PWsg66tWNzMsl1Z; Wed, 8 Mar 2023 13:53:06 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1678279987; bh=AJfjC653Jh+9TbGw5zdKmIGiPJCuUDFIOTWapv8ZSss=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iyVb05gMc7VcmWvhujyZaVtEvYb6Sof7yTfqU2dgrgj7HpWeiooV29LLn1icT3rcc uODWyRP3iW5Jg0cXt06FlWkFg46OzuhHwf6ZhPCCfDs/m7XqjOi24xFlfjKtoSVIQb LJTQySuRRlEczcoZzjczHW/tzrxWUOPljc21GKe4= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , linux-kernel@vger.kernel.org Subject: [PATCH v1 02/25] arm64: dts: colibri-imx8x: Update spdx license Date: Wed, 8 Mar 2023 13:52:36 +0100 Message-Id: <20230308125300.58244-3-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker GPL-2.0+ is deprecated, update it to GPL-2.0-or-later. Signed-off-by: Philippe Schenker --- arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dts | 2 +- arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dts b/ar= ch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dts index 413a9e9d6c28..fe4597a6f7e0 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dts +++ b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* * Copyright 2019 Toradex */ diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi b/arch/arm6= 4/boot/dts/freescale/imx8qxp-colibri.dtsi index 1ffc42f4a4b3..0f1aa31dd3e5 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* * Copyright 2019 Toradex */ diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi b/arc= h/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi index 7c334b93db3b..dc0339b35a3c 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* * Copyright 2019 Toradex */ diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/= boot/dts/freescale/imx8x-colibri.dtsi index cb22bde19ea0..12056b77d22e 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* * Copyright 2019 Toradex */ --=20 2.39.2 From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E7D88C678D5 for ; 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bh=0KAwqvIgg9/0Mq+uUMxM4YRpUOrpWCRDq7xH7wNe5sA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OV3MhJa0rPPLMguGAZU2jGj//1aWfyEX69f9xxQAZXV9lLSb7Rlg+n8ZlEaiaLwtH bQVFrxiimJeqp8DQEt3qODRaZRVUtiERLKh860NOa5tsfQ7EMeHHkfJ7qH5GIJ3bxP bExMTK6nnkdVLhCeceq9CwMsCndZZUeA9YU4GL18= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , linux-kernel@vger.kernel.org Subject: [PATCH v1 03/25] arm64: dts: colibri-imx8x: Sort properties Date: Wed, 8 Mar 2023 13:52:37 +0100 Message-Id: <20230308125300.58244-4-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker Sort properties according to the following order and inside these alphabetically. 1. compatible 2. reg 3. standard properties 4. specific properties 5. status Signed-off-by: Philippe Schenker --- .../boot/dts/freescale/imx8x-colibri.dtsi | 142 +++++++++--------- 1 file changed, 71 insertions(+), 71 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/= boot/dts/freescale/imx8x-colibri.dtsi index 12056b77d22e..6f86a83bc957 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi @@ -10,9 +10,9 @@ chosen { =20 reg_module_3v3: regulator-module-3v3 { compatible =3D "regulator-fixed"; - regulator-name =3D "+V3.3"; - regulator-min-microvolt =3D <3300000>; regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <3300000>; + regulator-name =3D "+V3.3"; }; }; =20 @@ -20,26 +20,26 @@ reg_module_3v3: regulator-module-3v3 { &i2c0 { #address-cells =3D <1>; #size-cells =3D <0>; - clock-frequency =3D <100000>; - pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_i2c0>, <&pinctrl_sgtl5000_usb_clk>; + pinctrl-names =3D "default"; + clock-frequency =3D <100000>; status =3D "okay"; =20 /* Touch controller */ touchscreen@2c { compatible =3D "adi,ad7879-1"; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_ad7879_int>; reg =3D <0x2c>; interrupt-parent =3D <&lsio_gpio3>; interrupts =3D <5 IRQ_TYPE_EDGE_FALLING>; - touchscreen-max-pressure =3D <4096>; - adi,resistance-plate-x =3D <120>; - adi,first-conversion-delay =3D /bits/ 8 <3>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_ad7879_int>; adi,acquisition-time =3D /bits/ 8 <1>; - adi,median-filter-size =3D /bits/ 8 <2>; adi,averaging =3D /bits/ 8 <1>; adi,conversion-interval =3D /bits/ 8 <255>; + adi,first-conversion-delay =3D /bits/ 8 <3>; + adi,median-filter-size =3D /bits/ 8 <2>; + adi,resistance-plate-x =3D <120>; + touchscreen-max-pressure =3D <4096>; }; }; =20 @@ -47,9 +47,9 @@ touchscreen@2c { &i2c1 { #address-cells =3D <1>; #size-cells =3D <0>; - clock-frequency =3D <100000>; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_i2c1>; + clock-frequency =3D <100000>; }; =20 /* Colibri UART_B */ @@ -75,9 +75,9 @@ &fec1 { pinctrl-names =3D "default", "sleep"; pinctrl-0 =3D <&pinctrl_fec1>; pinctrl-1 =3D <&pinctrl_fec1_sleep>; - phy-mode =3D "rmii"; - phy-handle =3D <ðphy0>; fsl,magic-packet; + phy-handle =3D <ðphy0>; + phy-mode =3D "rmii"; =20 mdio { #address-cells =3D <1>; @@ -85,36 +85,36 @@ mdio { =20 ethphy0: ethernet-phy@2 { compatible =3D "ethernet-phy-ieee802.3-c22"; - max-speed =3D <100>; reg =3D <2>; + max-speed =3D <100>; }; }; }; =20 /* On-module eMMC */ &usdhc1 { - bus-width =3D <8>; - non-removable; - no-sd; - no-sdio; pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; pinctrl-0 =3D <&pinctrl_usdhc1>; pinctrl-1 =3D <&pinctrl_usdhc1_100mhz>; pinctrl-2 =3D <&pinctrl_usdhc1_200mhz>; + bus-width =3D <8>; + no-sd; + no-sdio; + non-removable; status =3D "okay"; }; =20 /* Colibri SD/MMC Card */ &usdhc2 { - bus-width =3D <4>; - cd-gpios =3D <&lsio_gpio3 9 GPIO_ACTIVE_LOW>; - vmmc-supply =3D <®_module_3v3>; pinctrl-names =3D "default", "state_100mhz", "state_200mhz", "sleep"; pinctrl-0 =3D <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; pinctrl-1 =3D <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; pinctrl-2 =3D <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; pinctrl-3 =3D <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>; + bus-width =3D <4>; + cd-gpios =3D <&lsio_gpio3 9 GPIO_ACTIVE_LOW>; disable-wp; + vmmc-supply =3D <®_module_3v3>; }; =20 &iomuxc { @@ -162,14 +162,14 @@ pinctrl_fec1: fec1grp { fsl,pins =3D < IMX8QXP_ENET0_MDC_CONN_ENET0_MDC 0x06000020 IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020 - IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x61 - IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RCLK50M_OUT 0x06000061 - IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x61 - IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x61 IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x61 IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x61 IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x61 IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RMII_RX_ER 0x61 + IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x61 + IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RCLK50M_OUT 0x06000061 + IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x61 + IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x61 >; }; =20 @@ -177,38 +177,38 @@ pinctrl_fec1_sleep: fec1slpgrp { fsl,pins =3D < IMX8QXP_ENET0_MDC_LSIO_GPIO5_IO11 0x06000041 IMX8QXP_ENET0_MDIO_LSIO_GPIO5_IO10 0x06000041 - IMX8QXP_ENET0_RGMII_TX_CTL_LSIO_GPIO4_IO30 0x41 - IMX8QXP_ENET0_RGMII_TXC_LSIO_GPIO4_IO29 0x41 - IMX8QXP_ENET0_RGMII_TXD0_LSIO_GPIO4_IO31 0x41 - IMX8QXP_ENET0_RGMII_TXD1_LSIO_GPIO5_IO00 0x41 IMX8QXP_ENET0_RGMII_RX_CTL_LSIO_GPIO5_IO04 0x41 IMX8QXP_ENET0_RGMII_RXD0_LSIO_GPIO5_IO05 0x41 IMX8QXP_ENET0_RGMII_RXD1_LSIO_GPIO5_IO06 0x41 IMX8QXP_ENET0_RGMII_RXD2_LSIO_GPIO5_IO07 0x41 + IMX8QXP_ENET0_RGMII_TX_CTL_LSIO_GPIO4_IO30 0x41 + IMX8QXP_ENET0_RGMII_TXC_LSIO_GPIO4_IO29 0x41 + IMX8QXP_ENET0_RGMII_TXD0_LSIO_GPIO4_IO31 0x41 + IMX8QXP_ENET0_RGMII_TXD1_LSIO_GPIO5_IO00 0x41 >; }; =20 /* Colibri optional CAN on UART_B RTS/CTS */ pinctrl_flexcan1: flexcan0grp { fsl,pins =3D < - IMX8QXP_FLEXCAN0_TX_ADMA_FLEXCAN0_TX 0x21 /* SODIMM 32 */ IMX8QXP_FLEXCAN0_RX_ADMA_FLEXCAN0_RX 0x21 /* SODIMM 34 */ + IMX8QXP_FLEXCAN0_TX_ADMA_FLEXCAN0_TX 0x21 /* SODIMM 32 */ >; }; =20 /* Colibri optional CAN on PS2 */ pinctrl_flexcan2: flexcan1grp { fsl,pins =3D < - IMX8QXP_FLEXCAN1_TX_ADMA_FLEXCAN1_TX 0x21 /* SODIMM 55 */ IMX8QXP_FLEXCAN1_RX_ADMA_FLEXCAN1_RX 0x21 /* SODIMM 63 */ + IMX8QXP_FLEXCAN1_TX_ADMA_FLEXCAN1_TX 0x21 /* SODIMM 55 */ >; }; =20 /* Colibri optional CAN on UART_A TXD/RXD */ pinctrl_flexcan3: flexcan2grp { fsl,pins =3D < - IMX8QXP_FLEXCAN2_TX_ADMA_FLEXCAN2_TX 0x21 /* SODIMM 35 */ IMX8QXP_FLEXCAN2_RX_ADMA_FLEXCAN2_RX 0x21 /* SODIMM 33 */ + IMX8QXP_FLEXCAN2_TX_ADMA_FLEXCAN2_TX 0x21 /* SODIMM 35 */ >; }; =20 @@ -227,32 +227,32 @@ IMX8QXP_QSPI0A_DATA1_LSIO_GPIO3_IO10 0x06700041 /* S= ODIMM 45 */ =20 pinctrl_hog0: hog0grp { fsl,pins =3D < - IMX8QXP_ENET0_RGMII_TXD3_LSIO_GPIO5_IO02 0x06000020 /* SODIMM 65 */ - IMX8QXP_CSI_D07_CI_PI_D09 0x61 /* SODIMM 65 */ - IMX8QXP_QSPI0A_DATA2_LSIO_GPIO3_IO11 0x20 /* SODIMM 69 */ - IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26 0x20 /* SODIMM 79 */ + IMX8QXP_CSI_D00_CI_PI_D02 0x61 /* SODIMM 101 */ + IMX8QXP_CSI_D01_CI_PI_D03 0x61 /* SODIMM 103 */ IMX8QXP_CSI_D02_CI_PI_D04 0x61 /* SODIMM 79 */ - IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03 0x06000020 /* SODIMM 85 */ - IMX8QXP_CSI_D06_CI_PI_D08 0x61 /* SODIMM 85 */ - IMX8QXP_QSPI0B_SCLK_LSIO_GPIO3_IO17 0x20 /* SODIMM 95 */ - IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27 0x20 /* SODIMM 97 */ IMX8QXP_CSI_D03_CI_PI_D05 0x61 /* SODIMM 97 */ + IMX8QXP_CSI_D06_CI_PI_D08 0x61 /* SODIMM 85 */ + IMX8QXP_CSI_D07_CI_PI_D09 0x61 /* SODIMM 65 */ + IMX8QXP_CSI_PCLK_LSIO_GPIO3_IO00 0x20 /* SODIMM 96 */ + IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03 0x06000020 /* SODIMM 85 */ + IMX8QXP_ENET0_RGMII_TXD3_LSIO_GPIO5_IO02 0x06000020 /* SODIMM 65 */ + IMX8QXP_QSPI0A_DATA2_LSIO_GPIO3_IO11 0x20 /* SODIMM 69 */ IMX8QXP_QSPI0B_DATA0_LSIO_GPIO3_IO18 0x20 /* SODIMM 99 */ - IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28 0x20 /* SODIMM 101 */ - IMX8QXP_CSI_D00_CI_PI_D02 0x61 /* SODIMM 101 */ - IMX8QXP_SAI0_TXD_LSIO_GPIO0_IO25 0x20 /* SODIMM 103 */ - IMX8QXP_CSI_D01_CI_PI_D03 0x61 /* SODIMM 103 */ IMX8QXP_QSPI0B_DATA1_LSIO_GPIO3_IO19 0x20 /* SODIMM 105 */ IMX8QXP_QSPI0B_DATA2_LSIO_GPIO3_IO20 0x20 /* SODIMM 107 */ - IMX8QXP_USB_SS3_TC2_LSIO_GPIO4_IO05 0x20 /* SODIMM 127 */ - IMX8QXP_USB_SS3_TC3_LSIO_GPIO4_IO06 0x20 /* SODIMM 131 */ - IMX8QXP_USB_SS3_TC1_LSIO_GPIO4_IO04 0x20 /* SODIMM 133 */ - IMX8QXP_CSI_PCLK_LSIO_GPIO3_IO00 0x20 /* SODIMM 96 */ IMX8QXP_QSPI0B_DATA3_LSIO_GPIO3_IO21 0x20 /* SODIMM 98 */ - IMX8QXP_SAI1_RXFS_LSIO_GPIO0_IO31 0x20 /* SODIMM 100 */ IMX8QXP_QSPI0B_DQS_LSIO_GPIO3_IO22 0x20 /* SODIMM 102 */ + IMX8QXP_QSPI0B_SCLK_LSIO_GPIO3_IO17 0x20 /* SODIMM 95 */ IMX8QXP_QSPI0B_SS0_B_LSIO_GPIO3_IO23 0x20 /* SODIMM 104 */ IMX8QXP_QSPI0B_SS1_B_LSIO_GPIO3_IO24 0x20 /* SODIMM 106 */ + IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27 0x20 /* SODIMM 97 */ + IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26 0x20 /* SODIMM 79 */ + IMX8QXP_SAI0_TXD_LSIO_GPIO0_IO25 0x20 /* SODIMM 103 */ + IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28 0x20 /* SODIMM 101 */ + IMX8QXP_SAI1_RXFS_LSIO_GPIO0_IO31 0x20 /* SODIMM 100 */ + IMX8QXP_USB_SS3_TC1_LSIO_GPIO4_IO04 0x20 /* SODIMM 133 */ + IMX8QXP_USB_SS3_TC2_LSIO_GPIO4_IO05 0x20 /* SODIMM 127 */ + IMX8QXP_USB_SS3_TC3_LSIO_GPIO4_IO06 0x20 /* SODIMM 131 */ >; }; =20 @@ -308,13 +308,8 @@ IMX8QXP_MIPI_DSI0_GPIO0_01_ADMA_I2C1_SDA 0x06000021 /*= SODIMM 194 */ /* Colibri Parallel RGB LCD Interface */ pinctrl_lcdif: lcdifgrp { fsl,pins =3D < - IMX8QXP_MCLK_OUT0_ADMA_LCDIF_CLK 0x60 /* SODIMM 56 */ - IMX8QXP_SPI3_CS0_ADMA_LCDIF_HSYNC 0x60 /* SODIMM 68 */ - IMX8QXP_MCLK_IN0_ADMA_LCDIF_VSYNC 0x60 /* SODIMM 82 */ - IMX8QXP_MCLK_IN1_ADMA_LCDIF_EN 0x60 /* SODIMM 44 */ - IMX8QXP_USDHC1_RESET_B_LSIO_GPIO4_IO19 0x60 /* SODIMM 44 */ + IMX8QXP_ENET0_RGMII_TXD2_LSIO_GPIO5_IO01 0x60 /* SODIMM 57 */ IMX8QXP_ESAI0_FSR_ADMA_LCDIF_D00 0x60 /* SODIMM 76 */ - IMX8QXP_USDHC1_WP_LSIO_GPIO4_IO21 0x60 /* SODIMM 76 */ IMX8QXP_ESAI0_FST_ADMA_LCDIF_D01 0x60 /* SODIMM 70 */ IMX8QXP_ESAI0_SCKR_ADMA_LCDIF_D02 0x60 /* SODIMM 60 */ IMX8QXP_ESAI0_SCKT_ADMA_LCDIF_D03 0x60 /* SODIMM 58 */ @@ -324,15 +319,20 @@ IMX8QXP_ESAI0_TX2_RX3_ADMA_LCDIF_D06 0x60 /* SODIMM= 80 */ IMX8QXP_ESAI0_TX3_RX2_ADMA_LCDIF_D07 0x60 /* SODIMM 46 */ IMX8QXP_ESAI0_TX4_RX1_ADMA_LCDIF_D08 0x60 /* SODIMM 62 */ IMX8QXP_ESAI0_TX5_RX0_ADMA_LCDIF_D09 0x60 /* SODIMM 48 */ + IMX8QXP_MCLK_IN0_ADMA_LCDIF_VSYNC 0x60 /* SODIMM 82 */ + IMX8QXP_MCLK_IN1_ADMA_LCDIF_EN 0x60 /* SODIMM 44 */ + IMX8QXP_MCLK_OUT0_ADMA_LCDIF_CLK 0x60 /* SODIMM 56 */ + IMX8QXP_SPDIF0_EXT_CLK_ADMA_LCDIF_D12 0x60 /* SODIMM 52 */ IMX8QXP_SPDIF0_RX_ADMA_LCDIF_D10 0x60 /* SODIMM 74 */ IMX8QXP_SPDIF0_TX_ADMA_LCDIF_D11 0x60 /* SODIMM 50 */ - IMX8QXP_SPDIF0_EXT_CLK_ADMA_LCDIF_D12 0x60 /* SODIMM 52 */ + IMX8QXP_SPI3_CS0_ADMA_LCDIF_HSYNC 0x60 /* SODIMM 68 */ + IMX8QXP_SPI3_CS1_ADMA_LCDIF_D16 0x60 /* SODIMM 57 */ IMX8QXP_SPI3_SCK_ADMA_LCDIF_D13 0x60 /* SODIMM 54 */ - IMX8QXP_SPI3_SDO_ADMA_LCDIF_D14 0x60 /* SODIMM 66 */ IMX8QXP_SPI3_SDI_ADMA_LCDIF_D15 0x60 /* SODIMM 64 */ - IMX8QXP_SPI3_CS1_ADMA_LCDIF_D16 0x60 /* SODIMM 57 */ - IMX8QXP_ENET0_RGMII_TXD2_LSIO_GPIO5_IO01 0x60 /* SODIMM 57 */ + IMX8QXP_SPI3_SDO_ADMA_LCDIF_D14 0x60 /* SODIMM 66 */ IMX8QXP_UART1_CTS_B_ADMA_LCDIF_D17 0x60 /* SODIMM 61 */ + IMX8QXP_USDHC1_RESET_B_LSIO_GPIO4_IO19 0x60 /* SODIMM 44 */ + IMX8QXP_USDHC1_WP_LSIO_GPIO4_IO21 0x60 /* SODIMM 76 */ >; }; =20 @@ -340,19 +340,19 @@ IMX8QXP_UART1_CTS_B_ADMA_LCDIF_D17 0x60 /* SODIMM = 61 */ pinctrl_lpspi2: lpspi2grp { fsl,pins =3D < IMX8QXP_SPI2_CS0_LSIO_GPIO1_IO00 0x21 /* SODIMM 86 */ - IMX8QXP_SPI2_SDO_ADMA_SPI2_SDO 0x06000040 /* SODIMM 92 */ - IMX8QXP_SPI2_SDI_ADMA_SPI2_SDI 0x06000040 /* SODIMM 90 */ IMX8QXP_SPI2_SCK_ADMA_SPI2_SCK 0x06000040 /* SODIMM 88 */ + IMX8QXP_SPI2_SDI_ADMA_SPI2_SDI 0x06000040 /* SODIMM 90 */ + IMX8QXP_SPI2_SDO_ADMA_SPI2_SDO 0x06000040 /* SODIMM 92 */ >; }; =20 /* Colibri UART_B */ pinctrl_lpuart0: lpuart0grp { fsl,pins =3D < - IMX8QXP_UART0_RX_ADMA_UART0_RX 0x06000020 /* SODIMM 36 */ - IMX8QXP_UART0_TX_ADMA_UART0_TX 0x06000020 /* SODIMM 38 */ IMX8QXP_FLEXCAN0_RX_ADMA_UART0_RTS_B 0x06000020 /* SODIMM 34 */ IMX8QXP_FLEXCAN0_TX_ADMA_UART0_CTS_B 0x06000020 /* SODIMM 32 */ + IMX8QXP_UART0_RX_ADMA_UART0_RX 0x06000020 /* SODIMM 36 */ + IMX8QXP_UART0_TX_ADMA_UART0_TX 0x06000020 /* SODIMM 38 */ >; }; =20 @@ -375,12 +375,12 @@ IMX8QXP_FLEXCAN2_TX_ADMA_UART3_TX 0x06000020 /* SODI= MM 35 */ /* Colibri UART_A Control */ pinctrl_lpuart3_ctrl: lpuart3ctrlgrp { fsl,pins =3D < + IMX8QXP_CSI_EN_LSIO_GPIO3_IO02 0x20 /* SODIMM 37 */ + IMX8QXP_CSI_RESET_LSIO_GPIO3_IO03 0x20 /* SODIMM 29 */ IMX8QXP_MIPI_DSI1_GPIO0_01_LSIO_GPIO2_IO00 0x20 /* SODIMM 23 */ - IMX8QXP_SAI1_RXD_LSIO_GPIO0_IO29 0x20 /* SODIMM 25 */ IMX8QXP_SAI1_RXC_LSIO_GPIO0_IO30 0x20 /* SODIMM 27 */ - IMX8QXP_CSI_RESET_LSIO_GPIO3_IO03 0x20 /* SODIMM 29 */ + IMX8QXP_SAI1_RXD_LSIO_GPIO0_IO29 0x20 /* SODIMM 25 */ IMX8QXP_USDHC1_CD_B_LSIO_GPIO4_IO22 0x20 /* SODIMM 31 */ - IMX8QXP_CSI_EN_LSIO_GPIO3_IO02 0x20 /* SODIMM 37 */ >; }; =20 @@ -388,8 +388,8 @@ IMX8QXP_CSI_EN_LSIO_GPIO3_IO02 0x20 /* SODIMM 37 */ pinctrl_pcieb: pciebgrp { fsl,pins =3D < IMX8QXP_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01 0x04000061 /* SODIMM 178 */ - IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 0x04000061 /* SODIMM 94 */ IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 0x60 /* SODIMM 81 */ + IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 0x04000061 /* SODIMM 94 */ >; }; =20 @@ -428,9 +428,9 @@ IMX8QXP_UART1_RTS_B_LSIO_PWM2_OUT 0x60 /* SODIMM 67 = */ /* On-module I2S */ pinctrl_sai0: sai0grp { fsl,pins =3D < - IMX8QXP_SPI0_SDI_ADMA_SAI0_TXD 0x06000040 IMX8QXP_SPI0_CS0_ADMA_SAI0_RXD 0x06000040 IMX8QXP_SPI0_SCK_ADMA_SAI0_TXC 0x06000040 + IMX8QXP_SPI0_SDI_ADMA_SAI0_TXD 0x06000040 IMX8QXP_SPI0_SDO_ADMA_SAI0_TXFS 0x06000040 >; }; @@ -484,8 +484,8 @@ IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21 IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21 IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21 IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21 - IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41 IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21 + IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41 >; }; =20 @@ -501,8 +501,8 @@ IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21 IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21 IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21 IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21 - IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41 IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21 + IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41 >; }; =20 @@ -518,8 +518,8 @@ IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21 IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21 IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21 IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21 - IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41 IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21 + IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41 >; }; =20 --=20 2.39.2 From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21C6DC64EC4 for ; Wed, 8 Mar 2023 13:23:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230289AbjCHNXw (ORCPT ); Wed, 8 Mar 2023 08:23:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51942 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231618AbjCHNX2 (ORCPT ); Wed, 8 Mar 2023 08:23:28 -0500 Received: from smtp-190a.mail.infomaniak.ch (smtp-190a.mail.infomaniak.ch [IPv6:2001:1600:4:17::190a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2D8015B423 for ; Wed, 8 Mar 2023 05:19:58 -0800 (PST) Received: from smtp-2-0000.mail.infomaniak.ch (unknown [10.5.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4PWsg85CnXzMqvcD; Wed, 8 Mar 2023 13:53:08 +0100 (CET) Received: from unknown by smtp-2-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4PWsg81MrVzMslsV; Wed, 8 Mar 2023 13:53:08 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1678279988; bh=Mn3b5Upw0mnSJ13VbrIbxUrv9PAW/rKACNLhXnVLJxY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ab8wR2OGDcNpKQLcxOOJgfrTw3keNjzEhDtLl8yncub6zPhnr6BuZmTDIkH3Pxdnm Tu2YuvmdyckEx9QwVuVQiBywIBSfZPqHPZiMEOYWmSMcxyXfkhXkCGES+5wbTPBfBJ wQDdaqFetuRVJ7Kol3ddYoDBOnpHL5UFe0+iY1xI= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , linux-kernel@vger.kernel.org Subject: [PATCH v1 04/25] arm64: dts: colibri-imx8x: Use new bracket format Date: Wed, 8 Mar 2023 13:52:38 +0100 Message-Id: <20230308125300.58244-5-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker Use the new bracket format as described by Rob since this seems the format that we're heading in the future. https://lore.kernel.org/all/CAL_JsqKqQdRZC08-BGJqTjzJZ8aWA41LHMbv0QyyVePVm0= co7A@mail.gmail.com/ Signed-off-by: Philippe Schenker --- .../boot/dts/freescale/imx8x-colibri.dtsi | 497 +++++++----------- 1 file changed, 202 insertions(+), 295 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/= boot/dts/freescale/imx8x-colibri.dtsi index 6f86a83bc957..7fea99206020 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi @@ -123,144 +123,116 @@ &iomuxc { =20 /* On-module touch pen-down interrupt */ pinctrl_ad7879_int: ad7879intgrp { - fsl,pins =3D < - IMX8QXP_MIPI_CSI0_I2C0_SCL_LSIO_GPIO3_IO05 0x21 - >; + fsl,pins =3D ; }; =20 /* Colibri Analogue Inputs */ pinctrl_adc0: adc0grp { - fsl,pins =3D < - IMX8QXP_ADC_IN0_ADMA_ADC_IN0 0x60 /* SODIMM 8 */ - IMX8QXP_ADC_IN1_ADMA_ADC_IN1 0x60 /* SODIMM 6 */ - IMX8QXP_ADC_IN4_ADMA_ADC_IN4 0x60 /* SODIMM 4 */ - IMX8QXP_ADC_IN5_ADMA_ADC_IN5 0x60 /* SODIMM 2 */ - >; + fsl,pins =3D , /* SODIMM 8 */ + , /* SODIMM 6 */ + , /* SODIMM 4 */ + ; /* SODIMM 2 */ }; =20 pinctrl_can_int: canintgrp { - fsl,pins =3D < - IMX8QXP_QSPI0A_DQS_LSIO_GPIO3_IO13 0x40 /* SODIMM 73 */ - >; + fsl,pins =3D ; /* SODIMM 73= */ }; =20 pinctrl_csi_ctl: csictlgrp { - fsl,pins =3D < - IMX8QXP_QSPI0A_SS0_B_LSIO_GPIO3_IO14 0x20 /* SODIMM 77 */ - IMX8QXP_QSPI0A_SS1_B_LSIO_GPIO3_IO15 0x20 /* SODIMM 89 */ - >; + fsl,pins =3D , /* SODIMM 7= 7 */ + ; /* SODIMM 89 */ }; =20 pinctrl_ext_io0: extio0grp { - fsl,pins =3D < - IMX8QXP_ENET0_RGMII_RXD3_LSIO_GPIO5_IO08 0x06000040 /* SODIMM 135 */ - >; + fsl,pins =3D ; /* = SODIMM 135 */ }; =20 /* Colibri Ethernet: On-module 100Mbps PHY Micrel KSZ8041 */ pinctrl_fec1: fec1grp { - fsl,pins =3D < - IMX8QXP_ENET0_MDC_CONN_ENET0_MDC 0x06000020 - IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020 - IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x61 - IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x61 - IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x61 - IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RMII_RX_ER 0x61 - IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x61 - IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RCLK50M_OUT 0x06000061 - IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x61 - IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x61 - >; + fsl,pins =3D , + , + , + , + , + , + , + , + , + ; }; =20 pinctrl_fec1_sleep: fec1slpgrp { - fsl,pins =3D < - IMX8QXP_ENET0_MDC_LSIO_GPIO5_IO11 0x06000041 - IMX8QXP_ENET0_MDIO_LSIO_GPIO5_IO10 0x06000041 - IMX8QXP_ENET0_RGMII_RX_CTL_LSIO_GPIO5_IO04 0x41 - IMX8QXP_ENET0_RGMII_RXD0_LSIO_GPIO5_IO05 0x41 - IMX8QXP_ENET0_RGMII_RXD1_LSIO_GPIO5_IO06 0x41 - IMX8QXP_ENET0_RGMII_RXD2_LSIO_GPIO5_IO07 0x41 - IMX8QXP_ENET0_RGMII_TX_CTL_LSIO_GPIO4_IO30 0x41 - IMX8QXP_ENET0_RGMII_TXC_LSIO_GPIO4_IO29 0x41 - IMX8QXP_ENET0_RGMII_TXD0_LSIO_GPIO4_IO31 0x41 - IMX8QXP_ENET0_RGMII_TXD1_LSIO_GPIO5_IO00 0x41 - >; + fsl,pins =3D , + , + , + , + , + , + , + , + , + ; }; =20 /* Colibri optional CAN on UART_B RTS/CTS */ pinctrl_flexcan1: flexcan0grp { - fsl,pins =3D < - IMX8QXP_FLEXCAN0_RX_ADMA_FLEXCAN0_RX 0x21 /* SODIMM 34 */ - IMX8QXP_FLEXCAN0_TX_ADMA_FLEXCAN0_TX 0x21 /* SODIMM 32 */ - >; + fsl,pins =3D , /* SODIMM 3= 4 */ + ; /* SODIMM 32 */ }; =20 /* Colibri optional CAN on PS2 */ pinctrl_flexcan2: flexcan1grp { - fsl,pins =3D < - IMX8QXP_FLEXCAN1_RX_ADMA_FLEXCAN1_RX 0x21 /* SODIMM 63 */ - IMX8QXP_FLEXCAN1_TX_ADMA_FLEXCAN1_TX 0x21 /* SODIMM 55 */ - >; + fsl,pins =3D , /* SODIMM 6= 3 */ + ; /* SODIMM 55 */ }; =20 /* Colibri optional CAN on UART_A TXD/RXD */ pinctrl_flexcan3: flexcan2grp { - fsl,pins =3D < - IMX8QXP_FLEXCAN2_RX_ADMA_FLEXCAN2_RX 0x21 /* SODIMM 33 */ - IMX8QXP_FLEXCAN2_TX_ADMA_FLEXCAN2_TX 0x21 /* SODIMM 35 */ - >; + fsl,pins =3D , /* SODIMM 3= 3 */ + ; /* SODIMM 35 */ }; =20 /* Colibri LCD Back-Light GPIO */ pinctrl_gpio_bl_on: gpioblongrp { - fsl,pins =3D < - IMX8QXP_QSPI0A_DATA3_LSIO_GPIO3_IO12 0x60 /* SODIMM 71 */ - >; + fsl,pins =3D ; /* SODIMM 7= 1 */ }; =20 pinctrl_gpiokeys: gpiokeysgrp { - fsl,pins =3D < - IMX8QXP_QSPI0A_DATA1_LSIO_GPIO3_IO10 0x06700041 /* SODIMM 45 */ - >; + fsl,pins =3D ; /* SODI= MM 45 */ }; =20 pinctrl_hog0: hog0grp { - fsl,pins =3D < - IMX8QXP_CSI_D00_CI_PI_D02 0x61 /* SODIMM 101 */ - IMX8QXP_CSI_D01_CI_PI_D03 0x61 /* SODIMM 103 */ - IMX8QXP_CSI_D02_CI_PI_D04 0x61 /* SODIMM 79 */ - IMX8QXP_CSI_D03_CI_PI_D05 0x61 /* SODIMM 97 */ - IMX8QXP_CSI_D06_CI_PI_D08 0x61 /* SODIMM 85 */ - IMX8QXP_CSI_D07_CI_PI_D09 0x61 /* SODIMM 65 */ - IMX8QXP_CSI_PCLK_LSIO_GPIO3_IO00 0x20 /* SODIMM 96 */ - IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03 0x06000020 /* SODIMM 85 */ - IMX8QXP_ENET0_RGMII_TXD3_LSIO_GPIO5_IO02 0x06000020 /* SODIMM 65 */ - IMX8QXP_QSPI0A_DATA2_LSIO_GPIO3_IO11 0x20 /* SODIMM 69 */ - IMX8QXP_QSPI0B_DATA0_LSIO_GPIO3_IO18 0x20 /* SODIMM 99 */ - IMX8QXP_QSPI0B_DATA1_LSIO_GPIO3_IO19 0x20 /* SODIMM 105 */ - IMX8QXP_QSPI0B_DATA2_LSIO_GPIO3_IO20 0x20 /* SODIMM 107 */ - IMX8QXP_QSPI0B_DATA3_LSIO_GPIO3_IO21 0x20 /* SODIMM 98 */ - IMX8QXP_QSPI0B_DQS_LSIO_GPIO3_IO22 0x20 /* SODIMM 102 */ - IMX8QXP_QSPI0B_SCLK_LSIO_GPIO3_IO17 0x20 /* SODIMM 95 */ - IMX8QXP_QSPI0B_SS0_B_LSIO_GPIO3_IO23 0x20 /* SODIMM 104 */ - IMX8QXP_QSPI0B_SS1_B_LSIO_GPIO3_IO24 0x20 /* SODIMM 106 */ - IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27 0x20 /* SODIMM 97 */ - IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26 0x20 /* SODIMM 79 */ - IMX8QXP_SAI0_TXD_LSIO_GPIO0_IO25 0x20 /* SODIMM 103 */ - IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28 0x20 /* SODIMM 101 */ - IMX8QXP_SAI1_RXFS_LSIO_GPIO0_IO31 0x20 /* SODIMM 100 */ - IMX8QXP_USB_SS3_TC1_LSIO_GPIO4_IO04 0x20 /* SODIMM 133 */ - IMX8QXP_USB_SS3_TC2_LSIO_GPIO4_IO05 0x20 /* SODIMM 127 */ - IMX8QXP_USB_SS3_TC3_LSIO_GPIO4_IO06 0x20 /* SODIMM 131 */ - >; + fsl,pins =3D , /* SODIMM 101 */ + , /* SODIMM 103 */ + , /* SODIMM 79 */ + , /* SODIMM 97 */ + , /* SODIMM 85 */ + , /* SODIMM 65 */ + , /* SODIMM 96 */ + , /* SODIMM 85= */ + , /* SODIMM 6= 5 */ + , /* SODIMM 69 */ + , /* SODIMM 99 */ + , /* SODIMM 105 */ + , /* SODIMM 107 */ + , /* SODIMM 98 */ + , /* SODIMM 102 */ + , /* SODIMM 95 */ + , /* SODIMM 104 */ + , /* SODIMM 106 */ + , /* SODIMM 97 */ + , /* SODIMM 79 */ + , /* SODIMM 103 */ + , /* SODIMM 101 */ + , /* SODIMM 100 */ + , /* SODIMM 133 */ + , /* SODIMM 127 */ + ; /* SODIMM 131 */ }; =20 pinctrl_hog1: hog1grp { - fsl,pins =3D < - IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01 0x20 /* SODIMM 75 */ - IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16 0x20 /* SODIMM 93 */ - >; + fsl,pins =3D , /* SODIMM 75 */ + ; /* SODIMM 93 */ }; =20 /* @@ -268,326 +240,261 @@ IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16 0x20 /* SODIM= M 93 */ * Linux would require rewritting the SCFW board file. */ pinctrl_hog_scfw: hogscfwgrp { - fsl,pins =3D < - IMX8QXP_SCU_GPIO0_00_LSIO_GPIO2_IO03 0x20 /* SODIMM 144 */ - >; + fsl,pins =3D ; /* SODIMM 14= 4 */ }; =20 /* On Module I2C */ pinctrl_i2c0: i2c0grp { - fsl,pins =3D < - IMX8QXP_MIPI_CSI0_GPIO0_00_ADMA_I2C0_SCL 0x06000021 - IMX8QXP_MIPI_CSI0_GPIO0_01_ADMA_I2C0_SDA 0x06000021 - >; + fsl,pins =3D , + ; }; =20 /* MIPI DSI I2C accessible on SODIMM (X1) and FFC (X2) */ pinctrl_i2c0_mipi_lvds0: i2c0mipilvds0grp { - fsl,pins =3D < - IMX8QXP_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc6000020 /* SODIMM 140 = */ - IMX8QXP_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc6000020 /* SODIMM 142 = */ - >; + fsl,pins =3D ,= /* SODIMM 140 */ + ; /* SODIM= M 142 */ }; =20 /* MIPI CSI I2C accessible on SODIMM (X1) and FFC (X3) */ pinctrl_i2c0_mipi_lvds1: i2c0mipilvds1grp { - fsl,pins =3D < - IMX8QXP_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc6000020 /* SODIMM 186 = */ - IMX8QXP_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc6000020 /* SODIMM 188 = */ - >; + fsl,pins =3D ,= /* SODIMM 186 */ + ; /* SODIM= M 188 */ }; =20 /* Colibri I2C */ pinctrl_i2c1: i2c1grp { - fsl,pins =3D < - IMX8QXP_MIPI_DSI0_GPIO0_00_ADMA_I2C1_SCL 0x06000021 /* SODIMM 196 */ - IMX8QXP_MIPI_DSI0_GPIO0_01_ADMA_I2C1_SDA 0x06000021 /* SODIMM 194 */ - >; + fsl,pins =3D , /* = SODIMM 196 */ + ; /* SODIMM 19= 4 */ }; =20 /* Colibri Parallel RGB LCD Interface */ pinctrl_lcdif: lcdifgrp { - fsl,pins =3D < - IMX8QXP_ENET0_RGMII_TXD2_LSIO_GPIO5_IO01 0x60 /* SODIMM 57 */ - IMX8QXP_ESAI0_FSR_ADMA_LCDIF_D00 0x60 /* SODIMM 76 */ - IMX8QXP_ESAI0_FST_ADMA_LCDIF_D01 0x60 /* SODIMM 70 */ - IMX8QXP_ESAI0_SCKR_ADMA_LCDIF_D02 0x60 /* SODIMM 60 */ - IMX8QXP_ESAI0_SCKT_ADMA_LCDIF_D03 0x60 /* SODIMM 58 */ - IMX8QXP_ESAI0_TX0_ADMA_LCDIF_D04 0x60 /* SODIMM 78 */ - IMX8QXP_ESAI0_TX1_ADMA_LCDIF_D05 0x60 /* SODIMM 72 */ - IMX8QXP_ESAI0_TX2_RX3_ADMA_LCDIF_D06 0x60 /* SODIMM 80 */ - IMX8QXP_ESAI0_TX3_RX2_ADMA_LCDIF_D07 0x60 /* SODIMM 46 */ - IMX8QXP_ESAI0_TX4_RX1_ADMA_LCDIF_D08 0x60 /* SODIMM 62 */ - IMX8QXP_ESAI0_TX5_RX0_ADMA_LCDIF_D09 0x60 /* SODIMM 48 */ - IMX8QXP_MCLK_IN0_ADMA_LCDIF_VSYNC 0x60 /* SODIMM 82 */ - IMX8QXP_MCLK_IN1_ADMA_LCDIF_EN 0x60 /* SODIMM 44 */ - IMX8QXP_MCLK_OUT0_ADMA_LCDIF_CLK 0x60 /* SODIMM 56 */ - IMX8QXP_SPDIF0_EXT_CLK_ADMA_LCDIF_D12 0x60 /* SODIMM 52 */ - IMX8QXP_SPDIF0_RX_ADMA_LCDIF_D10 0x60 /* SODIMM 74 */ - IMX8QXP_SPDIF0_TX_ADMA_LCDIF_D11 0x60 /* SODIMM 50 */ - IMX8QXP_SPI3_CS0_ADMA_LCDIF_HSYNC 0x60 /* SODIMM 68 */ - IMX8QXP_SPI3_CS1_ADMA_LCDIF_D16 0x60 /* SODIMM 57 */ - IMX8QXP_SPI3_SCK_ADMA_LCDIF_D13 0x60 /* SODIMM 54 */ - IMX8QXP_SPI3_SDI_ADMA_LCDIF_D15 0x60 /* SODIMM 64 */ - IMX8QXP_SPI3_SDO_ADMA_LCDIF_D14 0x60 /* SODIMM 66 */ - IMX8QXP_UART1_CTS_B_ADMA_LCDIF_D17 0x60 /* SODIMM 61 */ - IMX8QXP_USDHC1_RESET_B_LSIO_GPIO4_IO19 0x60 /* SODIMM 44 */ - IMX8QXP_USDHC1_WP_LSIO_GPIO4_IO21 0x60 /* SODIMM 76 */ - >; + fsl,pins =3D , /* SODIM= M 57 */ + , /* SODIMM 76 */ + , /* SODIMM 70 */ + , /* SODIMM 60 */ + , /* SODIMM 58 */ + , /* SODIMM 78 */ + , /* SODIMM 72 */ + , /* SODIMM 80 */ + , /* SODIMM 46 */ + , /* SODIMM 62 */ + , /* SODIMM 48 */ + , /* SODIMM 82 */ + , /* SODIMM 44 */ + , /* SODIMM 56 */ + , /* SODIMM 52 */ + , /* SODIMM 74 */ + , /* SODIMM 50 */ + , /* SODIMM 68 */ + , /* SODIMM 57 */ + , /* SODIMM 54 */ + , /* SODIMM 64 */ + , /* SODIMM 66 */ + , /* SODIMM 61 */ + , /* SODIMM 44 */ + ; /* SODIMM 76 */ }; =20 /* Colibri SPI */ pinctrl_lpspi2: lpspi2grp { - fsl,pins =3D < - IMX8QXP_SPI2_CS0_LSIO_GPIO1_IO00 0x21 /* SODIMM 86 */ - IMX8QXP_SPI2_SCK_ADMA_SPI2_SCK 0x06000040 /* SODIMM 88 */ - IMX8QXP_SPI2_SDI_ADMA_SPI2_SDI 0x06000040 /* SODIMM 90 */ - IMX8QXP_SPI2_SDO_ADMA_SPI2_SDO 0x06000040 /* SODIMM 92 */ - >; + fsl,pins =3D , /* SODIMM 86 */ + , /* SODIMM 88 */ + , /* SODIMM 90 */ + ; /* SODIMM 92 */ }; =20 /* Colibri UART_B */ pinctrl_lpuart0: lpuart0grp { - fsl,pins =3D < - IMX8QXP_FLEXCAN0_RX_ADMA_UART0_RTS_B 0x06000020 /* SODIMM 34 */ - IMX8QXP_FLEXCAN0_TX_ADMA_UART0_CTS_B 0x06000020 /* SODIMM 32 */ - IMX8QXP_UART0_RX_ADMA_UART0_RX 0x06000020 /* SODIMM 36 */ - IMX8QXP_UART0_TX_ADMA_UART0_TX 0x06000020 /* SODIMM 38 */ - >; + fsl,pins =3D , /* SODI= MM 34 */ + , /* SODIMM 32 */ + , /* SODIMM 36 */ + ; /* SODIMM 38 */ }; =20 /* Colibri UART_C */ pinctrl_lpuart2: lpuart2grp { - fsl,pins =3D < - IMX8QXP_UART2_RX_ADMA_UART2_RX 0x06000020 /* SODIMM 19 */ - IMX8QXP_UART2_TX_ADMA_UART2_TX 0x06000020 /* SODIMM 21 */ - >; + fsl,pins =3D , /* SODIMM 1= 9 */ + ; /* SODIMM 21 */ }; =20 /* Colibri UART_A */ pinctrl_lpuart3: lpuart3grp { - fsl,pins =3D < - IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX 0x06000020 /* SODIMM 33 */ - IMX8QXP_FLEXCAN2_TX_ADMA_UART3_TX 0x06000020 /* SODIMM 35 */ - >; + fsl,pins =3D , /* SODIMM= 33 */ + ; /* SODIMM 35 */ }; =20 /* Colibri UART_A Control */ pinctrl_lpuart3_ctrl: lpuart3ctrlgrp { - fsl,pins =3D < - IMX8QXP_CSI_EN_LSIO_GPIO3_IO02 0x20 /* SODIMM 37 */ - IMX8QXP_CSI_RESET_LSIO_GPIO3_IO03 0x20 /* SODIMM 29 */ - IMX8QXP_MIPI_DSI1_GPIO0_01_LSIO_GPIO2_IO00 0x20 /* SODIMM 23 */ - IMX8QXP_SAI1_RXC_LSIO_GPIO0_IO30 0x20 /* SODIMM 27 */ - IMX8QXP_SAI1_RXD_LSIO_GPIO0_IO29 0x20 /* SODIMM 25 */ - IMX8QXP_USDHC1_CD_B_LSIO_GPIO4_IO22 0x20 /* SODIMM 31 */ - >; + fsl,pins =3D , /* SODIMM 37 */ + , /* SODIMM 29 */ + , /* SODIMM 23 */ + , /* SODIMM 27 */ + , /* SODIMM 25 */ + ; /* SODIMM 31 */ }; =20 /* On module wifi module */ pinctrl_pcieb: pciebgrp { - fsl,pins =3D < - IMX8QXP_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01 0x04000061 /* SODIMM 178 */ - IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 0x60 /* SODIMM 81 */ - IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 0x04000061 /* SODIMM 94 */ - >; + fsl,pins =3D , = /* SODIMM 178 */ + , /* SODIMM 81 */ + ; /* SODIMM = 94 */ }; =20 /* Colibri PWM_A */ pinctrl_pwm_a: pwmagrp { /* both pins are connected together, reserve the unused CSI_D05 */ - fsl,pins =3D < - IMX8QXP_CSI_D05_CI_PI_D07 0x61 /* SODIMM 59 */ - IMX8QXP_SPI0_CS1_ADMA_LCD_PWM0_OUT 0x60 /* SODIMM 59 */ - >; + fsl,pins =3D , /* SODIMM 59 */ + ; /* SODIMM 59 */ }; =20 /* Colibri PWM_B */ pinctrl_pwm_b: pwmbgrp { - fsl,pins =3D < - IMX8QXP_UART1_TX_LSIO_PWM0_OUT 0x60 /* SODIMM 28 */ - >; + fsl,pins =3D ; /* SODIMM 28 */ }; =20 /* Colibri PWM_C */ pinctrl_pwm_c: pwmcgrp { - fsl,pins =3D < - IMX8QXP_UART1_RX_LSIO_PWM1_OUT 0x60 /* SODIMM 30 */ - >; + fsl,pins =3D ; /* SODIMM 30 */ }; =20 /* Colibri PWM_D */ pinctrl_pwm_d: pwmdgrp { /* both pins are connected together, reserve the unused CSI_D04 */ - fsl,pins =3D < - IMX8QXP_CSI_D04_CI_PI_D06 0x61 /* SODIMM 67 */ - IMX8QXP_UART1_RTS_B_LSIO_PWM2_OUT 0x60 /* SODIMM 67 */ - >; + fsl,pins =3D , /* SODIMM 67 */ + ; /* SODIMM 67 */ }; =20 /* On-module I2S */ pinctrl_sai0: sai0grp { - fsl,pins =3D < - IMX8QXP_SPI0_CS0_ADMA_SAI0_RXD 0x06000040 - IMX8QXP_SPI0_SCK_ADMA_SAI0_TXC 0x06000040 - IMX8QXP_SPI0_SDI_ADMA_SAI0_TXD 0x06000040 - IMX8QXP_SPI0_SDO_ADMA_SAI0_TXFS 0x06000040 - >; + fsl,pins =3D , + , + , + ; }; =20 /* Colibri Audio Analogue Microphone GND */ pinctrl_sgtl5000: sgtl5000grp { - fsl,pins =3D < - /* MIC GND EN */ - IMX8QXP_MIPI_CSI0_I2C0_SDA_LSIO_GPIO3_IO06 0x41 - >; + fsl,pins =3D ; }; =20 /* On-module SGTL5000 clock */ pinctrl_sgtl5000_usb_clk: sgtl5000usbclkgrp { - fsl,pins =3D < - IMX8QXP_ADC_IN3_ADMA_ACM_MCLK_OUT0 0x21 - >; + fsl,pins =3D ; }; =20 /* On-module USB interrupt */ pinctrl_usb3503a: usb3503agrp { - fsl,pins =3D < - IMX8QXP_MIPI_CSI0_MCLK_OUT_LSIO_GPIO3_IO04 0x61 - >; + fsl,pins =3D ; }; =20 /* Colibri USB Client Cable Detect */ pinctrl_usbc_det: usbcdetgrp { - fsl,pins =3D < - IMX8QXP_ENET0_REFCLK_125M_25M_LSIO_GPIO5_IO09 0x06000040 /* SODIMM 137 = */ - >; + fsl,pins =3D ;= /* SODIMM 137 */ }; =20 /* USB Host Power Enable */ pinctrl_usbh1_reg: usbh1reggrp { - fsl,pins =3D < - IMX8QXP_USB_SS3_TC0_LSIO_GPIO4_IO03 0x06000040 /* SODIMM 129 */ - >; + fsl,pins =3D ; /* SODI= MM 129 */ }; =20 /* On-module eMMC */ pinctrl_usdhc1: usdhc1grp { - fsl,pins =3D < - IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 - IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21 - IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21 - IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21 - IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21 - IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21 - IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21 - IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21 - IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21 - IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21 - IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21 - IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41 - >; + fsl,pins =3D , + , + , + , + , + , + , + , + , + , + , + ; }; =20 pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { - fsl,pins =3D < - IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 - IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21 - IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21 - IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21 - IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21 - IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21 - IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21 - IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21 - IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21 - IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21 - IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21 - IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41 - >; + fsl,pins =3D , + , + , + , + , + , + , + , + , + , + , + ; }; =20 pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { - fsl,pins =3D < - IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 - IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21 - IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21 - IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21 - IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21 - IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21 - IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21 - IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21 - IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21 - IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21 - IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21 - IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41 - >; + fsl,pins =3D , + , + , + , + , + , + , + , + , + , + , + ; }; =20 /* Colibri SD/MMC Card Detect */ pinctrl_usdhc2_gpio: usdhc2gpiogrp { - fsl,pins =3D < - IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09 0x06000021 /* SODIMM 43 */ - >; + fsl,pins =3D ; /* SODI= MM 43 */ }; =20 pinctrl_usdhc2_gpio_sleep: usdhc2gpioslpgrp { - fsl,pins =3D < - IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09 0x60 /* SODIMM 43 */ - >; + fsl,pins =3D ; /* SODIMM 4= 3 */ }; =20 /* Colibri SD/MMC Card */ pinctrl_usdhc2: usdhc2grp { - fsl,pins =3D < - IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 47 */ - IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 190 */ - IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21 /* SODIMM 192 */ - IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21 /* SODIMM 49 */ - IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21 /* SODIMM 51 */ - IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21 /* SODIMM 53 */ - IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21 - >; + fsl,pins =3D , /* SODIM= M 47 */ + , /* SODIMM 190 */ + , /* SODIMM 192 */ + , /* SODIMM 49 */ + , /* SODIMM 51 */ + , /* SODIMM 53 */ + ; }; =20 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { - fsl,pins =3D < - IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 47 */ - IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 190 */ - IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21 /* SODIMM 192 */ - IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21 /* SODIMM 49 */ - IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21 /* SODIMM 51 */ - IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21 /* SODIMM 53 */ - IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21 - >; + fsl,pins =3D , /* SODIM= M 47 */ + , /* SODIMM 190 */ + , /* SODIMM 192 */ + , /* SODIMM 49 */ + , /* SODIMM 51 */ + , /* SODIMM 53 */ + ; }; =20 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { - fsl,pins =3D < - IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 47 */ - IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 190 */ - IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21 /* SODIMM 192 */ - IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21 /* SODIMM 49 */ - IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21 /* SODIMM 51 */ - IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21 /* SODIMM 53 */ - IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21 - >; + fsl,pins =3D , /* SODIM= M 47 */ + , /* SODIMM 190 */ + , /* SODIMM 192 */ + , /* SODIMM 49 */ + , /* SODIMM 51 */ + , /* SODIMM 53 */ + ; }; =20 pinctrl_usdhc2_sleep: usdhc2slpgrp { - fsl,pins =3D < - IMX8QXP_USDHC1_CLK_LSIO_GPIO4_IO23 0x60 /* SODIMM 47 */ - IMX8QXP_USDHC1_CMD_LSIO_GPIO4_IO24 0x60 /* SODIMM 190 */ - IMX8QXP_USDHC1_DATA0_LSIO_GPIO4_IO25 0x60 /* SODIMM 192 */ - IMX8QXP_USDHC1_DATA1_LSIO_GPIO4_IO26 0x60 /* SODIMM 49 */ - IMX8QXP_USDHC1_DATA2_LSIO_GPIO4_IO27 0x60 /* SODIMM 51 */ - IMX8QXP_USDHC1_DATA3_LSIO_GPIO4_IO28 0x60 /* SODIMM 53 */ - IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21 - >; + fsl,pins =3D , /* SODIMM 47= */ + , /* SODIMM 190 */ + , /* SODIMM 192 */ + , /* SODIMM 49 */ + , /* SODIMM 51 */ + , /* SODIMM 53 */ + ; }; =20 pinctrl_wifi: wifigrp { - fsl,pins =3D < - IMX8QXP_SCU_BOOT_MODE3_SCU_DSC_RTC_CLOCK_OUTPUT_32K 0x20 - >; + fsl,pins =3D ; }; }; --=20 2.39.2 From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46435C742A7 for ; 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bh=Z/W9Y8z78AI62F9IAb60Dw83aMzrKQzekSMZDmWIZR4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=n9Rkg9QdwRNM0CgJnkXZbs66hC+nmx1UK3B+4Gz+Zce/6Ts9kOUswW1j5eF1ErHQn MUz0mjY5g95DvjZsrcq5JL4G4wcy+jyAYXzuZLvJRSsDKbyx/wV66ig5u+gYv2t+Lv AtXPtgMGlMXZ9bMPtd9VWW1OnHONC9eZ/TzLKa/w= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , linux-kernel@vger.kernel.org Subject: [PATCH v1 05/25] arm64: dts: colibri-imx8x: Add atmel pinctrl groups Date: Wed, 8 Mar 2023 13:52:39 +0100 Message-Id: <20230308125300.58244-6-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker Add pinctrl groups for enabling atmel touchscreen support. Remove the pads out of pinctrl_hog0 as they now can be enabled more specific using pinctrl_atmel_conn label. Signed-off-by: Philippe Schenker --- .../boot/dts/freescale/imx8x-colibri.dtsi | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/= boot/dts/freescale/imx8x-colibri.dtsi index 7fea99206020..0b84b65c846a 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi @@ -134,6 +134,22 @@ pinctrl_adc0: adc0grp { ; /* SODIMM 2 */ }; =20 + /* Atmel MXT touchsceen + Capacitive Touch Adapter */ + /* NOTE: This pingroup conflicts with pingroups + * pinctrl_pwm_b/pinctrl_pwm_c. Don't enable them + * simultaneously. + */ + pinctrl_atmel_adap: atmeladaptergrp { + fsl,pins =3D , /* SODIMM 30 */ + ; /* SODIMM 28 */ + }; + + /* Atmel MXT touchsceen + boards with built-in Capacitive Touch Connector= */ + pinctrl_atmel_conn: atmelconnectorgrp { + fsl,pins =3D , /* SODIM= M 107 */ + ; /* SODIMM 106 */ + }; + pinctrl_can_int: canintgrp { fsl,pins =3D ; /* SODIMM 73= */ }; @@ -214,12 +230,10 @@ pinctrl_hog0: hog0grp { , /* SODIMM 69 */ , /* SODIMM 99 */ , /* SODIMM 105 */ - , /* SODIMM 107 */ , /* SODIMM 98 */ , /* SODIMM 102 */ , /* SODIMM 95 */ , /* SODIMM 104 */ - , /* SODIMM 106 */ , /* SODIMM 97 */ , /* SODIMM 79 */ , /* SODIMM 103 */ --=20 2.39.2 From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3270FC64EC4 for ; Wed, 8 Mar 2023 13:13:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231371AbjCHNNR (ORCPT ); Wed, 8 Mar 2023 08:13:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60596 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231382AbjCHNMs (ORCPT ); Wed, 8 Mar 2023 08:12:48 -0500 Received: from smtp-1908.mail.infomaniak.ch (smtp-1908.mail.infomaniak.ch [IPv6:2001:1600:4:17::1908]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 70237C80AE; Wed, 8 Mar 2023 05:10:00 -0800 (PST) Received: from smtp-2-0000.mail.infomaniak.ch (unknown [10.5.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4PWsg96jYjzMrTBT; Wed, 8 Mar 2023 13:53:09 +0100 (CET) Received: from unknown by smtp-2-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4PWsg934QyzMslsG; Wed, 8 Mar 2023 13:53:09 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1678279989; bh=Q1nzKQ150Q4X0uS6VSJZfX77+4AiYSqc1/pfiBJryZM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mweahVRWrc7rNpBJX2Bv9tN4fYxgIJ/9wktrXK3aTMkyfhLzB+y1kgQhjpTOlt5YD P7UzOXtoPBO2MfYdUkFp4h4qYUHhVC8ZRchk0yRbdPLQ3fWbtsQ22Idb4kBWVuaCE7 ea+eXy5MquFBR/orW8EU6AUrXFIoA9wmdio3OAfc= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , linux-kernel@vger.kernel.org Subject: [PATCH v1 06/25] arm64: dts: colibri-imx8x: Add pinctrl group for csi_mclk Date: Wed, 8 Mar 2023 13:52:40 +0100 Message-Id: <20230308125300.58244-7-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker Add missing pinctrl groups that can be used to enable the correct muxing if csi_mclk is needed on SODIMM 75. Signed-off-by: Philippe Schenker --- arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/= boot/dts/freescale/imx8x-colibri.dtsi index 0b84b65c846a..e1b907b7a85d 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi @@ -159,6 +159,10 @@ pinctrl_csi_ctl: csictlgrp { ; /* SODIMM 89 */ }; =20 + pinctrl_csi_mclk: csimclkgrp { + fsl,pins =3D ; /* SODIMM 75 = / X3-12 */ + }; + pinctrl_ext_io0: extio0grp { fsl,pins =3D ; /* = SODIMM 135 */ }; --=20 2.39.2 From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0F0DAC678D5 for ; Wed, 8 Mar 2023 13:03:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231672AbjCHNDE (ORCPT ); Wed, 8 Mar 2023 08:03:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38472 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231494AbjCHNCS (ORCPT ); Wed, 8 Mar 2023 08:02:18 -0500 X-Greylist: delayed 436 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Wed, 08 Mar 2023 05:00:26 PST Received: from smtp-8fa8.mail.infomaniak.ch (smtp-8fa8.mail.infomaniak.ch [83.166.143.168]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2E7FCC5633 for ; Wed, 8 Mar 2023 05:00:25 -0800 (PST) Received: from smtp-2-0000.mail.infomaniak.ch (unknown [10.5.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4PWsgB4L80zMrTB1; Wed, 8 Mar 2023 13:53:10 +0100 (CET) Received: from unknown by smtp-2-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4PWsgB0KBwzMslsV; Wed, 8 Mar 2023 13:53:10 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1678279990; bh=VG5XVHemEYXmdQeztm//MWBEt3exZaox2vLjN4m5Nz0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FYdLpbX9gaNyU3JxrDqfscnX8HyPp2r6cTfx6kEWKqB8MlDMJjCSs03yMUeMrXYN9 lBvM2ykVK0elo0wsI35T3BY+zu6jlT5vcTHfQFP9GwMQRtUrtQ9u/dcCnH49uvyKbM 4keWjjtbsTnphzcjFxxKRrdDbexr0icIl/FK2+cI= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , linux-kernel@vger.kernel.org Subject: [PATCH v1 07/25] arm64: dts: colibri-imx8x: Split pinctrl_hog1 Date: Wed, 8 Mar 2023 13:52:41 +0100 Message-Id: <20230308125300.58244-8-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker Split pinctrl_hog1 into a second group so CSI_MCLK can be muxed to a gpio on its own. Signed-off-by: Philippe Schenker --- arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/= boot/dts/freescale/imx8x-colibri.dtsi index e1b907b7a85d..432449359625 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi @@ -119,7 +119,8 @@ &usdhc2 { =20 &iomuxc { pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>; + pinctrl-0 =3D <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>, + <&pinctrl_hog2>; =20 /* On-module touch pen-down interrupt */ pinctrl_ad7879_int: ad7879intgrp { @@ -253,6 +254,10 @@ pinctrl_hog1: hog1grp { ; /* SODIMM 93 */ }; =20 + pinctrl_hog2: hog2grp { + fsl,pins =3D ; /* SODIMM 75 */ + }; + /* * This pin is used in the SCFW as a UART. Using it from * Linux would require rewritting the SCFW board file. --=20 2.39.2 From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 501E0C678D5 for ; Wed, 8 Mar 2023 13:01:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231580AbjCHNBg (ORCPT ); Wed, 8 Mar 2023 08:01:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39116 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231462AbjCHNAh (ORCPT ); Wed, 8 Mar 2023 08:00:37 -0500 Received: from smtp-bc08.mail.infomaniak.ch (smtp-bc08.mail.infomaniak.ch [IPv6:2001:1600:4:17::bc08]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 04D04968D9 for ; Wed, 8 Mar 2023 04:59:57 -0800 (PST) Received: from smtp-2-0000.mail.infomaniak.ch (unknown [10.5.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4PWsgC1QsmzMrSkP; Wed, 8 Mar 2023 13:53:11 +0100 (CET) Received: from unknown by smtp-2-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4PWsgB56d7zMslsN; Wed, 8 Mar 2023 13:53:10 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1678279991; bh=DdI7zz/2Af/iixDyboJAP4/caijuU/UOT9DWQlN4ET0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=yrMZO0xqJC/Ae4RjzPab9JrGaIfb6XXIJM+cpneZYl5a1AWglV+dQo0ssq8fWLrcK POLN4Ijsffjiv0g7qsJjVF1aCb4OTs0CTY9u1kBpYf4Zj/AkqfNyNGXOPMU0GCVx+5 1tfMbYpFVr+1RZTngx8fjJuOx79aWtrmsgZ1Ywng= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , linux-kernel@vger.kernel.org Subject: [PATCH v1 08/25] arm64: dts: colibri-imx8x: Correct pull on lcdif Date: Wed, 8 Mar 2023 13:52:42 +0100 Message-Id: <20230308125300.58244-9-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker The pads USDHC1_RESET_B and MCLK_IN1 need a pull-down instead of pull-disabled. Correct this. Signed-off-by: Philippe Schenker --- arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/= boot/dts/freescale/imx8x-colibri.dtsi index 432449359625..d4d748a93afc 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi @@ -304,7 +304,7 @@ pinctrl_lcdif: lcdifgrp { , /* SODIMM 62 */ , /* SODIMM 48 */ , /* SODIMM 82 */ - , /* SODIMM 44 */ + , /* SODIMM 44 */ , /* SODIMM 56 */ , /* SODIMM 52 */ , /* SODIMM 74 */ @@ -315,7 +315,7 @@ pinctrl_lcdif: lcdifgrp { , /* SODIMM 64 */ , /* SODIMM 66 */ , /* SODIMM 61 */ - , /* SODIMM 44 */ + , /* SODIMM 44 */ ; /* SODIMM 76 */ }; =20 --=20 2.39.2 From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1A038C64EC4 for ; Wed, 8 Mar 2023 13:00:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231484AbjCHNAv (ORCPT ); Wed, 8 Mar 2023 08:00:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37924 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231194AbjCHNAZ (ORCPT ); Wed, 8 Mar 2023 08:00:25 -0500 X-Greylist: delayed 399 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Wed, 08 Mar 2023 04:59:51 PST Received: from smtp-8fae.mail.infomaniak.ch (smtp-8fae.mail.infomaniak.ch [IPv6:2001:1600:4:17::8fae]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 99E20C3E36 for ; Wed, 8 Mar 2023 04:59:50 -0800 (PST) Received: from smtp-2-0000.mail.infomaniak.ch (unknown [10.5.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4PWsgC67PvzMrBx1; Wed, 8 Mar 2023 13:53:11 +0100 (CET) Received: from unknown by smtp-2-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4PWsgC29XbzMslsf; Wed, 8 Mar 2023 13:53:11 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1678279991; bh=09hYvgVw1FJAE0n/qOeP7u/y8kJU55y8cqSUIePfRzo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=m2or7BpYTNcOQX8DbIyxe5ylAe4Ms17Y2d6rvBU40I/tEL4PTKvWJa3HdbLM3emcQ IhKZZHai9LHQeiv9SuaT3yGzvk3fVtZr5vrac40lvBH9JLC4rLdU3jlvTWr7eA1GDP zFl5dbOZRMx+tdH+qqtF4XsAXhA4efLGBTEB+2pU= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , linux-kernel@vger.kernel.org Subject: [PATCH v1 09/25] arm64: dts: colibri-imx8x: Add separate pinctrl group for cs2 Date: Wed, 8 Mar 2023 13:52:43 +0100 Message-Id: <20230308125300.58244-10-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker Add a separate pinctrl group for chip-select 2 for Colibri SPI. That way one is able to use it separately. Signed-off-by: Philippe Schenker --- arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/= boot/dts/freescale/imx8x-colibri.dtsi index d4d748a93afc..2cc94589c36f 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi @@ -120,7 +120,7 @@ &usdhc2 { &iomuxc { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>, - <&pinctrl_hog2>; + <&pinctrl_hog2>, <&pinctrl_lpspi2_cs2>; =20 /* On-module touch pen-down interrupt */ pinctrl_ad7879_int: ad7879intgrp { @@ -231,7 +231,6 @@ pinctrl_hog0: hog0grp { , /* SODIMM 65 */ , /* SODIMM 96 */ , /* SODIMM 85= */ - , /* SODIMM 6= 5 */ , /* SODIMM 69 */ , /* SODIMM 99 */ , /* SODIMM 105 */ @@ -327,6 +326,10 @@ pinctrl_lpspi2: lpspi2grp { ; /* SODIMM 92 */ }; =20 + pinctrl_lpspi2_cs2: lpspi2cs2grp { + fsl,pins =3D ; /* SODIM= M 65 */ + }; + /* Colibri UART_B */ pinctrl_lpuart0: lpuart0grp { fsl,pins =3D , /* SODI= MM 34 */ --=20 2.39.2 From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3305FC64EC4 for ; Wed, 8 Mar 2023 13:03:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231666AbjCHNDA (ORCPT ); Wed, 8 Mar 2023 08:03:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38418 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231410AbjCHNBV (ORCPT ); Wed, 8 Mar 2023 08:01:21 -0500 Received: from smtp-bc0e.mail.infomaniak.ch (smtp-bc0e.mail.infomaniak.ch [45.157.188.14]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1846BC48BE for ; Wed, 8 Mar 2023 05:00:21 -0800 (PST) Received: from smtp-2-0000.mail.infomaniak.ch (unknown [10.5.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4PWsgD3fH5zMrRwQ; Wed, 8 Mar 2023 13:53:12 +0100 (CET) Received: from unknown by smtp-2-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4PWsgC6tjzzMslsT; Wed, 8 Mar 2023 13:53:11 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1678279992; bh=y6j0m4/VStBN5HBf/0nS/vbecd2JQ1gf/jtUCNvtOlM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MRaoFWh+migoH/IRtLJL6jV4Cna6nt8gPVQINS2aaKvR/mkHITrzpD2lUV/O/2Lg3 CRxgenV2Zv39H6gs99jYEveWfEZpRSvBkCnLDYMFdbXz/kzrU7Z/9hsTzNOTv3t/cp aU3N4rqv5EFLfdBPqrGEyl1aGpvkKq6pXhFU+ARg= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , linux-kernel@vger.kernel.org Subject: [PATCH v1 10/25] arm64: dts: colibri-imx8x: Add pinctrl group for hdmi hpd Date: Wed, 8 Mar 2023 13:52:44 +0100 Message-Id: <20230308125300.58244-11-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker The colibri imx8x contains a dedicated gpio meant for HDMI hot-plug-detect. Add a pinctrl group to make this usable. Signed-off-by: Philippe Schenker --- arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/= boot/dts/freescale/imx8x-colibri.dtsi index 2cc94589c36f..c6aaf6aeab07 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi @@ -218,6 +218,11 @@ pinctrl_gpio_bl_on: gpioblongrp { fsl,pins =3D ; /* SODIMM 7= 1 */ }; =20 + /* HDMI Hot Plug Detect on FFC (X2) */ + pinctrl_gpio_hpd: gpiohpdgrp { + fsl,pins =3D ; /* SOD= IMM 138 */ + }; + pinctrl_gpiokeys: gpiokeysgrp { fsl,pins =3D ; /* SODI= MM 45 */ }; --=20 2.39.2 From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD4AEC64EC4 for ; Wed, 8 Mar 2023 13:01:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231584AbjCHNBk (ORCPT ); Wed, 8 Mar 2023 08:01:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37498 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231467AbjCHNAh (ORCPT ); Wed, 8 Mar 2023 08:00:37 -0500 Received: from smtp-8fa8.mail.infomaniak.ch (smtp-8fa8.mail.infomaniak.ch [IPv6:2001:1600:4:17::8fa8]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 09C34C4893 for ; Wed, 8 Mar 2023 04:59:58 -0800 (PST) Received: from smtp-2-0000.mail.infomaniak.ch (unknown [10.5.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4PWsgF0tbnzMrQm6; Wed, 8 Mar 2023 13:53:13 +0100 (CET) Received: from unknown by smtp-2-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4PWsgD4NTnzMslsb; Wed, 8 Mar 2023 13:53:12 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1678279993; bh=J0nop1UBINwBylE+z6Slgf4axqyCGkduagG7oE+1FZs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=quApN3DmUUF8/4U7At3y5jRYXTruwBwCarrNN3Kg1ZglWYrl7n8jZkuelBylv4U+t L/9/O0TPbgCMXD1OHqASTE3r8elOgPSA+NO7qFea3XpiViAU/d9s/D1+muRbzQQVWU ClkEmWsGrNxdAKwovAjNLchJmWDLFCPMVSM+pjiY= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , linux-kernel@vger.kernel.org Subject: [PATCH v1 11/25] arm64: dts: colibri-imx8x: Sort fec1 node alphabetically Date: Wed, 8 Mar 2023 13:52:45 +0100 Message-Id: <20230308125300.58244-12-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker fec1 seems to be the only one that is not properly sorted alphabetically. Put it to the location it belongs. Signed-off-by: Philippe Schenker --- .../dts/freescale/imx8x-colibri-eval-v3.dtsi | 10 ++--- .../boot/dts/freescale/imx8x-colibri.dtsi | 42 +++++++++---------- 2 files changed, 26 insertions(+), 26 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi b/arc= h/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi index dc0339b35a3c..870375301243 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi @@ -26,6 +26,11 @@ key-wakeup { }; }; =20 +/* Colibri FastEthernet */ +&fec1 { + status =3D "okay"; +}; + &i2c1 { status =3D "okay"; =20 @@ -51,11 +56,6 @@ &lpuart3 { status =3D "okay"; }; =20 -/* Colibri FastEthernet */ -&fec1 { - status =3D "okay"; -}; - /* Colibri SD/MMC Card */ &usdhc2 { status =3D "okay"; diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/= boot/dts/freescale/imx8x-colibri.dtsi index c6aaf6aeab07..31c771c1b788 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi @@ -16,6 +16,27 @@ reg_module_3v3: regulator-module-3v3 { }; }; =20 +/* Colibri FastEthernet */ +&fec1 { + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&pinctrl_fec1>; + pinctrl-1 =3D <&pinctrl_fec1_sleep>; + fsl,magic-packet; + phy-handle =3D <ðphy0>; + phy-mode =3D "rmii"; + + mdio { + #address-cells =3D <1>; + #size-cells =3D <0>; + + ethphy0: ethernet-phy@2 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <2>; + max-speed =3D <100>; + }; + }; +}; + /* On-module I2C */ &i2c0 { #address-cells =3D <1>; @@ -70,27 +91,6 @@ &lpuart3 { pinctrl-0 =3D <&pinctrl_lpuart3>, <&pinctrl_lpuart3_ctrl>; }; =20 -/* Colibri FastEthernet */ -&fec1 { - pinctrl-names =3D "default", "sleep"; - pinctrl-0 =3D <&pinctrl_fec1>; - pinctrl-1 =3D <&pinctrl_fec1_sleep>; - fsl,magic-packet; - phy-handle =3D <ðphy0>; - phy-mode =3D "rmii"; - - mdio { - #address-cells =3D <1>; - #size-cells =3D <0>; - - ethphy0: ethernet-phy@2 { - compatible =3D "ethernet-phy-ieee802.3-c22"; - reg =3D <2>; - max-speed =3D <100>; - }; - }; -}; - /* On-module eMMC */ &usdhc1 { pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; --=20 2.39.2 From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DB40CC64EC4 for ; Wed, 8 Mar 2023 13:02:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231601AbjCHNCC (ORCPT ); Wed, 8 Mar 2023 08:02:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39150 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231493AbjCHNAj (ORCPT ); Wed, 8 Mar 2023 08:00:39 -0500 Received: from smtp-42a8.mail.infomaniak.ch (smtp-42a8.mail.infomaniak.ch [IPv6:2001:1600:4:17::42a8]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AABCCC489D for ; Wed, 8 Mar 2023 05:00:00 -0800 (PST) Received: from smtp-2-0000.mail.infomaniak.ch (unknown [10.5.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4PWsgF5GVGzMrFx3; Wed, 8 Mar 2023 13:53:13 +0100 (CET) Received: from unknown by smtp-2-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4PWsgF1gfyzMsl0y; Wed, 8 Mar 2023 13:53:13 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1678279993; bh=5RB53IT0WY1PvkcckhRtNGskmrWIYH6BxeJz78MvpDg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Hjc6hENRWR9con21FyxWDlA3DAFSikakaL9TcSg4k6INL96TQr/YIgdfDtqVTI4RI L0hut5cKLmf6m6r24JCEsvIBAUReAdBek2b7wq24c0O0M3M3gum6RPcLAkJv7IVG/g 22dzI1EvIl6M58Gs9TOgb2VJJFitnYaTVUcdr5d0= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , linux-kernel@vger.kernel.org Subject: [PATCH v1 12/25] arm64: dts: colibri-imx8x: Add SPI Date: Wed, 8 Mar 2023 13:52:46 +0100 Message-Id: <20230308125300.58244-13-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker Add Colibri SPI to the board. lpspi2 is being exposed on the SoM edge. Add settings to the module-level but finally enable it on the eval-board dtsi. Signed-off-by: Philippe Schenker --- arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi | 5 +++++ arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi | 7 +++++++ 2 files changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi b/arc= h/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi index 870375301243..77222d76bd95 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi @@ -41,6 +41,11 @@ rtc_i2c: rtc@68 { }; }; =20 +/* Colibri SPI */ +&lpspi2 { + status =3D "okay"; +}; + /* Colibri UART_B */ &lpuart0 { status =3D "okay"; diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/= boot/dts/freescale/imx8x-colibri.dtsi index 31c771c1b788..cfa2c569e01c 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi @@ -91,6 +91,13 @@ &lpuart3 { pinctrl-0 =3D <&pinctrl_lpuart3>, <&pinctrl_lpuart3_ctrl>; }; =20 +/* Colibri SPI */ +&lpspi2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lpspi2>; + cs-gpios =3D <&lsio_gpio1 0 GPIO_ACTIVE_LOW>; +}; + /* On-module eMMC */ &usdhc1 { pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; --=20 2.39.2 From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C3F35C64EC4 for ; Wed, 8 Mar 2023 13:02:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231622AbjCHNC1 (ORCPT ); Wed, 8 Mar 2023 08:02:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39104 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231535AbjCHNBH (ORCPT ); Wed, 8 Mar 2023 08:01:07 -0500 X-Greylist: delayed 426 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Wed, 08 Mar 2023 05:00:13 PST Received: from smtp-190c.mail.infomaniak.ch (smtp-190c.mail.infomaniak.ch [185.125.25.12]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BCE3DC5620 for ; Wed, 8 Mar 2023 05:00:13 -0800 (PST) Received: from smtp-2-0000.mail.infomaniak.ch (unknown [10.5.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4PWsgG2jSXzMq1SS; Wed, 8 Mar 2023 13:53:14 +0100 (CET) Received: from unknown by smtp-2-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4PWsgF62cCzMslsN; Wed, 8 Mar 2023 13:53:13 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1678279994; bh=3Fq7e9gmvQWCP55e4sk+hcFy+Fc7/kfRQcUVSGJF8k0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZVu4KzasXOCai9IGFhoTUTzv11Dz3wOyKNN+emCN4z9dpQp8UleEgvaOclCS+dNq3 y6QCB3OiOpx7VksRS1jeqA1QymViSYjs5MMxibDMGV/pCB5UyjFkqIphijM4L+FBDi ppHkjTEcfKrrANYWHs3AysMZrW002rAGOC1C4s9M= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , linux-kernel@vger.kernel.org Subject: [PATCH v1 13/25] arm64: dts: colibri-imx8x: Add gpio-line-names Date: Wed, 8 Mar 2023 13:52:47 +0100 Message-Id: <20230308125300.58244-14-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker This commit adds gpio-line-names in line with other SoM from Toradex. Signed-off-by: Philippe Schenker --- .../boot/dts/freescale/imx8x-colibri.dtsi | 152 ++++++++++++++++++ 1 file changed, 152 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/= boot/dts/freescale/imx8x-colibri.dtsi index cfa2c569e01c..9555cfa8b27e 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi @@ -98,6 +98,158 @@ &lpspi2 { cs-gpios =3D <&lsio_gpio1 0 GPIO_ACTIVE_LOW>; }; =20 +&lsio_gpio0 { + gpio-line-names =3D "", + "SODIMM_70", + "SODIMM_60", + "SODIMM_58", + "SODIMM_78", + "SODIMM_72", + "SODIMM_80", + "SODIMM_46", + "SODIMM_62", + "SODIMM_48", + "SODIMM_74", + "SODIMM_50", + "SODIMM_52", + "SODIMM_54", + "SODIMM_66", + "SODIMM_64", + "SODIMM_68", + "", + "", + "SODIMM_82", + "SODIMM_56", + "SODIMM_28", + "SODIMM_30", + "", + "SODIMM_61", + "SODIMM_103", + "", + "", + "", + "SODIMM_25", + "SODIMM_27", + "SODIMM_100"; +}; + +&lsio_gpio1 { + gpio-line-names =3D "SODIMM_86", + "SODIMM_92", + "SODIMM_90", + "SODIMM_88", + "", + "", + "", + "SODIMM_59", + "", + "SODIMM_6", + "SODIMM_8", + "", + "", + "SODIMM_2", + "SODIMM_4", + "SODIMM_34", + "SODIMM_32", + "SODIMM_63", + "SODIMM_55", + "SODIMM_33", + "SODIMM_35", + "SODIMM_36", + "SODIMM_38", + "SODIMM_21", + "SODIMM_19", + "SODIMM_140", + "SODIMM_142", + "SODIMM_196", + "SODIMM_194", + "SODIMM_186", + "SODIMM_188", + "SODIMM_138"; +}; + +&lsio_gpio2 { + gpio-line-names =3D "SODIMM_23", + "", + "", + "SODIMM_144"; +}; + +&lsio_gpio3 { + gpio-line-names =3D "SODIMM_96", + "SODIMM_75", + "SODIMM_37", + "SODIMM_29", + "", + "", + "", + "", + "", + "SODIMM_43", + "SODIMM_45", + "SODIMM_69", + "SODIMM_71", + "SODIMM_73", + "SODIMM_77", + "SODIMM_89", + "SODIMM_93", + "SODIMM_95", + "SODIMM_99", + "SODIMM_105", + "SODIMM_107", + "SODIMM_98", + "SODIMM_102", + "SODIMM_104", + "SODIMM_106"; +}; + +&lsio_gpio4 { + gpio-line-names =3D "", + "", + "", + "SODIMM_129", + "SODIMM_133", + "SODIMM_127", + "SODIMM_131", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "SODIMM_44", + "", + "SODIMM_76", + "SODIMM_31", + "SODIMM_47", + "SODIMM_190", + "SODIMM_192", + "SODIMM_49", + "SODIMM_51", + "SODIMM_53"; +}; + +&lsio_gpio5 { + gpio-line-names =3D "", + "SODIMM_57", + "SODIMM_65", + "SODIMM_85", + "", + "", + "", + "", + "SODIMM_135", + "SODIMM_137", + "UNUSABLE_SODIMM_180", + "UNUSABLE_SODIMM_184"; +}; + /* On-module eMMC */ &usdhc1 { pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; --=20 2.39.2 From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05F65C6FD20 for ; Wed, 8 Mar 2023 13:13:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231604AbjCHNNl (ORCPT ); Wed, 8 Mar 2023 08:13:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59926 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231463AbjCHNNH (ORCPT ); Wed, 8 Mar 2023 08:13:07 -0500 Received: from smtp-bc0c.mail.infomaniak.ch (smtp-bc0c.mail.infomaniak.ch [45.157.188.12]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6A6EE9609C for ; Wed, 8 Mar 2023 05:10:19 -0800 (PST) Received: from smtp-2-0000.mail.infomaniak.ch (unknown [10.5.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4PWsgG73pPzMrNB7; Wed, 8 Mar 2023 13:53:14 +0100 (CET) Received: from unknown by smtp-2-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4PWsgG3VTszMsl12; Wed, 8 Mar 2023 13:53:14 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1678279994; bh=T3ReXUcj887xlXUQrlmlVsJBQN6NxvfgpbRygx6SMXg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=H1qX/qEjo5n263EN7PoCsJcHs+Oimiy6CoMxv5IBdNaWqkNI1vELLCrcVttlcyvGE AI/ys61NMQcdcClD82+UH88L/9iclwl0sH85NsWFZYvhkRntu+98Rw8Saz7HuLV2nC cpwpZ+XTW4UyvMtbNL9FlVcqifu22PzjZCZjRkqE= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , linux-kernel@vger.kernel.org Subject: [PATCH v1 14/25] arm64: dts: colibri-imx8x: Disable touchscreen by default Date: Wed, 8 Mar 2023 13:52:48 +0100 Message-Id: <20230308125300.58244-15-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker Do not enable the touchscreen. By default it is not used but should be kept to enable it from a file that includes imx8x-colibri.dtsi. Signed-off-by: Philippe Schenker --- arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/= boot/dts/freescale/imx8x-colibri.dtsi index 9555cfa8b27e..0e8448aa373e 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi @@ -61,6 +61,7 @@ touchscreen@2c { adi,median-filter-size =3D /bits/ 8 <2>; adi,resistance-plate-x =3D <120>; touchscreen-max-pressure =3D <4096>; + status =3D "disabled"; }; }; =20 --=20 2.39.2 From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2C5CFC6FD20 for ; Wed, 8 Mar 2023 13:01:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231589AbjCHNBq (ORCPT ); Wed, 8 Mar 2023 08:01:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231483AbjCHNAi (ORCPT ); Wed, 8 Mar 2023 08:00:38 -0500 Received: from smtp-bc08.mail.infomaniak.ch (smtp-bc08.mail.infomaniak.ch [IPv6:2001:1600:4:17::bc08]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4D2C3C489B for ; Wed, 8 Mar 2023 04:59:59 -0800 (PST) Received: from smtp-2-0000.mail.infomaniak.ch (unknown [10.5.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4PWsgH4QD7zMrNYJ; Wed, 8 Mar 2023 13:53:15 +0100 (CET) Received: from unknown by smtp-2-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4PWsgH0xVhzMsl1j; Wed, 8 Mar 2023 13:53:15 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1678279995; bh=DxUYEEf06dRHDYt7bQErI8IKA96qqEm2cA2veD6nsfg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=N9b7HRgC+Aik/97VnuuSwnbaMKKPLmIweM0kgL2Fcwj0V/FwIQssVlMu+1mmA90E6 fMyJezIgqTNIDA2JTcIim2uZMGShrAAQwrIgxK72bDt3hAQlL9eJpMh4VI1+OPmDkn gP9PC9kz4yuF2kXvQK6cGUnXw8vlF/hDIMkUKC3Q= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , linux-kernel@vger.kernel.org Subject: [PATCH v1 15/25] arm64: dts: colibri-imx8x: Add jpegenc/dec Date: Wed, 8 Mar 2023 13:52:49 +0100 Message-Id: <20230308125300.58244-16-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker jpeg encoder and decoder are available. Do enable them in the module level device-tree since those are self-contained. Signed-off-by: Philippe Schenker --- arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/= boot/dts/freescale/imx8x-colibri.dtsi index 0e8448aa373e..b849b378b017 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi @@ -74,6 +74,14 @@ &i2c1 { clock-frequency =3D <100000>; }; =20 +&jpegdec { + status =3D "okay"; +}; + +&jpegenc { + status =3D "okay"; +}; + /* Colibri UART_B */ &lpuart0 { pinctrl-names =3D "default"; --=20 2.39.2 From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60361C678D5 for ; Wed, 8 Mar 2023 13:02:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231648AbjCHNCq (ORCPT ); Wed, 8 Mar 2023 08:02:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38000 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231540AbjCHNBP (ORCPT ); Wed, 8 Mar 2023 08:01:15 -0500 Received: from smtp-42a8.mail.infomaniak.ch (smtp-42a8.mail.infomaniak.ch [84.16.66.168]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D6074C48B6 for ; Wed, 8 Mar 2023 05:00:15 -0800 (PST) Received: from smtp-2-0000.mail.infomaniak.ch (unknown [10.5.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4PWsgJ1XnbzMqs7l; Wed, 8 Mar 2023 13:53:16 +0100 (CET) Received: from unknown by smtp-2-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4PWsgH5C43zMslsF; Wed, 8 Mar 2023 13:53:15 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1678279996; bh=JXingivvb7re9pagMlQsVFdFYwLAWOaPZ43ldOrpBVA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Hd9ky80NPbUHCYLIp5NSLNVK5GRSGqWjIra8CyYkHy8B70PC9BUiCoUbvbGIINihE f0/SScb8T8q1I2Uu7mLcBuzEZy/MBPNyjjLLr54smfY2xBLODmmNrcs9vGuIzRI1ke yqQhOO0//nWMTontZQhO+8yls45NirzOuFkKwgYg= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , linux-kernel@vger.kernel.org Subject: [PATCH v1 16/25] arm64: dts: colibri-imx8x: Add colibri pwm b, c, d Date: Wed, 8 Mar 2023 13:52:50 +0100 Message-Id: <20230308125300.58244-17-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker Add Colibri PWM_B, PWM_C, PWM_D to the module-level device-tree and set the status to ok on the eval-board. Signed-off-by: Philippe Schenker --- .../dts/freescale/imx8x-colibri-eval-v3.dtsi | 15 +++++++++++++ .../boot/dts/freescale/imx8x-colibri.dtsi | 21 +++++++++++++++++++ 2 files changed, 36 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi b/arc= h/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi index 77222d76bd95..625d2caaf5d1 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi @@ -56,6 +56,21 @@ &lpuart2 { status =3D "okay"; }; =20 +/* Colibri PWM_B */ +&lsio_pwm0 { + status =3D "okay"; +}; + +/* Colibri PWM_C */ +&lsio_pwm1 { + status =3D "okay"; +}; + +/* Colibri PWM_D */ +&lsio_pwm2 { + status =3D "okay"; +}; + /* Colibri UART_A */ &lpuart3 { status =3D "okay"; diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/= boot/dts/freescale/imx8x-colibri.dtsi index b849b378b017..180a1d940b8d 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi @@ -259,6 +259,27 @@ &lsio_gpio5 { "UNUSABLE_SODIMM_184"; }; =20 +/* Colibri PWM_B */ +&lsio_pwm0 { + #pwm-cells =3D <3>; + pinctrl-0 =3D <&pinctrl_pwm_b>; + pinctrl-names =3D "default"; +}; + +/* Colibri PWM_C */ +&lsio_pwm1 { + #pwm-cells =3D <3>; + pinctrl-0 =3D <&pinctrl_pwm_c>; + pinctrl-names =3D "default"; +}; + +/* Colibri PWM_D */ +&lsio_pwm2 { + #pwm-cells =3D <3>; + pinctrl-0 =3D <&pinctrl_pwm_d>; + pinctrl-names =3D "default"; +}; + /* On-module eMMC */ &usdhc1 { pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; --=20 2.39.2 From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 85FD4C64EC4 for ; Wed, 8 Mar 2023 13:01:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231577AbjCHNBe (ORCPT ); Wed, 8 Mar 2023 08:01:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37962 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231451AbjCHNAg (ORCPT ); Wed, 8 Mar 2023 08:00:36 -0500 Received: from smtp-bc08.mail.infomaniak.ch (smtp-bc08.mail.infomaniak.ch [IPv6:2001:1600:4:17::bc08]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 903EEC2219 for ; Wed, 8 Mar 2023 04:59:57 -0800 (PST) Received: from smtp-2-0000.mail.infomaniak.ch (unknown [10.5.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4PWsgJ5zVGzMrS9Q; Wed, 8 Mar 2023 13:53:16 +0100 (CET) Received: from unknown by smtp-2-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4PWsgJ2T5czMslrx; Wed, 8 Mar 2023 13:53:16 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1678279996; bh=aExLQ6B+SPPPLHo1PHQOw+NlQL8dDHzonnhZWoJIBHs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Z17z0InBhcSGaQbYoUypBNPqiYFRUVpPf9Y5drop92G3smRvLIIFMRdYVJjeNac/Y LepbB9iAMpwZxWSBnSWhMA264fsWIlI62jo/zgdxVxDEQJWprDtz6t2LO1nVT7j5+h wKwEdJp40xhv7p0hr2GXEksQRq4H4EuufwqrL9Aw= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , linux-kernel@vger.kernel.org Subject: [PATCH v1 17/25] arm64: dts: colibri-imx8x: eval: Add spi-to-can Date: Wed, 8 Mar 2023 13:52:51 +0100 Message-Id: <20230308125300.58244-18-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker Add mcp2515 spi-to-can to &lpspi2. Signed-off-by: Philippe Schenker --- .../dts/freescale/imx8x-colibri-eval-v3.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi b/arc= h/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi index 625d2caaf5d1..e7e3cf462408 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi @@ -11,6 +11,13 @@ aliases { rtc1 =3D &rtc; }; =20 + /* fixed crystal dedicated to mcp25xx */ + clk16m: clock-16mhz-fixed { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <16000000>; + }; + gpio-keys { compatible =3D "gpio-keys"; pinctrl-names =3D "default"; @@ -44,6 +51,18 @@ rtc_i2c: rtc@68 { /* Colibri SPI */ &lpspi2 { status =3D "okay"; + + mcp2515: can@0 { + compatible =3D "microchip,mcp2515"; + reg =3D <0>; + interrupt-parent =3D <&lsio_gpio3>; + interrupts =3D <13 IRQ_TYPE_EDGE_FALLING>; + pinctrl-0 =3D <&pinctrl_can_int>; + pinctrl-names =3D "default"; + clocks =3D <&clk16m>; + spi-max-frequency =3D <10000000>; + status =3D "okay"; + }; }; =20 /* Colibri UART_B */ --=20 2.39.2 From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D75B7C64EC4 for ; Wed, 8 Mar 2023 13:02:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229580AbjCHNCd (ORCPT ); Wed, 8 Mar 2023 08:02:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37498 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229522AbjCHNBN (ORCPT ); Wed, 8 Mar 2023 08:01:13 -0500 X-Greylist: delayed 421 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Wed, 08 Mar 2023 05:00:15 PST Received: from smtp-42aa.mail.infomaniak.ch (smtp-42aa.mail.infomaniak.ch [84.16.66.170]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A88C6C5614 for ; Wed, 8 Mar 2023 05:00:14 -0800 (PST) Received: from smtp-2-0000.mail.infomaniak.ch (unknown [10.5.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4PWsgK3H2MzMqrZ8; Wed, 8 Mar 2023 13:53:17 +0100 (CET) Received: from unknown by smtp-2-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4PWsgJ6mt9zMsl17; Wed, 8 Mar 2023 13:53:16 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1678279997; bh=D/Bwcn9ct9hGVp/HejFmpJ8/8S1VgnELr/+g/GheFts=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RcJ3ZqcqkehRuJkeohwXTkl/Vzpu1MkGfHwckgN6IVW6etUZ+IpnWSOhWUByWii/F 6oMe7UekMrUS6XD3ek+Nzk4KHqF0Rh8LCuitqGfMtqWaxDf9OMpQETtft/RyxBLgu/ dyyFVhpMcszePU/lc2LUh3qWNz2vIOjydmXmrkUA= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , linux-kernel@vger.kernel.org Subject: [PATCH v1 18/25] arm64: dts: colibri-imx8x: Add no-1-8-v to sd-card Date: Wed, 8 Mar 2023 13:52:52 +0100 Message-Id: <20230308125300.58244-19-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker Many Colibri carrier boards are using 3.3V pull-up resistors on the SD-Card connector. Letting it switch to 1.8V is an invalid state. Do prevent this from happening by keeping the signaling voltage at 3.3V. Signed-off-by: Philippe Schenker --- arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/= boot/dts/freescale/imx8x-colibri.dtsi index 180a1d940b8d..f09a6aad6275 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi @@ -303,6 +303,7 @@ &usdhc2 { bus-width =3D <4>; cd-gpios =3D <&lsio_gpio3 9 GPIO_ACTIVE_LOW>; disable-wp; + no-1-8-v; vmmc-supply =3D <®_module_3v3>; }; =20 --=20 2.39.2 From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9AED2C6FD20 for ; Wed, 8 Mar 2023 13:01:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231480AbjCHNBU (ORCPT ); Wed, 8 Mar 2023 08:01:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37668 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231410AbjCHNAe (ORCPT ); Wed, 8 Mar 2023 08:00:34 -0500 Received: from smtp-8fac.mail.infomaniak.ch (smtp-8fac.mail.infomaniak.ch [IPv6:2001:1600:4:17::8fac]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 10F3CBCFF6 for ; Wed, 8 Mar 2023 04:59:56 -0800 (PST) Received: from smtp-2-0000.mail.infomaniak.ch (unknown [10.5.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4PWsgL0R36zMrTBC; Wed, 8 Mar 2023 13:53:18 +0100 (CET) Received: from unknown by smtp-2-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4PWsgK45GXzMslsc; Wed, 8 Mar 2023 13:53:17 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1678279997; bh=ieLvZpXNqo1ScKL96FKroIXWyLYGJO//PsmsMl4tB5A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UoMW9J5kCiQMXFOFXu18O07VSxWMefr3vlMTZkBLyHBRw6/GfrfT/6BRC/StAXHSp 9x40EujC5k/Khz3HDQboLZ6kqEYcRAi95m4lpfmfGqBYF4CdcOKui16XoumraXcNQf YEdWM0BFmRIYquLKmTafjxHkSy8VZSZ8tlvPsPhQ= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , linux-kernel@vger.kernel.org Subject: [PATCH v1 19/25] arm64: dts: colibri-imx8x: Set thermal thresholds Date: Wed, 8 Mar 2023 13:52:53 +0100 Message-Id: <20230308125300.58244-20-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker Set critical/alert thermal thresholds for all relevant SOC temperature trips to the IT value (max T_junction 105 degree Celsius) in accordance with the IT grade of the SOM. Signed-off-by: Philippe Schenker --- arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/= boot/dts/freescale/imx8x-colibri.dtsi index f09a6aad6275..2f86a2eb4ff3 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi @@ -16,6 +16,18 @@ reg_module_3v3: regulator-module-3v3 { }; }; =20 +&cpu_alert0 { + hysteresis =3D <2000>; + temperature =3D <90000>; + type =3D "passive"; +}; + +&cpu_crit0 { + hysteresis =3D <2000>; + temperature =3D <105000>; + type =3D "critical"; +}; + /* Colibri FastEthernet */ &fec1 { pinctrl-names =3D "default", "sleep"; --=20 2.39.2 From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 371E3C6FD20 for ; Wed, 8 Mar 2023 13:01:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230028AbjCHNBY (ORCPT ); Wed, 8 Mar 2023 08:01:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37670 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231433AbjCHNAe (ORCPT ); Wed, 8 Mar 2023 08:00:34 -0500 Received: from smtp-42aa.mail.infomaniak.ch (smtp-42aa.mail.infomaniak.ch [IPv6:2001:1600:4:17::42aa]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3A187907AC for ; Wed, 8 Mar 2023 04:59:54 -0800 (PST) Received: from smtp-2-0000.mail.infomaniak.ch (unknown [10.5.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4PWsgL52tszMrV3l; Wed, 8 Mar 2023 13:53:18 +0100 (CET) Received: from unknown by smtp-2-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4PWsgL1LbNzMslsG; Wed, 8 Mar 2023 13:53:18 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1678279998; bh=0aQVO4QE3EMr93GN5aXwmbhmG3BGBh3gFzNFrkt2N0g=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gsg65/KV/cgzEWYToZ/LwcomvquWGvXDVck548yXZVn0mIHYPi/a9Izsza8lHr8vO x9bbrNwrU2cngGB6Q5otz7ha1f0DvP3Rd8wJnkBFQH4+JUP2STcgdDTLEo8UoxKLeO qOUcQlZH4jCLmeRF6DrKYDwmUJUI/UM1RmNhX26Y= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , linux-kernel@vger.kernel.org Subject: [PATCH v1 20/25] arm64: dts: colibri-imx8x: Move gpio-keys to som level Date: Wed, 8 Mar 2023 13:52:54 +0100 Message-Id: <20230308125300.58244-21-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker SODIMM_45 that is connected to "&lsio_gpio3 10" is defined in the Colibri standard to be a wakeup pin. Move this to the SoM level device-tree and keep it disabled by default but do enable it again on the carrier-board. Signed-off-by: Philippe Schenker --- .../dts/freescale/imx8x-colibri-eval-v3.dtsi | 16 +++------------- arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi | 15 +++++++++++++++ 2 files changed, 18 insertions(+), 13 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi b/arc= h/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi index e7e3cf462408..8dfcb2cfdb68 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi @@ -17,20 +17,10 @@ clk16m: clock-16mhz-fixed { #clock-cells =3D <0>; clock-frequency =3D <16000000>; }; +}; =20 - gpio-keys { - compatible =3D "gpio-keys"; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_gpiokeys>; - - key-wakeup { - label =3D "Wake-Up"; - gpios =3D <&lsio_gpio3 10 GPIO_ACTIVE_HIGH>; - linux,code =3D ; - debounce-interval =3D <10>; - wakeup-source; - }; - }; +&colibri_gpio_keys { + status =3D "okay"; }; =20 /* Colibri FastEthernet */ diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/= boot/dts/freescale/imx8x-colibri.dtsi index 2f86a2eb4ff3..e93e22c4053b 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi @@ -8,6 +8,21 @@ chosen { stdout-path =3D &lpuart3; }; =20 + colibri_gpio_keys: gpio-keys { + compatible =3D "gpio-keys"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpiokeys>; + status =3D "disabled"; + + key-wakeup { + debounce-interval =3D <10>; + gpios =3D <&lsio_gpio3 10 GPIO_ACTIVE_HIGH>; + label =3D "Wake-Up"; + linux,code =3D ; + wakeup-source; + }; + }; + reg_module_3v3: regulator-module-3v3 { compatible =3D "regulator-fixed"; regulator-max-microvolt =3D <3300000>; --=20 2.39.2 From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 25CCEC678D5 for ; Wed, 8 Mar 2023 13:02:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231519AbjCHNC6 (ORCPT ); Wed, 8 Mar 2023 08:02:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37500 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231567AbjCHNBS (ORCPT ); Wed, 8 Mar 2023 08:01:18 -0500 Received: from smtp-8fac.mail.infomaniak.ch (smtp-8fac.mail.infomaniak.ch [IPv6:2001:1600:4:17::8fac]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BC488C48B5 for ; Wed, 8 Mar 2023 05:00:18 -0800 (PST) Received: from smtp-2-0000.mail.infomaniak.ch (unknown [10.5.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4PWsgM3BnJzMrQkn; Wed, 8 Mar 2023 13:53:19 +0100 (CET) Received: from unknown by smtp-2-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4PWsgL5r3MzMsl1Z; Wed, 8 Mar 2023 13:53:18 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1678279999; bh=ws9lUnpRTqnTj/i1ccaVLSwptFwo0tpcYo9l93lctbo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SqMMTMWsfwGiKCeZTDBiw2lYF+xKu6SyiqqUsnmRCOB0JCrmh1hNGOShARuMoVO5y oItqtvyWMhwf3dIg9S68mvbXziH7YMad7MMlcbn8HSQZVz+ILWfkSOpp3pW/55iUub rqORvCdLWZA7Q24Yjy9dAUSM2hPhUz3goM1k31Gg= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , linux-kernel@vger.kernel.org Subject: [PATCH v1 21/25] arm64: dts: colibri-imx8x: Add todo comments Date: Wed, 8 Mar 2023 13:52:55 +0100 Message-Id: <20230308125300.58244-22-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker Highlight what is still missing. Signed-off-by: Philippe Schenker --- .../boot/dts/freescale/imx8x-colibri.dtsi | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/= boot/dts/freescale/imx8x-colibri.dtsi index e93e22c4053b..f70ab4db92ed 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi @@ -31,6 +31,10 @@ reg_module_3v3: regulator-module-3v3 { }; }; =20 +/* TODO Analogue Inputs */ + +/* TODO Cooling maps for DX */ + &cpu_alert0 { hysteresis =3D <2000>; temperature =3D <90000>; @@ -64,6 +68,10 @@ ethphy0: ethernet-phy@2 { }; }; =20 +/* TODO flexcan1 - 3 */ + +/* TODO GPU */ + /* On-module I2C */ &i2c0 { #address-cells =3D <1>; @@ -92,6 +100,10 @@ touchscreen@2c { }; }; =20 +/* TODO i2c lvds0 accessible on FFC (X2) */ + +/* TODO i2c lvds1 accessible on FFC (X3) */ + /* Colibri I2C */ &i2c1 { #address-cells =3D <1>; @@ -109,6 +121,8 @@ &jpegenc { status =3D "okay"; }; =20 +/* TODO Parallel RRB */ + /* Colibri UART_B */ &lpuart0 { pinctrl-names =3D "default"; @@ -307,6 +321,14 @@ &lsio_pwm2 { pinctrl-names =3D "default"; }; =20 +/* TODO MIPI CSI */ + +/* TODO MIPI DSI with DSI-to-HDMI bridge lt8912 */ + +/* TODO on-module PCIe for Wi-Fi */ + +/* TODO On-module i2s / Audio */ + /* On-module eMMC */ &usdhc1 { pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; @@ -334,6 +356,12 @@ &usdhc2 { vmmc-supply =3D <®_module_3v3>; }; =20 +/* TODO USB Client/Host */ + +/* TODO USB Host */ + +/* TODO VPU Encoder/Decoder */ + &iomuxc { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>, --=20 2.39.2 From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A167FC64EC4 for ; Wed, 8 Mar 2023 13:02:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229874AbjCHNCu (ORCPT ); Wed, 8 Mar 2023 08:02:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38892 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231549AbjCHNBQ (ORCPT ); Wed, 8 Mar 2023 08:01:16 -0500 Received: from smtp-bc08.mail.infomaniak.ch (smtp-bc08.mail.infomaniak.ch [45.157.188.8]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8A7FEC5618 for ; Wed, 8 Mar 2023 05:00:16 -0800 (PST) Received: from smtp-2-0000.mail.infomaniak.ch (unknown [10.5.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4PWsgN1RCfzMrV3y; Wed, 8 Mar 2023 13:53:20 +0100 (CET) Received: from unknown by smtp-2-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4PWsgM3xh0zMsl1F; Wed, 8 Mar 2023 13:53:19 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1678280000; bh=HEmQDKDhNqtEuwFVObT7pXJ0pYVsgepFXgdiW53G8sU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SjLIvm1rlMjDln9zH9rxWBgE1wjLi728LPP2G8hpA0z1FTd5p7V5F/GAnfO4u0i0u BC9WLTesJtJbfaGKcwi5wcHUPtTN9rSInqVl/UZFuODKV3sH9J7LHpwDmRcjKp/9ou eNKA85pXLqrXzLXpc2+oqfTfcsdngPoWuVELraRM= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , Denys Drozdov , Fabio Estevam , Frieder Schrempf , Li Yang , Marcel Ziswiler , Marek Vasut , Matthias Schiffer , Max Krummenacher , Stefan Wahren , linux-kernel@vger.kernel.org Subject: [PATCH v1 22/25] dt-bindings: arm: fsl: Add colibri-imx8x carrier boards Date: Wed, 8 Mar 2023 13:52:56 +0100 Message-Id: <20230308125300.58244-23-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker Prepare the dt-bindings for the new colibri-imx8x carrier-boards Aster and Iris. The Toradex SoM standard is called Colibri, fix the typo. Signed-off-by: Philippe Schenker Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/fsl.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation= /devicetree/bindings/arm/fsl.yaml index 442ce8f4d675..6cb78c4ac614 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1135,10 +1135,13 @@ properties: - fsl,imx8dxl-evk # i.MX8DXL EVK Board - const: fsl,imx8dxl =20 - - description: i.MX8QXP Boards with Toradex Coilbri iMX8X Modules + - description: i.MX8QXP Boards with Toradex Colibri iMX8X Modules items: - enum: + - toradex,colibri-imx8x-aster # Colibri iMX8X Module on As= ter Board - toradex,colibri-imx8x-eval-v3 # Colibri iMX8X Module on Co= libri Evaluation Board V3 + - toradex,colibri-imx8x-iris # Colibri iMX8X Module on Ir= is Board + - toradex,colibri-imx8x-iris-v2 # Colibri iMX8X Module on Ir= is Board V2 - const: toradex,colibri-imx8x - const: fsl,imx8qxp =20 --=20 2.39.2 From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C1C34C64EC4 for ; Wed, 8 Mar 2023 13:01:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231361AbjCHNBF (ORCPT ); Wed, 8 Mar 2023 08:01:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38444 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231246AbjCHNAa (ORCPT ); Wed, 8 Mar 2023 08:00:30 -0500 Received: from smtp-1908.mail.infomaniak.ch (smtp-1908.mail.infomaniak.ch [IPv6:2001:1600:4:17::1908]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 111E8C3E1F for ; Wed, 8 Mar 2023 04:59:52 -0800 (PST) Received: from smtp-2-0000.mail.infomaniak.ch (unknown [10.5.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4PWsgN66xfzMrNXf; Wed, 8 Mar 2023 13:53:20 +0100 (CET) Received: from unknown by smtp-2-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4PWsgN28lXzMslsc; Wed, 8 Mar 2023 13:53:20 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1678280000; bh=DDNWlmW2AJ5CjJZddxWuD3LXeySSKI53LrqW8PL/pYk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=G3yw1kgjt3Kf22VaqJ5BGXmMfr9Ktu9BBY5LKDiwMPVK9BZfvbuvDMCK3RQ01neL4 w6Uicudpzyst6m47uxSPsWx7OL9dNQxBZt2+ishhRpfa3AR39j6opzsyGNrASGeC7y Sz8X0bZQzY1pltOn0gip62NgBH20cr07xnBWpsgY= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , linux-kernel@vger.kernel.org Subject: [PATCH v1 23/25] arm64: dts: colibri-imx8x: Add aster carrier board Date: Wed, 8 Mar 2023 13:52:57 +0100 Message-Id: <20230308125300.58244-24-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker Add the Toradex Aster Carrier Board for Colibri iMX8X, small form-factor with header compatible with Arduino Uno and Raspberry Pi (RPi) maker boards. Additional details available at: https://www.toradex.com/products/carrier-boards/aster-carrier-board Signed-off-by: Philippe Schenker --- arch/arm64/boot/dts/freescale/Makefile | 1 + .../dts/freescale/imx8qxp-colibri-aster.dts | 16 +++++++ .../dts/freescale/imx8x-colibri-aster.dtsi | 44 +++++++++++++++++++ 3 files changed, 61 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-colibri-aster.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8x-colibri-aster.dtsi diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/f= reescale/Makefile index 836dcc501e6f..9f49e47589ab 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -129,6 +129,7 @@ dtb-$(CONFIG_ARCH_MXC) +=3D imx8qm-apalis-v1.1-ixora-v1= .1.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8qm-apalis-v1.1-ixora-v1.2.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8qm-mek.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8qxp-ai_ml.dtb +dtb-$(CONFIG_ARCH_MXC) +=3D imx8qxp-colibri-aster.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8qxp-colibri-eval-v3.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8qxp-mek.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8ulp-evk.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-aster.dts b/arch= /arm64/boot/dts/freescale/imx8qxp-colibri-aster.dts new file mode 100644 index 000000000000..966ecfb2a17e --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-aster.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2018-2021 Toradex + */ + +/dts-v1/; + +#include "imx8qxp-colibri.dtsi" +#include "imx8x-colibri-aster.dtsi" + +/ { + model =3D "Toradex Colibri iMX8QXP on Aster Board"; + compatible =3D "toradex,colibri-imx8x-aster", + "toradex,colibri-imx8x", + "fsl,imx8qxp"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-aster.dtsi b/arch/= arm64/boot/dts/freescale/imx8x-colibri-aster.dtsi new file mode 100644 index 000000000000..aab655931cde --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-aster.dtsi @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2018-2021 Toradex + */ + +&colibri_gpio_keys { + status =3D "okay"; +}; + +/* Colibri Ethernet */ +&fec1 { + status =3D "okay"; +}; + +&iomuxc { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_hog0>; +}; + +/* Colibri SPI */ +&lpspi2 { + cs-gpios =3D <&lsio_gpio1 0 GPIO_ACTIVE_LOW>, + <&lsio_gpio5 2 GPIO_ACTIVE_LOW>; +}; + +/* Colibri UART_B */ +&lpuart0 { + status =3D "okay"; +}; + +/* Colibri UART_C */ +&lpuart2 { + status =3D "okay"; +}; + +/* Colibri UART_A */ +&lpuart3 { + status=3D "okay"; +}; + +/* Colibri SDCard */ +&usdhc2 { + status =3D "okay"; +}; --=20 2.39.2 From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A84C4C678D5 for ; Wed, 8 Mar 2023 13:02:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231592AbjCHNCh (ORCPT ); Wed, 8 Mar 2023 08:02:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39138 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231389AbjCHNBN (ORCPT ); Wed, 8 Mar 2023 08:01:13 -0500 Received: from smtp-190c.mail.infomaniak.ch (smtp-190c.mail.infomaniak.ch [185.125.25.12]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3F897C5607 for ; Wed, 8 Mar 2023 05:00:14 -0800 (PST) Received: from smtp-2-0000.mail.infomaniak.ch (unknown [10.5.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4PWsgP3XHjzMrV3W; Wed, 8 Mar 2023 13:53:21 +0100 (CET) Received: from unknown by smtp-2-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4PWsgN6tZBzMsjnP; Wed, 8 Mar 2023 13:53:20 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1678280001; bh=IXRDXQwF9OYLgTZZs91AEzYeN/DVARVdUYPlz+bx/KQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jZPxLyO0o6R8Won044sD4PmF6Vaay5VeWqse/t9J7WrlndOSmeVIRxV/StWI8xHnj nlcxpkMh5E2vQ0lPdetTdNJjfXVlOziWI18h4fx7UrIW3S0iYu9KuLqHsiBZX2PR7D uEgmnejlVfzA1CTE2/6SW1G3iWyfUngcg8RwU2io= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , linux-kernel@vger.kernel.org Subject: [PATCH v1 24/25] arm64: dts: colibri-imx8x: Add iris carrier board Date: Wed, 8 Mar 2023 13:52:58 +0100 Message-Id: <20230308125300.58244-25-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker Add the Toradex Iris Carrier Board for Colibri iMX8X, small form-factor production ready board. Additional details available at: https://www.toradex.com/products/carrier-boards/iris-carrier-board Signed-off-by: Philippe Schenker --- arch/arm64/boot/dts/freescale/Makefile | 1 + .../dts/freescale/imx8qxp-colibri-iris.dts | 16 +++ .../dts/freescale/imx8x-colibri-iris.dtsi | 115 ++++++++++++++++++ 3 files changed, 132 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-colibri-iris.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/f= reescale/Makefile index 9f49e47589ab..48bb0fe4a616 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -131,6 +131,7 @@ dtb-$(CONFIG_ARCH_MXC) +=3D imx8qm-mek.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8qxp-ai_ml.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8qxp-colibri-aster.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8qxp-colibri-eval-v3.dtb +dtb-$(CONFIG_ARCH_MXC) +=3D imx8qxp-colibri-iris.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8qxp-mek.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8ulp-evk.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx93-11x11-evk.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-iris.dts b/arch/= arm64/boot/dts/freescale/imx8qxp-colibri-iris.dts new file mode 100644 index 000000000000..fed75b5d4a1c --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-iris.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2018-2021 Toradex + */ + +/dts-v1/; + +#include "imx8qxp-colibri.dtsi" +#include "imx8x-colibri-iris.dtsi" + +/ { + model =3D "Toradex Colibri iMX8QXP on Colibri Iris Board"; + compatible =3D "toradex,colibri-imx8x-iris", + "toradex,colibri-imx8x", + "fsl,imx8qxp"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi b/arch/a= rm64/boot/dts/freescale/imx8x-colibri-iris.dtsi new file mode 100644 index 000000000000..5f30c88855e7 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi @@ -0,0 +1,115 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2018-2021 Toradex + */ + +/ { + aliases { + rtc0 =3D &rtc_i2c; + rtc1 =3D &rtc; + }; + + reg_3v3: regulator-3v3 { + compatible =3D "regulator-fixed"; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <3300000>; + regulator-name =3D "3.3V"; + }; +}; + +&colibri_gpio_keys { + status =3D "okay"; +}; + +/* Colibri FastEthernet */ +&fec1 { + status =3D "okay"; +}; + +/* Colibri I2C */ +&i2c1 { + status =3D "okay"; + + /* M41T0M6 real time clock on carrier board */ + rtc_i2c: rtc@68 { + compatible =3D "st,m41t0"; + reg =3D <0x68>; + }; +}; + +&iomuxc { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio_iris>; + + pinctrl_gpio_iris: gpioirisgrp { + fsl,pins =3D , /* SODIMM 98= */ + , /* SODIMM 133 */ + , /* SODIMM 103 */ + , /* SODIMM 101 */ + , /* SODIMM 97 */ + , /* SODIMM 85 = */ + , /* SODIMM 79 */ + ; /* SODIMM 45 */ + }; + + pinctrl_uart1_forceoff: uart1forceoffgrp { + fsl,pins =3D ; /* SODIMM 22 */ + }; + + pinctrl_uart23_forceoff: uart23forceoffgrp { + fsl,pins =3D ; /* SODIM= M 23 */ + }; +}; + +/* Colibri SPI */ +&lpspi2 { + status =3D "okay"; +}; + +/* Colibri UART_B */ +&lpuart0 { + status =3D "okay"; +}; + +/* Colibri UART_C */ +&lpuart2 { + status =3D "okay"; +}; + +/* Colibri UART_A */ +&lpuart3 { + status=3D "okay"; +}; + +&lsio_gpio3 { + /* + * This turns the LVDS transceiver on. If one wants to turn the + * transceiver off, that property has to be deleted and the gpio handled + * in userspace. + */ + lvds-tx-on-hog { + gpio-hog; + gpios =3D <18 0>; + output-high; + }; +}; + +/* Colibri PWM_B */ +&lsio_pwm0 { + status =3D "okay"; +}; + +/* Colibri PWM_C */ +&lsio_pwm1 { + status =3D "okay"; +}; + +/* Colibri PWM_D */ +&lsio_pwm2 { + status =3D "okay"; +}; + +/* Colibri SD/MMC Card */ +&usdhc2 { + status =3D "okay"; +}; --=20 2.39.2 From nobody Fri Dec 19 16:59:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2857AC678D5 for ; Wed, 8 Mar 2023 13:01:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231516AbjCHNBv (ORCPT ); Wed, 8 Mar 2023 08:01:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39152 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231455AbjCHNAl (ORCPT ); Wed, 8 Mar 2023 08:00:41 -0500 Received: from smtp-1908.mail.infomaniak.ch (smtp-1908.mail.infomaniak.ch [IPv6:2001:1600:4:17::1908]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 42828960AC for ; Wed, 8 Mar 2023 05:00:02 -0800 (PST) Received: from smtp-2-0000.mail.infomaniak.ch (unknown [10.5.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4PWsgQ157qzMrSjr; Wed, 8 Mar 2023 13:53:22 +0100 (CET) Received: from unknown by smtp-2-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4PWsgP4JgKzMsjnP; Wed, 8 Mar 2023 13:53:21 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pschenker.ch; s=20220412; t=1678280002; bh=2FdGXXkjb6i5rEbQ4Rwlc+2/P4vkTUU4G1yrn44tFXM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=wALnRfzUaQSSqxwHjRl5ePpySHVy+BeOrSZWe7guXWwKMCOKe9UIdRmb9WB6wXOeD vzNpB2zaIPhgEfDdPxkJHadhzpj92daBBPcD+QKxUzM8op7qkniMEzA5MRo8E8K9UW YaQg4Ftio32pHD8P3o7DJBWzILS1QsCh2Y+GhSFs= From: Philippe Schenker To: devicetree@vger.kernel.org, Shawn Guo , Sascha Hauer Cc: NXP Linux Team , Krzysztof Kozlowski , Rob Herring , Pengutronix Kernel Team , Frank Rowand , linux-arm-kernel@lists.infradead.org, Fabio Estevam , Philippe Schenker , linux-kernel@vger.kernel.org Subject: [PATCH v1 25/25] arm64: dts: colibri-imx8x: Add iris v2 carrier board Date: Wed, 8 Mar 2023 13:52:59 +0100 Message-Id: <20230308125300.58244-26-dev@pschenker.ch> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308125300.58244-1-dev@pschenker.ch> References: <20230308125300.58244-1-dev@pschenker.ch> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Infomaniak-Routing: alpha Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker Add the Toradex Iris V2 Carrier Board for Colibri iMX8X, small form-factor production ready board. Additional details available at: https://www.toradex.com/products/carrier-boards/iris-carrier-board Signed-off-by: Philippe Schenker --- arch/arm64/boot/dts/freescale/Makefile | 1 + .../dts/freescale/imx8qxp-colibri-iris-v2.dts | 16 +++++++ .../dts/freescale/imx8x-colibri-iris-v2.dtsi | 45 +++++++++++++++++++ 3 files changed, 62 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-colibri-iris-v2.d= ts create mode 100644 arch/arm64/boot/dts/freescale/imx8x-colibri-iris-v2.dtsi diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/f= reescale/Makefile index 48bb0fe4a616..2eb746f6a2c2 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -132,6 +132,7 @@ dtb-$(CONFIG_ARCH_MXC) +=3D imx8qxp-ai_ml.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8qxp-colibri-aster.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8qxp-colibri-eval-v3.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8qxp-colibri-iris.dtb +dtb-$(CONFIG_ARCH_MXC) +=3D imx8qxp-colibri-iris-v2.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8qxp-mek.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8ulp-evk.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx93-11x11-evk.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri-iris-v2.dts b/ar= ch/arm64/boot/dts/freescale/imx8qxp-colibri-iris-v2.dts new file mode 100644 index 000000000000..cca33213fa9b --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qxp-colibri-iris-v2.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2018-2021 Toradex + */ + +/dts-v1/; + +#include "imx8qxp-colibri.dtsi" +#include "imx8x-colibri-iris-v2.dtsi" + +/ { + model =3D "Toradex Colibri iMX8QXP on Colibri Iris V2 Board"; + compatible =3D "toradex,colibri-imx8x-iris-v2", + "toradex,colibri-imx8x", + "fsl,imx8qxp"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-iris-v2.dtsi b/arc= h/arm64/boot/dts/freescale/imx8x-colibri-iris-v2.dtsi new file mode 100644 index 000000000000..98202a437040 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-iris-v2.dtsi @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2018-2021 Toradex + */ + +#include "imx8x-colibri-iris.dtsi" + +/ { + reg_3v3_vmmc: regulator-3v3-vmmc { + compatible =3D "regulator-fixed"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_enable_3v3_vmmc>; + enable-active-high; + gpio =3D <&lsio_gpio0 31 GPIO_ACTIVE_HIGH>; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <3300000>; + regulator-name =3D "3v3_vmmc"; + startup-delay-us =3D <100>; + }; +}; + +&iomuxc { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lvds_converter &pinctrl_gpio_iris>; + + pinctrl_enable_3v3_vmmc: enable_3v3_vmmc { + fsl,pins =3D ; /* SODIMM 100 */ + }; + + pinctrl_lvds_converter: lcd-lvds { + fsl,pins =3D , /* SODIMM 55 = */ + /* 6B/8B mode. Select LOW - 8B mode (24bit) */ + , /* SODIMM 63 */ + , /* SODIMM 95 */ + ; /* SODIMM 99 */ + }; +}; + +/* Colibri SD/MMC Card */ +&usdhc2 { + cap-power-off-card; + /delete-property/ no-1-8-v; + vmmc-supply =3D <®_3v3_vmmc>; + status =3D "okay"; +}; --=20 2.39.2