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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id o11-20020a2e730b000000b002991baef49bsm251566ljc.12.2023.03.16.01.51.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 01:51:11 -0700 (PDT) From: Konrad Dybcio Date: Thu, 16 Mar 2023 09:51:07 +0100 Subject: [PATCH v5 01/10] dt-bindings: display/msm: dsi-controller-main: Fix deprecated QCM2290 compatible MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230307-topic-dsi_qcm-v5-1-9d4235b77f4f@linaro.org> References: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> In-Reply-To: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Bryan O'Donoghue , Andy Gross , Bjorn Andersson Cc: Rob Herring , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678956668; l=1083; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=Eh63V3hQJ0V0iEgOzc+LSRnQ4e7sliZ5heAo7YfywsQ=; b=0aBVkVeI/ZqqJNMp8miJ4K//LS3qrTKMSBxQoa70P28PuSQ+d9x7z6eVXh31sSjvZLUoOUVrG7eo znTwkN6hCC+O6+mSA0aiGA588ugQL8OuLP0emYeXYR9x/WhUM8b3 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The qcom, prefix was missed previously. Fix it. Fixes: 0c0f65c6dd44 ("dt-bindings: msm: dsi-controller-main: Add compatible= strings for every current SoC") Acked-by: Rob Herring Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml | 2= +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-m= ain.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-mai= n.yaml index e75a3efe4dac..2494817c1bd6 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml +++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml @@ -33,7 +33,7 @@ properties: - const: qcom,mdss-dsi-ctrl - items: - enum: - - dsi-ctrl-6g-qcm2290 + - qcom,dsi-ctrl-6g-qcm2290 - const: qcom,mdss-dsi-ctrl deprecated: true =20 --=20 2.39.2 From nobody Sun Apr 12 14:32:15 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C92FC76196 for ; Thu, 16 Mar 2023 08:52:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231178AbjCPIwr (ORCPT ); Thu, 16 Mar 2023 04:52:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46150 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230116AbjCPIwU (ORCPT ); Thu, 16 Mar 2023 04:52:20 -0400 Received: from mail-lj1-x22d.google.com (mail-lj1-x22d.google.com [IPv6:2a00:1450:4864:20::22d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 269EE94A47 for ; Thu, 16 Mar 2023 01:51:19 -0700 (PDT) Received: by mail-lj1-x22d.google.com with SMTP id x36so841513ljq.7 for ; Thu, 16 Mar 2023 01:51:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678956673; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Ja37xKiglxJ/lPrUpuyUvSbThkrJV11m94PBRXq1WhI=; b=L9mMKpZ0y15yotTtEQtS4RCEnQF5hD7h8us5pLKOa8E4hMkkhdjAE8PR03BF7fbHNF O6+wuoDHh869ug6DV4gjFNtwZqdVmxFHExwQ7TW52GDVQVpTcqmwFnE7ISOC9iFlCt2J j6e6X+vitM47swDMLg46tZxCCgOKIAjLhv0IvuOpMLbpfrupJ5c5mDSyQeJMd0Ovt3x1 rNtysADZ9UWEzwx1f/0W7YW6sDobngzto836sjEwwizK7LPh6nSk/R4jDCtMfptx5EEs djiSRFzIxlVBZ3FPlMxDfF6xGDmk1cr+Ql8PMdC8rTj4MsoD+HHHHHhENxCkDBZN1lry R7ig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678956673; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ja37xKiglxJ/lPrUpuyUvSbThkrJV11m94PBRXq1WhI=; b=3wew1IKnIv6mX6fWJg6bkDC+5+9qItbZJb1LZkN2DqMiA914pWY/kTYhGCklThBSRN MECh2PmvqblsyOSl3jcaBvEwVkB2+TdLAzLvxCHNH8uBR4Km0BRLbvUH255ZnVQSGfBW RheG59s/5N8sHpI7+KUVVnR5qBhFwEtyzOMYpqrhIHkHGmc6ZFiOfppOn7z/4P6d3s29 x9SuXWQWGdaLiE8Dz6REvs2l5oCPrHVssZ/O0trd4b6KAcoAfs4K1bZ6TO58KvK/ihXK UI4Bx0IyTKDBMJrxqAQelFIQ3KDgGcV8vWfXur1Fmea5qr2EgcNa4DApkTDqzeciAzCq 8O3A== X-Gm-Message-State: AO0yUKVviXLoBjPfVhc+UNjoDycPhElrIk9Z928/gyzqBNParyQF3pgZ ejCeKiDkg4E118u3CrMeBCjQXQ== X-Google-Smtp-Source: AK7set+uyhvhptqlttNk3GdKZVaj1SNxOsxZsEvnBrhzk7u86veDhy/Zle27W0MP91xEz+gr9K5tFg== X-Received: by 2002:a2e:8e3c:0:b0:295:a2a6:672 with SMTP id r28-20020a2e8e3c000000b00295a2a60672mr1879358ljk.10.1678956673706; Thu, 16 Mar 2023 01:51:13 -0700 (PDT) Received: from [192.168.1.101] (abyj16.neoplus.adsl.tpnet.pl. [83.9.29.16]) by smtp.gmail.com with ESMTPSA id o11-20020a2e730b000000b002991baef49bsm251566ljc.12.2023.03.16.01.51.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 01:51:13 -0700 (PDT) From: Konrad Dybcio Date: Thu, 16 Mar 2023 09:51:08 +0100 Subject: [PATCH v5 02/10] drm/msm/dsi: Get rid of msm_dsi_config::num_dsi MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230307-topic-dsi_qcm-v5-2-9d4235b77f4f@linaro.org> References: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> In-Reply-To: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Bryan O'Donoghue , Andy Gross , Bjorn Andersson Cc: Rob Herring , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678956668; l=5720; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=nAK7VhpEOKQPVDoVxGmSH//l3jkm1AocrDNJW7zWKno=; b=hgOcRqgu0xDXRY4QqYBtEKJ6MIyvPnIjrJcCpU/H7Z1PSxGnQ0YPJlUcCChkSHNsQF+NDNgECh8+ waGh95MpAuNBeu0KtbC4zlLvYVYn3Eos8ntpneAUskcWm234C2OX X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In preparation for supporting multiple sets of possible base registers, remove the num_dsi variable. We're comparing the io_start array contents with the reg value from the DTS, so it will either match one of the expected values or don't match against a zero (which we get from partial array initialization). Reviewed-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/dsi/dsi_cfg.c | 13 ------------- drivers/gpu/drm/msm/dsi/dsi_cfg.h | 1 - drivers/gpu/drm/msm/dsi/dsi_host.c | 2 +- 3 files changed, 1 insertion(+), 15 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/ds= i_cfg.c index 6d21f0b33411..4515f52b407a 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c @@ -22,7 +22,6 @@ static const struct msm_dsi_config apq8064_dsi_cfg =3D { .bus_clk_names =3D dsi_v2_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_v2_bus_clk_names), .io_start =3D { 0x4700000, 0x5800000 }, - .num_dsi =3D 2, }; =20 static const char * const dsi_6g_bus_clk_names[] =3D { @@ -42,7 +41,6 @@ static const struct msm_dsi_config msm8974_apq8084_dsi_cf= g =3D { .bus_clk_names =3D dsi_6g_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_6g_bus_clk_names), .io_start =3D { 0xfd922800, 0xfd922b00 }, - .num_dsi =3D 2, }; =20 static const char * const dsi_8916_bus_clk_names[] =3D { @@ -61,7 +59,6 @@ static const struct msm_dsi_config msm8916_dsi_cfg =3D { .bus_clk_names =3D dsi_8916_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_8916_bus_clk_names), .io_start =3D { 0x1a98000 }, - .num_dsi =3D 1, }; =20 static const char * const dsi_8976_bus_clk_names[] =3D { @@ -80,7 +77,6 @@ static const struct msm_dsi_config msm8976_dsi_cfg =3D { .bus_clk_names =3D dsi_8976_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_8976_bus_clk_names), .io_start =3D { 0x1a94000, 0x1a96000 }, - .num_dsi =3D 2, }; =20 static const struct regulator_bulk_data msm8994_dsi_regulators[] =3D { @@ -99,7 +95,6 @@ static const struct msm_dsi_config msm8994_dsi_cfg =3D { .bus_clk_names =3D dsi_6g_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_6g_bus_clk_names), .io_start =3D { 0xfd998000, 0xfd9a0000 }, - .num_dsi =3D 2, }; =20 static const char * const dsi_8996_bus_clk_names[] =3D { @@ -119,7 +114,6 @@ static const struct msm_dsi_config msm8996_dsi_cfg =3D { .bus_clk_names =3D dsi_8996_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_8996_bus_clk_names), .io_start =3D { 0x994000, 0x996000 }, - .num_dsi =3D 2, }; =20 static const char * const dsi_msm8998_bus_clk_names[] =3D { @@ -138,7 +132,6 @@ static const struct msm_dsi_config msm8998_dsi_cfg =3D { .bus_clk_names =3D dsi_msm8998_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_msm8998_bus_clk_names), .io_start =3D { 0xc994000, 0xc996000 }, - .num_dsi =3D 2, }; =20 static const char * const dsi_sdm660_bus_clk_names[] =3D { @@ -156,7 +149,6 @@ static const struct msm_dsi_config sdm660_dsi_cfg =3D { .bus_clk_names =3D dsi_sdm660_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_sdm660_bus_clk_names), .io_start =3D { 0xc994000, 0xc996000 }, - .num_dsi =3D 2, }; =20 static const char * const dsi_sdm845_bus_clk_names[] =3D { @@ -178,7 +170,6 @@ static const struct msm_dsi_config sdm845_dsi_cfg =3D { .bus_clk_names =3D dsi_sdm845_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_sdm845_bus_clk_names), .io_start =3D { 0xae94000, 0xae96000 }, - .num_dsi =3D 2, }; =20 static const struct regulator_bulk_data sm8550_dsi_regulators[] =3D { @@ -192,7 +183,6 @@ static const struct msm_dsi_config sm8550_dsi_cfg =3D { .bus_clk_names =3D dsi_sdm845_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_sdm845_bus_clk_names), .io_start =3D { 0xae94000, 0xae96000 }, - .num_dsi =3D 2, }; =20 static const struct regulator_bulk_data sc7180_dsi_regulators[] =3D { @@ -206,7 +196,6 @@ static const struct msm_dsi_config sc7180_dsi_cfg =3D { .bus_clk_names =3D dsi_sc7180_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_sc7180_bus_clk_names), .io_start =3D { 0xae94000 }, - .num_dsi =3D 1, }; =20 static const char * const dsi_sc7280_bus_clk_names[] =3D { @@ -224,7 +213,6 @@ static const struct msm_dsi_config sc7280_dsi_cfg =3D { .bus_clk_names =3D dsi_sc7280_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_sc7280_bus_clk_names), .io_start =3D { 0xae94000, 0xae96000 }, - .num_dsi =3D 2, }; =20 static const char * const dsi_qcm2290_bus_clk_names[] =3D { @@ -242,7 +230,6 @@ static const struct msm_dsi_config qcm2290_dsi_cfg =3D { .bus_clk_names =3D dsi_qcm2290_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_qcm2290_bus_clk_names), .io_start =3D { 0x5e94000 }, - .num_dsi =3D 1, }; =20 static const struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops =3D { diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.h b/drivers/gpu/drm/msm/dsi/ds= i_cfg.h index 44be4a88aa83..6b6b16c5fd25 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.h +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.h @@ -39,7 +39,6 @@ struct msm_dsi_config { const char * const *bus_clk_names; const int num_bus_clks; const resource_size_t io_start[DSI_MAX]; - const int num_dsi; }; =20 struct msm_dsi_host_cfg_ops { diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/d= si_host.c index 18fa30e1e858..9021f0d65515 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -1868,7 +1868,7 @@ static int dsi_host_get_id(struct msm_dsi_host *msm_h= ost) if (!res) return -EINVAL; =20 - for (i =3D 0; i < cfg->num_dsi; i++) { + for (i =3D 0; i < DSI_MAX; i++) { if (cfg->io_start[i] =3D=3D res->start) return i; } --=20 2.39.2 From nobody Sun Apr 12 14:32:15 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1659C6FD19 for ; Thu, 16 Mar 2023 08:53:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229888AbjCPIxU (ORCPT ); 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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id o11-20020a2e730b000000b002991baef49bsm251566ljc.12.2023.03.16.01.51.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 01:51:15 -0700 (PDT) From: Konrad Dybcio Date: Thu, 16 Mar 2023 09:51:09 +0100 Subject: [PATCH v5 03/10] drm/msm/dsi: Fix DSI index detection when version clash occurs MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230307-topic-dsi_qcm-v5-3-9d4235b77f4f@linaro.org> References: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> In-Reply-To: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Bryan O'Donoghue , Andy Gross , Bjorn Andersson Cc: Rob Herring , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678956668; l=8216; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=b+otjvnFVNWNHQbPO9HD+5KH7xMK3hiBo7WDBK4sSP4=; b=zcYTSWk9trCd7D8dSdCu9WiEcEvyemZhiibqk3qRm4btFIPGbbejZOnG5Dr/fOBmtZqtARwLme+v cmwIntkeAoYq0GWtjSdwnKc1oX/DsFhNqMjEa8wFIVy+o6n4EpoQ X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Currently, we allow for MAX_DSI entries in io_start to facilitate for MAX_DSI number of DSI hosts at different addresses. The configuration is matched against the DSI CTRL hardware revision read back from the component. We need a way to resolve situations where multiple SoCs with different register maps may use the same version of DSI CTRL. In preparation to do so, make msm_dsi_config a 2d array where each entry represents a set of configurations adequate for a given SoC. This is totally fine to do, as the only differentiating factors between same-version-different-SoCs configurations are the number of DSI hosts (1 or 2, at least as of today) and the set of base registers. The regulator setup is the same, because the DSI hardware is the same, regardless of the SoC it was implemented in. In addition to that, update the matching logic such that it will loop over VARIANTS_MAX variants, making sure they are all taken into account. Reviewed-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/dsi/dsi_cfg.c | 52 ++++++++++++++++++++++++++++------= ---- drivers/gpu/drm/msm/dsi/dsi_cfg.h | 5 +++- drivers/gpu/drm/msm/dsi/dsi_host.c | 10 ++++---- 3 files changed, 48 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/ds= i_cfg.c index 4515f52b407a..6c192963c100 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c @@ -21,7 +21,9 @@ static const struct msm_dsi_config apq8064_dsi_cfg =3D { .num_regulators =3D ARRAY_SIZE(apq8064_dsi_regulators), .bus_clk_names =3D dsi_v2_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_v2_bus_clk_names), - .io_start =3D { 0x4700000, 0x5800000 }, + .io_start =3D { + { 0x4700000, 0x5800000 }, + }, }; =20 static const char * const dsi_6g_bus_clk_names[] =3D { @@ -40,7 +42,9 @@ static const struct msm_dsi_config msm8974_apq8084_dsi_cf= g =3D { .num_regulators =3D ARRAY_SIZE(msm8974_apq8084_regulators), .bus_clk_names =3D dsi_6g_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_6g_bus_clk_names), - .io_start =3D { 0xfd922800, 0xfd922b00 }, + .io_start =3D { + { 0xfd922800, 0xfd922b00 }, + }, }; =20 static const char * const dsi_8916_bus_clk_names[] =3D { @@ -58,7 +62,9 @@ static const struct msm_dsi_config msm8916_dsi_cfg =3D { .num_regulators =3D ARRAY_SIZE(msm8916_dsi_regulators), .bus_clk_names =3D dsi_8916_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_8916_bus_clk_names), - .io_start =3D { 0x1a98000 }, + .io_start =3D { + { 0x1a98000 }, + }, }; =20 static const char * const dsi_8976_bus_clk_names[] =3D { @@ -76,7 +82,9 @@ static const struct msm_dsi_config msm8976_dsi_cfg =3D { .num_regulators =3D ARRAY_SIZE(msm8976_dsi_regulators), .bus_clk_names =3D dsi_8976_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_8976_bus_clk_names), - .io_start =3D { 0x1a94000, 0x1a96000 }, + .io_start =3D { + { 0x1a94000, 0x1a96000 }, + }, }; =20 static const struct regulator_bulk_data msm8994_dsi_regulators[] =3D { @@ -94,7 +102,9 @@ static const struct msm_dsi_config msm8994_dsi_cfg =3D { .num_regulators =3D ARRAY_SIZE(msm8994_dsi_regulators), .bus_clk_names =3D dsi_6g_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_6g_bus_clk_names), - .io_start =3D { 0xfd998000, 0xfd9a0000 }, + .io_start =3D { + { 0xfd998000, 0xfd9a0000 }, + }, }; =20 static const char * const dsi_8996_bus_clk_names[] =3D { @@ -113,7 +123,9 @@ static const struct msm_dsi_config msm8996_dsi_cfg =3D { .num_regulators =3D ARRAY_SIZE(msm8996_dsi_regulators), .bus_clk_names =3D dsi_8996_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_8996_bus_clk_names), - .io_start =3D { 0x994000, 0x996000 }, + .io_start =3D { + { 0x994000, 0x996000 }, + }, }; =20 static const char * const dsi_msm8998_bus_clk_names[] =3D { @@ -131,7 +143,9 @@ static const struct msm_dsi_config msm8998_dsi_cfg =3D { .num_regulators =3D ARRAY_SIZE(msm8998_dsi_regulators), .bus_clk_names =3D dsi_msm8998_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_msm8998_bus_clk_names), - .io_start =3D { 0xc994000, 0xc996000 }, + .io_start =3D { + { 0xc994000, 0xc996000 }, + }, }; =20 static const char * const dsi_sdm660_bus_clk_names[] =3D { @@ -148,7 +162,9 @@ static const struct msm_dsi_config sdm660_dsi_cfg =3D { .num_regulators =3D ARRAY_SIZE(sdm660_dsi_regulators), .bus_clk_names =3D dsi_sdm660_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_sdm660_bus_clk_names), - .io_start =3D { 0xc994000, 0xc996000 }, + .io_start =3D { + { 0xc994000, 0xc996000 }, + }, }; =20 static const char * const dsi_sdm845_bus_clk_names[] =3D { @@ -169,7 +185,9 @@ static const struct msm_dsi_config sdm845_dsi_cfg =3D { .num_regulators =3D ARRAY_SIZE(sdm845_dsi_regulators), .bus_clk_names =3D dsi_sdm845_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_sdm845_bus_clk_names), - .io_start =3D { 0xae94000, 0xae96000 }, + .io_start =3D { + { 0xae94000, 0xae96000 }, + }, }; =20 static const struct regulator_bulk_data sm8550_dsi_regulators[] =3D { @@ -182,7 +200,9 @@ static const struct msm_dsi_config sm8550_dsi_cfg =3D { .num_regulators =3D ARRAY_SIZE(sm8550_dsi_regulators), .bus_clk_names =3D dsi_sdm845_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_sdm845_bus_clk_names), - .io_start =3D { 0xae94000, 0xae96000 }, + .io_start =3D { + { 0xae94000, 0xae96000 }, + }, }; =20 static const struct regulator_bulk_data sc7180_dsi_regulators[] =3D { @@ -195,7 +215,9 @@ static const struct msm_dsi_config sc7180_dsi_cfg =3D { .num_regulators =3D ARRAY_SIZE(sc7180_dsi_regulators), .bus_clk_names =3D dsi_sc7180_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_sc7180_bus_clk_names), - .io_start =3D { 0xae94000 }, + .io_start =3D { + { 0xae94000 }, + }, }; =20 static const char * const dsi_sc7280_bus_clk_names[] =3D { @@ -212,7 +234,9 @@ static const struct msm_dsi_config sc7280_dsi_cfg =3D { .num_regulators =3D ARRAY_SIZE(sc7280_dsi_regulators), .bus_clk_names =3D dsi_sc7280_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_sc7280_bus_clk_names), - .io_start =3D { 0xae94000, 0xae96000 }, + .io_start =3D { + { 0xae94000, 0xae96000 }, + }, }; =20 static const char * const dsi_qcm2290_bus_clk_names[] =3D { @@ -229,7 +253,9 @@ static const struct msm_dsi_config qcm2290_dsi_cfg =3D { .num_regulators =3D ARRAY_SIZE(qcm2290_dsi_cfg_regulators), .bus_clk_names =3D dsi_qcm2290_bus_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_qcm2290_bus_clk_names), - .io_start =3D { 0x5e94000 }, + .io_start =3D { + { 0x5e94000 }, + }, }; =20 static const struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops =3D { diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.h b/drivers/gpu/drm/msm/dsi/ds= i_cfg.h index 6b6b16c5fd25..8772a3631ac1 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.h +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.h @@ -32,13 +32,16 @@ =20 #define DSI_6G_REG_SHIFT 4 =20 +/* Maximum number of configurations matched against the same hw revision */ +#define VARIANTS_MAX 2 + struct msm_dsi_config { u32 io_offset; const struct regulator_bulk_data *regulator_data; int num_regulators; const char * const *bus_clk_names; const int num_bus_clks; - const resource_size_t io_start[DSI_MAX]; + const resource_size_t io_start[VARIANTS_MAX][DSI_MAX]; }; =20 struct msm_dsi_host_cfg_ops { diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/d= si_host.c index 9021f0d65515..9cfb9e91bfea 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -1862,16 +1862,16 @@ static int dsi_host_get_id(struct msm_dsi_host *msm= _host) struct platform_device *pdev =3D msm_host->pdev; const struct msm_dsi_config *cfg =3D msm_host->cfg_hnd->cfg; struct resource *res; - int i; + int i, j; =20 res =3D platform_get_resource_byname(pdev, IORESOURCE_MEM, "dsi_ctrl"); if (!res) return -EINVAL; =20 - for (i =3D 0; i < DSI_MAX; i++) { - if (cfg->io_start[i] =3D=3D res->start) - return i; - } + for (i =3D 0; i < VARIANTS_MAX; i++) + for (j =3D 0; j < DSI_MAX; j++) + if (cfg->io_start[i][j] =3D=3D res->start) + return j; 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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id o11-20020a2e730b000000b002991baef49bsm251566ljc.12.2023.03.16.01.51.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 01:51:16 -0700 (PDT) From: Konrad Dybcio Date: Thu, 16 Mar 2023 09:51:10 +0100 Subject: [PATCH v5 04/10] drm/msm/dsi: dsi_cfg: Deduplicate identical structs MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230307-topic-dsi_qcm-v5-4-9d4235b77f4f@linaro.org> References: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> In-Reply-To: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Bryan O'Donoghue , Andy Gross , Bjorn Andersson Cc: Rob Herring , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678956668; l=7014; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=eQGewel5eMIUbnjRWU8o9jYKXbfa44urQPoDhCO0rnI=; b=SsPYU6abTVgFrbgo+KmZ3KUlWvIvCkRzHRqXpGGxJP3ioxboCZ3VUBwS49B5NBlATDvaco/QY//Y 39+um3miCRM/+8hPOjohWTzZ/8j/icTCsUhI3Vw/TwKKkybQKh08 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some structs were defined multiple times for no apparent reason. Deduplicate them. Reviewed-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/dsi/dsi_cfg.c | 93 +++++++++++++----------------------= ---- 1 file changed, 30 insertions(+), 63 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/ds= i_cfg.c index 6c192963c100..039f503233d7 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c @@ -47,41 +47,32 @@ static const struct msm_dsi_config msm8974_apq8084_dsi_= cfg =3D { }, }; =20 -static const char * const dsi_8916_bus_clk_names[] =3D { +static const char * const dsi_v1_3_1_clk_names[] =3D { "mdp_core", "iface", "bus", }; =20 -static const struct regulator_bulk_data msm8916_dsi_regulators[] =3D { +static const struct regulator_bulk_data dsi_v1_3_1_regulators[] =3D { { .supply =3D "vdda", .init_load_uA =3D 100000 }, /* 1.2 V */ { .supply =3D "vddio", .init_load_uA =3D 100000 }, /* 1.8 V */ }; =20 static const struct msm_dsi_config msm8916_dsi_cfg =3D { .io_offset =3D DSI_6G_REG_SHIFT, - .regulator_data =3D msm8916_dsi_regulators, - .num_regulators =3D ARRAY_SIZE(msm8916_dsi_regulators), - .bus_clk_names =3D dsi_8916_bus_clk_names, - .num_bus_clks =3D ARRAY_SIZE(dsi_8916_bus_clk_names), + .regulator_data =3D dsi_v1_3_1_regulators, + .num_regulators =3D ARRAY_SIZE(dsi_v1_3_1_regulators), + .bus_clk_names =3D dsi_v1_3_1_clk_names, + .num_bus_clks =3D ARRAY_SIZE(dsi_v1_3_1_clk_names), .io_start =3D { { 0x1a98000 }, }, }; =20 -static const char * const dsi_8976_bus_clk_names[] =3D { - "mdp_core", "iface", "bus", -}; - -static const struct regulator_bulk_data msm8976_dsi_regulators[] =3D { - { .supply =3D "vdda", .init_load_uA =3D 100000 }, /* 1.2 V */ - { .supply =3D "vddio", .init_load_uA =3D 100000 }, /* 1.8 V */ -}; - static const struct msm_dsi_config msm8976_dsi_cfg =3D { .io_offset =3D DSI_6G_REG_SHIFT, - .regulator_data =3D msm8976_dsi_regulators, - .num_regulators =3D ARRAY_SIZE(msm8976_dsi_regulators), - .bus_clk_names =3D dsi_8976_bus_clk_names, - .num_bus_clks =3D ARRAY_SIZE(dsi_8976_bus_clk_names), + .regulator_data =3D dsi_v1_3_1_regulators, + .num_regulators =3D ARRAY_SIZE(dsi_v1_3_1_regulators), + .bus_clk_names =3D dsi_v1_3_1_clk_names, + .num_bus_clks =3D ARRAY_SIZE(dsi_v1_3_1_clk_names), .io_start =3D { { 0x1a94000, 0x1a96000 }, }, @@ -107,10 +98,6 @@ static const struct msm_dsi_config msm8994_dsi_cfg =3D { }, }; =20 -static const char * const dsi_8996_bus_clk_names[] =3D { - "mdp_core", "iface", "bus", "core_mmss", -}; - static const struct regulator_bulk_data msm8996_dsi_regulators[] =3D { { .supply =3D "vdda", .init_load_uA =3D 18160 }, /* 1.25 V */ { .supply =3D "vcca", .init_load_uA =3D 17000 }, /* 0.925 V */ @@ -121,8 +108,8 @@ static const struct msm_dsi_config msm8996_dsi_cfg =3D { .io_offset =3D DSI_6G_REG_SHIFT, .regulator_data =3D msm8996_dsi_regulators, .num_regulators =3D ARRAY_SIZE(msm8996_dsi_regulators), - .bus_clk_names =3D dsi_8996_bus_clk_names, - .num_bus_clks =3D ARRAY_SIZE(dsi_8996_bus_clk_names), + .bus_clk_names =3D dsi_6g_bus_clk_names, + .num_bus_clks =3D ARRAY_SIZE(dsi_6g_bus_clk_names), .io_start =3D { { 0x994000, 0x996000 }, }, @@ -167,24 +154,20 @@ static const struct msm_dsi_config sdm660_dsi_cfg =3D= { }, }; =20 -static const char * const dsi_sdm845_bus_clk_names[] =3D { +static const char * const dsi_v2_4_clk_names[] =3D { "iface", "bus", }; =20 -static const char * const dsi_sc7180_bus_clk_names[] =3D { - "iface", "bus", -}; - -static const struct regulator_bulk_data sdm845_dsi_regulators[] =3D { +static const struct regulator_bulk_data dsi_v2_4_regulators[] =3D { { .supply =3D "vdda", .init_load_uA =3D 21800 }, /* 1.2 V */ }; =20 static const struct msm_dsi_config sdm845_dsi_cfg =3D { .io_offset =3D DSI_6G_REG_SHIFT, - .regulator_data =3D sdm845_dsi_regulators, - .num_regulators =3D ARRAY_SIZE(sdm845_dsi_regulators), - .bus_clk_names =3D dsi_sdm845_bus_clk_names, - .num_bus_clks =3D ARRAY_SIZE(dsi_sdm845_bus_clk_names), + .regulator_data =3D dsi_v2_4_regulators, + .num_regulators =3D ARRAY_SIZE(dsi_v2_4_regulators), + .bus_clk_names =3D dsi_v2_4_clk_names, + .num_bus_clks =3D ARRAY_SIZE(dsi_v2_4_clk_names), .io_start =3D { { 0xae94000, 0xae96000 }, }, @@ -198,32 +181,24 @@ static const struct msm_dsi_config sm8550_dsi_cfg =3D= { .io_offset =3D DSI_6G_REG_SHIFT, .regulator_data =3D sm8550_dsi_regulators, .num_regulators =3D ARRAY_SIZE(sm8550_dsi_regulators), - .bus_clk_names =3D dsi_sdm845_bus_clk_names, - .num_bus_clks =3D ARRAY_SIZE(dsi_sdm845_bus_clk_names), + .bus_clk_names =3D dsi_v2_4_clk_names, + .num_bus_clks =3D ARRAY_SIZE(dsi_v2_4_clk_names), .io_start =3D { { 0xae94000, 0xae96000 }, }, }; =20 -static const struct regulator_bulk_data sc7180_dsi_regulators[] =3D { - { .supply =3D "vdda", .init_load_uA =3D 21800 }, /* 1.2 V */ -}; - static const struct msm_dsi_config sc7180_dsi_cfg =3D { .io_offset =3D DSI_6G_REG_SHIFT, - .regulator_data =3D sc7180_dsi_regulators, - .num_regulators =3D ARRAY_SIZE(sc7180_dsi_regulators), - .bus_clk_names =3D dsi_sc7180_bus_clk_names, - .num_bus_clks =3D ARRAY_SIZE(dsi_sc7180_bus_clk_names), + .regulator_data =3D dsi_v2_4_regulators, + .num_regulators =3D ARRAY_SIZE(dsi_v2_4_regulators), + .bus_clk_names =3D dsi_v2_4_clk_names, + .num_bus_clks =3D ARRAY_SIZE(dsi_v2_4_clk_names), .io_start =3D { { 0xae94000 }, }, }; =20 -static const char * const dsi_sc7280_bus_clk_names[] =3D { - "iface", "bus", -}; - static const struct regulator_bulk_data sc7280_dsi_regulators[] =3D { { .supply =3D "vdda", .init_load_uA =3D 8350 }, /* 1.2 V */ }; @@ -232,27 +207,19 @@ static const struct msm_dsi_config sc7280_dsi_cfg =3D= { .io_offset =3D DSI_6G_REG_SHIFT, .regulator_data =3D sc7280_dsi_regulators, .num_regulators =3D ARRAY_SIZE(sc7280_dsi_regulators), - .bus_clk_names =3D dsi_sc7280_bus_clk_names, - .num_bus_clks =3D ARRAY_SIZE(dsi_sc7280_bus_clk_names), + .bus_clk_names =3D dsi_v2_4_clk_names, + .num_bus_clks =3D ARRAY_SIZE(dsi_v2_4_clk_names), .io_start =3D { { 0xae94000, 0xae96000 }, }, }; =20 -static const char * const dsi_qcm2290_bus_clk_names[] =3D { - "iface", "bus", -}; - -static const struct regulator_bulk_data qcm2290_dsi_cfg_regulators[] =3D { - { .supply =3D "vdda", .init_load_uA =3D 21800 }, /* 1.2 V */ -}; - static const struct msm_dsi_config qcm2290_dsi_cfg =3D { .io_offset =3D DSI_6G_REG_SHIFT, - .regulator_data =3D qcm2290_dsi_cfg_regulators, - .num_regulators =3D ARRAY_SIZE(qcm2290_dsi_cfg_regulators), - .bus_clk_names =3D dsi_qcm2290_bus_clk_names, - .num_bus_clks =3D ARRAY_SIZE(dsi_qcm2290_bus_clk_names), + .regulator_data =3D dsi_v2_4_regulators, + .num_regulators =3D ARRAY_SIZE(dsi_v2_4_regulators), + .bus_clk_names =3D dsi_v2_4_clk_names, + .num_bus_clks =3D ARRAY_SIZE(dsi_v2_4_clk_names), .io_start =3D { { 0x5e94000 }, }, --=20 2.39.2 From nobody Sun Apr 12 14:32:15 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AAE47C7618D for ; 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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id o11-20020a2e730b000000b002991baef49bsm251566ljc.12.2023.03.16.01.51.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 01:51:18 -0700 (PDT) From: Konrad Dybcio Date: Thu, 16 Mar 2023 09:51:11 +0100 Subject: [PATCH v5 05/10] drm/msm/dsi: dsi_cfg: Merge SC7180 config into SDM845 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230307-topic-dsi_qcm-v5-5-9d4235b77f4f@linaro.org> References: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> In-Reply-To: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Bryan O'Donoghue , Andy Gross , Bjorn Andersson Cc: Rob Herring , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678956668; l=2206; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=+ePdH/Gl1hrkxIW7hm63Vg7SPtBJUhhLLi5EVaR0ltI=; b=8w//WdCiKTQ1Q2mhPCF/4PAiIaiCmaFTpPkBRC3P/oNR0L6U5mJ93AkvvZdml7I4DSw1vUGThg5m +c0fcqs/A/gr4u5jrlAebphEnTwXQjUTFvQNHhrO7qkuDhYuOU8S X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The configs are identical, other than the number of *maximum* DSI hosts allowed. This isn't an issue, unless somebody deliberately tries to access the inexistent host by adding a dt node for it. Remove the SC7180 struct and point the hw revision match to the SDM845's one. On a note, this could have been done back when 7180 support was introduced. Reviewed-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/dsi/dsi_cfg.c | 15 ++------------- 1 file changed, 2 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/ds= i_cfg.c index 039f503233d7..03d98cbcc978 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c @@ -169,7 +169,7 @@ static const struct msm_dsi_config sdm845_dsi_cfg =3D { .bus_clk_names =3D dsi_v2_4_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_v2_4_clk_names), .io_start =3D { - { 0xae94000, 0xae96000 }, + { 0xae94000, 0xae96000 }, /* SDM845 / SDM670 / SC7180 */ }, }; =20 @@ -188,17 +188,6 @@ static const struct msm_dsi_config sm8550_dsi_cfg =3D { }, }; =20 -static const struct msm_dsi_config sc7180_dsi_cfg =3D { - .io_offset =3D DSI_6G_REG_SHIFT, - .regulator_data =3D dsi_v2_4_regulators, - .num_regulators =3D ARRAY_SIZE(dsi_v2_4_regulators), - .bus_clk_names =3D dsi_v2_4_clk_names, - .num_bus_clks =3D ARRAY_SIZE(dsi_v2_4_clk_names), - .io_start =3D { - { 0xae94000 }, - }, -}; - static const struct regulator_bulk_data sc7280_dsi_regulators[] =3D { { .supply =3D "vdda", .init_load_uA =3D 8350 }, /* 1.2 V */ }; @@ -291,7 +280,7 @@ static const struct msm_dsi_cfg_handler dsi_cfg_handler= s[] =3D { {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_0, &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_1, - &sc7180_dsi_cfg, &msm_dsi_6g_v2_host_ops}, + &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_5_0, &sc7280_dsi_cfg, &msm_dsi_6g_v2_host_ops}, {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_6_0, --=20 2.39.2 From nobody Sun Apr 12 14:32:15 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE6A4C6FD19 for ; Thu, 16 Mar 2023 08:52:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230027AbjCPIwz (ORCPT ); Thu, 16 Mar 2023 04:52:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45788 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229838AbjCPIwY (ORCPT ); Thu, 16 Mar 2023 04:52:24 -0400 Received: from mail-lj1-x22c.google.com (mail-lj1-x22c.google.com [IPv6:2a00:1450:4864:20::22c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7681022791 for ; Thu, 16 Mar 2023 01:51:25 -0700 (PDT) Received: by mail-lj1-x22c.google.com with SMTP id z5so840220ljc.8 for ; Thu, 16 Mar 2023 01:51:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678956680; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=4ybpWSBp4lClKqhK/g5tZCNekBaDds3KID0LOYjNmjg=; b=zouSvFH1v/9SmuQivtr2cUC78XlCmCieUzZwqnfbhZ3jftbLu0iT90FS6zllJ8VdSC 27HwGoOYGSWhRVAz1ZAzhRp9Bxb6WCJX0jWWn4Co8ChAO9EVgfYwQ3eCpYyScpTNzB/p xgKIjAhhZmTy5MVczMdsBx9MhfksaqAPaYk3iDuTBjhyL8mppXKr8GOqgOR1G6SIvjHr rzg1ViFPC6edhwxhDuWlAdR1kvJv/Gueqc6LidyEmStzGEUpMc/9bj8j57ZZJI9TBzzE ULYxsIB0okR1hTQNUAsAN++HTZmf/eQQDQNk+OURE2HYgEHeMmvisFhWR6kaIOca3/yw ORBA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678956680; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4ybpWSBp4lClKqhK/g5tZCNekBaDds3KID0LOYjNmjg=; b=Sg3m23a1nwu6qcMM3DF4lOZAGitY6hGd5kFMKbFAVF2k55FiQ049DoGzV8IRijWh4N lv6bwe60a9fTcSriLQkqpnhZ84Tg8LYzNZMyjBtsHmEWs14fsITSN4TYS5fwaC7ZGCrC DEcgvd4B2AvK7ZSggu8XeB92HnuM+vL1Ctteh19PBgRx1wW5UOszf+c5iyNGQMPqIDuE orpG+fEB0PXjfTp8t+vbuoQE66O7tRjS20vnHkiYbaucberrJOmRAudBbzkYZefFbQHD 6l6HO3M8/6J7bU0AJfMwvz5tcYokVuQw/1CyLQuaerK2OZRakDiY4lz67L87N2r6dS8T sXUw== X-Gm-Message-State: AO0yUKWep3eGbxc5UCs7I76IuuyXG+luePfkgo5h9NUbRvykIePeT21h EIZb5QMXEsmDOYITl02i7tj+1A== X-Google-Smtp-Source: AK7set92YKItNUiB2mDFP0GuhQVCTqEiACYYmeQWLkBO9sO5XU+ACgEmmSx1OSxwER09dcaT9BaGFA== X-Received: by 2002:a2e:97da:0:b0:298:7018:e2e7 with SMTP id m26-20020a2e97da000000b002987018e2e7mr1791452ljj.22.1678956680108; Thu, 16 Mar 2023 01:51:20 -0700 (PDT) Received: from [192.168.1.101] (abyj16.neoplus.adsl.tpnet.pl. [83.9.29.16]) by smtp.gmail.com with ESMTPSA id o11-20020a2e730b000000b002991baef49bsm251566ljc.12.2023.03.16.01.51.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 01:51:19 -0700 (PDT) From: Konrad Dybcio Date: Thu, 16 Mar 2023 09:51:12 +0100 Subject: [PATCH v5 06/10] drm/msm/dsi: Switch the QCM2290-specific compatible to index autodetection MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230307-topic-dsi_qcm-v5-6-9d4235b77f4f@linaro.org> References: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> In-Reply-To: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Bryan O'Donoghue , Andy Gross , Bjorn Andersson Cc: Rob Herring , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678956668; l=3233; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=e/ZDvN1pmXEVddNSmMJ2iSlA9sSO8FBakW2FjAcs2pg=; b=8OFXVaPb/ToMkkmzsNU09aSl0aeWkDVN7OG+mFMgcET+hNQVHVpGr8xWjapYvsUapZkbZfXQuztK PtFBo8ZlBBPuRZWr6Si4F9qWzgVMCkfdWW7i2Y82KiQK58tJvAA8 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Now that the logic can handle multiple sets of registers, move the QCM2290 to the common logic and mark it deprecated. This allows us to remove a couple of structs, saving some memory. Reviewed-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/dsi/dsi.c | 5 +++-- drivers/gpu/drm/msm/dsi/dsi_cfg.c | 20 ++------------------ drivers/gpu/drm/msm/dsi/dsi_cfg.h | 3 --- 3 files changed, 5 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi.c b/drivers/gpu/drm/msm/dsi/dsi.c index 31fdee2052be..f761973e4cba 100644 --- a/drivers/gpu/drm/msm/dsi/dsi.c +++ b/drivers/gpu/drm/msm/dsi/dsi.c @@ -4,7 +4,6 @@ */ =20 #include "dsi.h" -#include "dsi_cfg.h" =20 bool msm_dsi_is_cmd_mode(struct msm_dsi *msm_dsi) { @@ -174,7 +173,9 @@ static int dsi_dev_remove(struct platform_device *pdev) =20 static const struct of_device_id dt_match[] =3D { { .compatible =3D "qcom,mdss-dsi-ctrl", .data =3D NULL /* autodetect cfg = */ }, - { .compatible =3D "qcom,dsi-ctrl-6g-qcm2290", .data =3D &qcm2290_dsi_cfg_= handler }, + + /* Deprecated, don't use */ + { .compatible =3D "qcom,dsi-ctrl-6g-qcm2290", .data =3D NULL }, {} }; =20 diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/ds= i_cfg.c index 03d98cbcc978..29ccd755cc2e 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c @@ -169,7 +169,8 @@ static const struct msm_dsi_config sdm845_dsi_cfg =3D { .bus_clk_names =3D dsi_v2_4_clk_names, .num_bus_clks =3D ARRAY_SIZE(dsi_v2_4_clk_names), .io_start =3D { - { 0xae94000, 0xae96000 }, /* SDM845 / SDM670 / SC7180 */ + { 0xae94000, 0xae96000 }, /* SDM845 / SDM670 */ + { 0x5e94000 }, /* QCM2290 / SM6115 / SM6125 / SM6375 */ }, }; =20 @@ -203,17 +204,6 @@ static const struct msm_dsi_config sc7280_dsi_cfg =3D { }, }; =20 -static const struct msm_dsi_config qcm2290_dsi_cfg =3D { - .io_offset =3D DSI_6G_REG_SHIFT, - .regulator_data =3D dsi_v2_4_regulators, - .num_regulators =3D ARRAY_SIZE(dsi_v2_4_regulators), - .bus_clk_names =3D dsi_v2_4_clk_names, - .num_bus_clks =3D ARRAY_SIZE(dsi_v2_4_clk_names), - .io_start =3D { - { 0x5e94000 }, - }, -}; - static const struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops =3D { .link_clk_set_rate =3D dsi_link_clk_set_rate_v2, .link_clk_enable =3D dsi_link_clk_enable_v2, @@ -304,9 +294,3 @@ const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 m= ajor, u32 minor) =20 return cfg_hnd; } - -/* Non autodetect configs */ -const struct msm_dsi_cfg_handler qcm2290_dsi_cfg_handler =3D { - .cfg =3D &qcm2290_dsi_cfg, - .ops =3D &msm_dsi_6g_v2_host_ops, -}; diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.h b/drivers/gpu/drm/msm/dsi/ds= i_cfg.h index 8772a3631ac1..91bdaf50bb1a 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.h +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.h @@ -65,8 +65,5 @@ struct msm_dsi_cfg_handler { =20 const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor); =20 -/* Non autodetect configs */ -extern const struct msm_dsi_cfg_handler qcm2290_dsi_cfg_handler; - #endif /* __MSM_DSI_CFG_H__ */ =20 --=20 2.39.2 From nobody Sun Apr 12 14:32:15 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5069FC6FD19 for ; Thu, 16 Mar 2023 08:53:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229896AbjCPIxO (ORCPT ); Thu, 16 Mar 2023 04:53:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46222 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231127AbjCPIw1 (ORCPT ); Thu, 16 Mar 2023 04:52:27 -0400 Received: from mail-lf1-x12f.google.com (mail-lf1-x12f.google.com [IPv6:2a00:1450:4864:20::12f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DA40FB7181 for ; Thu, 16 Mar 2023 01:51:27 -0700 (PDT) Received: by mail-lf1-x12f.google.com with SMTP id x17so1366374lfu.5 for ; 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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id o11-20020a2e730b000000b002991baef49bsm251566ljc.12.2023.03.16.01.51.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 01:51:21 -0700 (PDT) From: Konrad Dybcio Date: Thu, 16 Mar 2023 09:51:13 +0100 Subject: [PATCH v5 07/10] drm/msm/dsi: Remove custom DSI config handling MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230307-topic-dsi_qcm-v5-7-9d4235b77f4f@linaro.org> References: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> In-Reply-To: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Bryan O'Donoghue , Andy Gross , Bjorn Andersson Cc: Rob Herring , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678956668; l=1730; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=F4fPirOHyMQPj35ost0pdi8esBWoDrjWNUljpExX+4U=; b=FL/r6rvLYNSYDNfxE3wvGBoxEwQ/m3wkv470pmFuq27VtanvQIIOf7xBKwiqIZyhM9Ok3ofPqSOM qwkknPNnDy8cfZ9kpkusgCrzafDZeyJpNEQ/i7+w1iFvb6rc6Td0 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Now that the only user is handled by common code, remove the option to specify custom handlers through match data. This is effectively a revert of commit: 5ae15e76271 ("drm/msm/dsi: Allow to specify dsi config as pdata") Reviewed-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/dsi/dsi.c | 4 ++-- drivers/gpu/drm/msm/dsi/dsi_host.c | 4 ---- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi.c b/drivers/gpu/drm/msm/dsi/dsi.c index f761973e4cba..baab79ab6e74 100644 --- a/drivers/gpu/drm/msm/dsi/dsi.c +++ b/drivers/gpu/drm/msm/dsi/dsi.c @@ -172,10 +172,10 @@ static int dsi_dev_remove(struct platform_device *pde= v) } =20 static const struct of_device_id dt_match[] =3D { - { .compatible =3D "qcom,mdss-dsi-ctrl", .data =3D NULL /* autodetect cfg = */ }, + { .compatible =3D "qcom,mdss-dsi-ctrl" }, =20 /* Deprecated, don't use */ - { .compatible =3D "qcom,dsi-ctrl-6g-qcm2290", .data =3D NULL }, + { .compatible =3D "qcom,dsi-ctrl-6g-qcm2290" }, {} }; =20 diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/d= si_host.c index 9cfb9e91bfea..961689a255c4 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -214,10 +214,6 @@ static const struct msm_dsi_cfg_handler *dsi_get_confi= g( int ret; u32 major =3D 0, minor =3D 0; =20 - cfg_hnd =3D device_get_match_data(dev); - if (cfg_hnd) - return cfg_hnd; - ahb_clk =3D msm_clk_get(msm_host->pdev, "iface"); if (IS_ERR(ahb_clk)) { pr_err("%s: cannot get interface clock\n", __func__); --=20 2.39.2 From nobody Sun Apr 12 14:32:15 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EBF11C6FD19 for ; Thu, 16 Mar 2023 08:53:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229512AbjCPIxC (ORCPT ); Thu, 16 Mar 2023 04:53:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45572 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229717AbjCPIw0 (ORCPT ); Thu, 16 Mar 2023 04:52:26 -0400 Received: from mail-lj1-x22a.google.com (mail-lj1-x22a.google.com [IPv6:2a00:1450:4864:20::22a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C3746B7187 for ; Thu, 16 Mar 2023 01:51:28 -0700 (PDT) Received: by mail-lj1-x22a.google.com with SMTP id b13so846873ljf.6 for ; Thu, 16 Mar 2023 01:51:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678956683; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=0GttnUpSMQrNUPBOzshROVp8f4Y5lS6s/EI+l80bqFw=; b=kor1lxAULsgXkpl5n64+yKp3HEn3UHihlasLo4LG+IOiKjqo1qtzr1e5I/ghTBAylY BCoZPVTDVpOVOWIbDNddIMYOAXk6EEyYrsFqKaa5+FnmIJhNEuurv5b0RcODOjjXuDN0 PM2JSV7/QYTIVm85BHodt4ikndfKKD8HBosxsc1RGNfLC1O9dVl2Mn0c5CtGjgmK1kOF fHTtwg6SBZkgxtJtbReG5xwaoMzywUUN8BhqF5vrpxWZnTfNlaLGR9dO5PmKAG+QieFi QD5f71lxG8Ou3wJL/5WHhlZUbech32UsOKsG7bVeGODz300d6VYJ6SyiEWRmVBwgkMmE Qjrw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678956683; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0GttnUpSMQrNUPBOzshROVp8f4Y5lS6s/EI+l80bqFw=; b=iYu+tgWHI9fmKmTMmSeRnYFE0nJOQ0MUawALtYKN0KpiAnJ0E8ORCdnl9V8a6917+C jidjy/7OkK1jOcWXSsHGIaTJWmcTIA2acOLB2Eks2u+MxfDudcGCtpIqu/u8ZH3KLnPz z1Rscfz7X7NrbHmgLv+YSNjGMstjuJgneLGo+9G+JtYPvm4UHeRwHcGTdhs31JCZ8/dv LvH4E7R1Rm++qgCERvEUuXq1Zp1bCHj/c1b48MhW70BjwCNQAfu50TQPnY3IK+JE1tug AofBQqcDGqppEuUkOJ2RU8YAfeclMvzMl66y3/G71ASlAOpU95oUqKp1bwSTqPvOykcr rKHQ== X-Gm-Message-State: AO0yUKXDruiEBKL8pxbQE6pujqNxv8k5VrjbHxBXgputbDkI1F9AtT8y KjNlWmXlLBaZEBYeBcPBRcsOAQ== X-Google-Smtp-Source: AK7set+Auq5+dK5gJxeZ4K0r+SZ3n9ajfcsMSJJWCPkouivw5kREanh325/ho0hHzItRpdsZj7o0LA== X-Received: by 2002:a2e:b81a:0:b0:295:9d32:a653 with SMTP id u26-20020a2eb81a000000b002959d32a653mr1892728ljo.35.1678956683403; Thu, 16 Mar 2023 01:51:23 -0700 (PDT) Received: from [192.168.1.101] (abyj16.neoplus.adsl.tpnet.pl. [83.9.29.16]) by smtp.gmail.com with ESMTPSA id o11-20020a2e730b000000b002991baef49bsm251566ljc.12.2023.03.16.01.51.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 01:51:23 -0700 (PDT) From: Konrad Dybcio Date: Thu, 16 Mar 2023 09:51:14 +0100 Subject: [PATCH v5 08/10] dt-bindings: display/msm: dsi-controller-main: Fix deprecated compatible MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230307-topic-dsi_qcm-v5-8-9d4235b77f4f@linaro.org> References: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> In-Reply-To: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Bryan O'Donoghue , Andy Gross , Bjorn Andersson Cc: Rob Herring , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678956668; l=1378; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=gFmAP3VKT7x6AjOlQ5QOdQrgbA01mNjW7lXWqOa56r4=; b=/UpSuxnKnArcV+HWoUWDAufdkfQwfpnaiqHNzcClp4+YCDcXHujpQWA5K/0h66dCKLiARD8E1ApW NmjtaJn1A1mPgRT5NzHJaiJqjVVNBs64JEninpB86VDW33G3VRwB X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The point of the previous cleanup was to disallow "qcom,mdss-dsi-ctrl" alone. This however didn't quite work out and the property became undocumented instead of deprecated. Fix that. Fixes: 0c0f65c6dd44 ("dt-bindings: msm: dsi-controller-main: Add compatible= strings for every current SoC") Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- .../devicetree/bindings/display/msm/dsi-controller-main.yaml | 7 +++= ---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-m= ain.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-mai= n.yaml index 2494817c1bd6..ecc89011bec4 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml +++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml @@ -31,10 +31,9 @@ properties: - qcom,sm8450-dsi-ctrl - qcom,sm8550-dsi-ctrl - const: qcom,mdss-dsi-ctrl - - items: - - enum: - - qcom,dsi-ctrl-6g-qcm2290 - - const: qcom,mdss-dsi-ctrl + - enum: + - qcom,dsi-ctrl-6g-qcm2290 + - qcom,mdss-dsi-ctrl # This should always come with an SoC-speci= fic compatible deprecated: true =20 reg: --=20 2.39.2 From nobody Sun Apr 12 14:32:15 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 122A0C6FD1F for ; Thu, 16 Mar 2023 08:53:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230039AbjCPIxI (ORCPT ); Thu, 16 Mar 2023 04:53:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46224 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231167AbjCPIw2 (ORCPT ); Thu, 16 Mar 2023 04:52:28 -0400 Received: from mail-lj1-x22a.google.com (mail-lj1-x22a.google.com [IPv6:2a00:1450:4864:20::22a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 55706B78B2 for ; Thu, 16 Mar 2023 01:51:30 -0700 (PDT) Received: by mail-lj1-x22a.google.com with SMTP id h3so831055lja.12 for ; Thu, 16 Mar 2023 01:51:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678956685; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=U+jIZB+lOj7L713dwYSMYXhpa9ZO/qMAXKk3i/Uz2ak=; b=zb1fzDW2I5O1rNUfE2gydP1wBIaJYKdQEHvmzxxvjF5Nh3CyuFTHZSoGyCFgfyV4hV eeU2n4lcwk5Ny30ZeRRz1+FNgYNcue+nmYUaOfob6DhXDE9pwXtIX0zraKeP0+pOb/uQ n3loVcBvmgngySunL9GLc2/H4MaNMk3s/f+Xk+IRpcsqSYSNvZsg/OGE6AzwQahKnpl+ YAITLco3BpajTgiXjg4upMJ+RajTyAPszyoA9/VDPvGEUdAIMRlY2UOnEEx9a024nxxZ HjV3wJd+Q38TBGkMESLrRYwOfim2mSKibmFm9/yVq/Z2Wf4itp5u8+IfRnaiS60t4CtZ T4/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678956685; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=U+jIZB+lOj7L713dwYSMYXhpa9ZO/qMAXKk3i/Uz2ak=; b=sdnWgR7nIL7l6/b/vRz08LaxiTderTocW4uUBYqaBpY+U2kD+IV9LdnqsrWL0TWWJy Thxl3yVre01nvYLG5x2UcU+sONU3zgvjm1kZ7BZgfaxTDlNTmzE845YaUdpXUSOjLxbo zoPrr9ie04enTL67GWsOuzo/D0antq/xJxuCmrqLubM1ylqx5XZdNvXC/QRNW6ns4mJg QbdJfPFfodF4I5kMxtk45X3clpqu7JiS5+mkTgCg9dFg1CcuZyEj+pzSybvL9e42WQHU 5+M6OF10rh00Gdabz9qaUDENia1+4fnHglpfloPRt4UyFKAa35CemrsGPQpVqZJY3Sqy OS5A== X-Gm-Message-State: AO0yUKXF5pWckkjx0ezjxjkcMN8c9oyLwAqUMu8BbfUmk/QbnnmYVkHY avf1SDqiqRy8Cs+/7zwf/6T21g== X-Google-Smtp-Source: AK7set/fAtr/UAAosa5LPWjja2gKST4qxaY/VlSBcaAgWWxIHbWAn7vrd+KTN5PJ3kCa2TJqtk1l2Q== X-Received: by 2002:a05:651c:505:b0:295:b0ed:ee8 with SMTP id o5-20020a05651c050500b00295b0ed0ee8mr2513288ljp.46.1678956684963; Thu, 16 Mar 2023 01:51:24 -0700 (PDT) Received: from [192.168.1.101] (abyj16.neoplus.adsl.tpnet.pl. [83.9.29.16]) by smtp.gmail.com with ESMTPSA id o11-20020a2e730b000000b002991baef49bsm251566ljc.12.2023.03.16.01.51.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 01:51:24 -0700 (PDT) From: Konrad Dybcio Date: Thu, 16 Mar 2023 09:51:15 +0100 Subject: [PATCH v5 09/10] dt-bindings: display/msm: dsi-controller-main: Add SM6115 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230307-topic-dsi_qcm-v5-9-9d4235b77f4f@linaro.org> References: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> In-Reply-To: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Bryan O'Donoghue , Andy Gross , Bjorn Andersson Cc: Rob Herring , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678956668; l=2355; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=TH3q3Ed2aw6dX9xtVNq6VpDwcDDpJoS9emOd9LF1Zus=; b=7bputgfOyj/s6G7stHLz2GE2CCEIxcZYAH2PFB9jcjNmqnGD2xL5pDyWBfoKsaOMYa6o9id207J3 BFTZno1ODpsNzWNG2uGZG/bzlWAV/D+XAokYcUu/tD4sFlzKLecO X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a compatible for the DSI on SM6115. Acked-by: Rob Herring Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- .../devicetree/bindings/display/msm/dsi-controller-main.yaml | 2 ++ .../devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml | 10 ++++++= ++-- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-m= ain.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-mai= n.yaml index ecc89011bec4..c8884a84e73d 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml +++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml @@ -25,6 +25,7 @@ properties: - qcom,sc7280-dsi-ctrl - qcom,sdm660-dsi-ctrl - qcom,sdm845-dsi-ctrl + - qcom,sm6115-dsi-ctrl - qcom,sm8150-dsi-ctrl - qcom,sm8250-dsi-ctrl - qcom,sm8350-dsi-ctrl @@ -350,6 +351,7 @@ allOf: contains: enum: - qcom,sdm845-dsi-ctrl + - qcom,sm6115-dsi-ctrl then: properties: clocks: diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss= .yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml index 2491cb100b33..b9f83088f370 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml @@ -40,7 +40,13 @@ patternProperties: type: object properties: compatible: - const: qcom,dsi-ctrl-6g-qcm2290 + oneOf: + - items: + - const: qcom,sm6115-dsi-ctrl + - const: qcom,mdss-dsi-ctrl + - description: Old binding, please don't use + deprecated: true + const: qcom,dsi-ctrl-6g-qcm2290 =20 "^phy@[0-9a-f]+$": type: object @@ -114,7 +120,7 @@ examples: }; =20 dsi@5e94000 { - compatible =3D "qcom,dsi-ctrl-6g-qcm2290"; + compatible =3D "qcom,sm6115-dsi-ctrl", "qcom,mdss-dsi-ctrl"; reg =3D <0x05e94000 0x400>; reg-names =3D "dsi_ctrl"; =20 --=20 2.39.2 From nobody Sun Apr 12 14:32:15 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2220AC6FD19 for ; Thu, 16 Mar 2023 08:53:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230092AbjCPIxG (ORCPT ); Thu, 16 Mar 2023 04:53:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45632 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231246AbjCPIw2 (ORCPT ); Thu, 16 Mar 2023 04:52:28 -0400 Received: from mail-lj1-x230.google.com (mail-lj1-x230.google.com [IPv6:2a00:1450:4864:20::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 967F9B78B4 for ; Thu, 16 Mar 2023 01:51:30 -0700 (PDT) Received: by mail-lj1-x230.google.com with SMTP id z5so840490ljc.8 for ; Thu, 16 Mar 2023 01:51:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678956686; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=yeylFVo7UbFotxXKN5Jk9AW63WMsXe+ARjqLamdFW7w=; b=Z3AAdZzei69KEGBWwngVymIGtG0e2xa+U+6TbMOtWfK1l1cEV5wJ3Oi6sWJ2+TKL/q EhbRSkMaKzivAqA3RZWQnkPaHiOfK2UGbG7XX2LIL2jZ0m1zoDIBejQRIix5sOlIEWO3 Lk5ajq/5dDxD6snISzP1DGsPSF+aKSyMSzV/0qaIp8v2bUJctOrfujVAgmf8YGpHVFAh TPw6v4TvssRhGP1vj2JBl0iLXDDdTxn7CAV1hmWLjlMD73AbTLWbzW7IGO1HAsNjGkfx jpKtSQrYiR5YMhj03+49lnFb+XsB9v5hB+i5F+FQIzD6kM+SvhdsIWn6pjl7bmyjs/i2 gYgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678956686; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yeylFVo7UbFotxXKN5Jk9AW63WMsXe+ARjqLamdFW7w=; b=3A6OjOI1lk79GoZWbvywo8I5GmjDt5+wP5izd4qeHg30X9wt8KINN1N39t/3OPribl Zwj4FMx9VNC5JoIj3W7rhVouRI1J1fXeodjc5QyAiHYoBE07qce7MJoIWT5ngWc6u5GW 78iBD9gz81H8+S6EKOptDCZOVjJd2MvA8V0QUQzfDEYaZ8Ciax4YQgPVSmLEeBjNXeOi TO22iwlSEZicbiuXzGgufTl0rDKTLD4477fZ4vs98n3OAV13WfAWZwRd/XRPstNLis21 IjduAnLFrmfYtOdCCNGT2vxWbd6QdjHQFmbHpQ454pEdq8pYh4nQdTxHLzRiwv6CRxfG /2nQ== X-Gm-Message-State: AO0yUKVWK9wDy8jZ9YVPwSkQq4fGGFPIjWJld0qzcv5sVtH1MEFmPvRe ARN/UJxV2wdFkfE4ujQNmvYSmQ== X-Google-Smtp-Source: AK7set/0NJerC8vUaJNQ2tyW8LwLWSp5G6DBTMCvwIABzlv+WcmetLF/tmCq3vX0+utRYHtmPqbJeA== X-Received: by 2002:a2e:9c8c:0:b0:295:a96c:f77c with SMTP id x12-20020a2e9c8c000000b00295a96cf77cmr1644721lji.3.1678956686536; Thu, 16 Mar 2023 01:51:26 -0700 (PDT) Received: from [192.168.1.101] (abyj16.neoplus.adsl.tpnet.pl. [83.9.29.16]) by smtp.gmail.com with ESMTPSA id o11-20020a2e730b000000b002991baef49bsm251566ljc.12.2023.03.16.01.51.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 01:51:26 -0700 (PDT) From: Konrad Dybcio Date: Thu, 16 Mar 2023 09:51:16 +0100 Subject: [PATCH v5 10/10] arm64: dts: qcom: sm6115: Use the correct DSI compatible MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230307-topic-dsi_qcm-v5-10-9d4235b77f4f@linaro.org> References: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> In-Reply-To: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Bryan O'Donoghue , Andy Gross , Bjorn Andersson Cc: Rob Herring , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678956668; l=835; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=fTDJ/Pk/K83TEsz8nt+gatYoQ7InKrC5bjtKXy4Z9Sw=; b=6dVPWc6fouGLAtAlDaU7jHpfHzCJJY89FA5mqEAD5VXJxPTs5FZju6xUdRCpTHYgRqkK04rKeJ9v GWYlKOQLDjLJlUaQssq0kx9ZMu1bZssR7Q1yyKs82T4JnyTfzVY5 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Use the non-deprecated, SoC-specific DSI compatible. Reviewed-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qco= m/sm6115.dtsi index fbd67d2c8d78..18c7eedff300 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -1219,7 +1219,7 @@ opp-384000000 { }; =20 mdss_dsi0: dsi@5e94000 { - compatible =3D "qcom,dsi-ctrl-6g-qcm2290"; + compatible =3D "qcom,sm6115-dsi-ctrl", "qcom,mdss-dsi-ctrl"; reg =3D <0x0 0x05e94000 0x0 0x400>; reg-names =3D "dsi_ctrl"; =20 --=20 2.39.2