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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id i2-20020ac25222000000b004d86808fd33sm948465lfl.15.2023.03.13.04.41.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Mar 2023 04:41:17 -0700 (PDT) From: Konrad Dybcio Date: Mon, 13 Mar 2023 12:41:07 +0100 Subject: [PATCH v2 1/7] dt-bindings: interconnect: qcom,msm8998-bwmon: Resolve MSM8998 support MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230304-topic-ddr_bwmon-v2-1-04db989db059@linaro.org> References: <20230304-topic-ddr_bwmon-v2-0-04db989db059@linaro.org> In-Reply-To: <20230304-topic-ddr_bwmon-v2-0-04db989db059@linaro.org> To: Andy Gross , Bjorn Andersson , Krzysztof Kozlowski , Georgi Djakov , Rob Herring , Thara Gopinath , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678707675; l=3131; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=SbN98Ibah4gas5eacqICwCuMX8VfaPWlZmkr7n14GAg=; b=DdyWr1FxIsUnPNy/1QEqjJJtlRLNjh6PqilSYN3ygAQcO44LPckma+4V/1hDmmIjwyBAFbysYGX1 Dz6T7uwpDLzhX+9LiT3WKSbb7aQXxdaPXvTOC12NEsCFPDAhU6D1 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org BWMONv4 has two sets of registers: one for handling the monitor itself and one called "global" which hosts some sort of a headswitch and an interrupt control register. We did not handle that one before, as on SoCs starting with SDM845 they have been merged into a single contiguous range. To make the qcom,msm8998-bwmon less confusing and in preparation for actual MSM8998 support, describe the global register space and introduce new "qcom,sdm845-cpu-bwmon" compatible while keeping the "qcom,sdm845-bwmon" as a fallback for SoCs with this merged register space scheme. Signed-off-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski --- .../bindings/interconnect/qcom,msm8998-bwmon.yaml | 41 ++++++++++++++++++= ---- 1 file changed, 34 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bw= mon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmo= n.yaml index 12a0d3ecbabb..5d17bdcfdf70 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml @@ -22,14 +22,14 @@ description: | properties: compatible: oneOf: + - const: qcom,msm8998-bwmon # BWMON v4 - items: - enum: - qcom,sc7280-cpu-bwmon - qcom,sc8280xp-cpu-bwmon - - qcom,sdm845-bwmon + - qcom,sdm845-cpu-bwmon - qcom,sm8550-cpu-bwmon - - const: qcom,msm8998-bwmon - - const: qcom,msm8998-bwmon # BWMON v4 + - const: qcom,sdm845-bwmon # BWMON v4, unified register space - items: - enum: - qcom,sc8280xp-llcc-bwmon @@ -49,9 +49,13 @@ properties: type: object =20 reg: - # BWMON v4 (currently described) and BWMON v5 use one register address - # space. BWMON v2 uses two register spaces - not yet described. - maxItems: 1 + # BWMON v5 uses one register address space, v1-v4 use one or two. + minItems: 1 + maxItems: 2 + + reg-names: + minItems: 1 + maxItems: 2 =20 required: - compatible @@ -63,13 +67,36 @@ required: =20 additionalProperties: false =20 +allOf: + - if: + properties: + compatible: + const: qcom,msm8998-bwmon + then: + properties: + reg: + minItems: 2 + + reg-names: + items: + - const: monitor + - const: global + + else: + properties: + reg: + maxItems: 1 + + reg-names: + maxItems: 1 + examples: - | #include #include =20 pmu@1436400 { - compatible =3D "qcom,sdm845-bwmon", "qcom,msm8998-bwmon"; + compatible =3D "qcom,sdm845-cpu-bwmon", "qcom,sdm845-bwmon"; reg =3D <0x01436400 0x600>; interrupts =3D ; interconnects =3D <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLA= VE_LLCC 3>; --=20 2.39.2 From nobody Wed Feb 11 15:50:18 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 68CB8C61DA4 for ; Mon, 13 Mar 2023 11:42:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231290AbjCMLmd (ORCPT ); Mon, 13 Mar 2023 07:42:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48890 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230498AbjCMLl7 (ORCPT ); Mon, 13 Mar 2023 07:41:59 -0400 Received: from mail-lj1-x22f.google.com (mail-lj1-x22f.google.com [IPv6:2a00:1450:4864:20::22f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CAC7A64845 for ; Mon, 13 Mar 2023 04:41:24 -0700 (PDT) Received: by mail-lj1-x22f.google.com with SMTP id h3so12267556lja.12 for ; Mon, 13 Mar 2023 04:41:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678707680; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=BA0eQZ8AtvNy+bqcCRTnWTBgQjxAvhY+LtX34W6eURg=; b=qOaWuYjRWtrdTE3Aat/4jIECOHeyzVK0kVPQ+WBntgba8ZDD8RbjTq/Z36OpnRBTvO dPOjmRINo8Ty87Q3RHhnrfFE2yYRZbS8BZC5xPAEydhMgfs1NOZ8xOq/Z4fObT6NWmDp 5yDaDniY9W44aHGFNNaDAwaWXCMELENHAc94R5SHW2A7sAImCZPi3+vieitR//KLB2Zn BguxOu1GXWH4pbelH62mxNgQt7laz2hqubS+V9vtvRiUNloQyu5nntXj4GEeQ7xRCJdI mLkvWstkxJRsYRetHyjqqLSESXaGfjcV11rMjPHKUjyFoNWh4rus9eAdNvUuRB0r/VnE a7bA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678707680; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BA0eQZ8AtvNy+bqcCRTnWTBgQjxAvhY+LtX34W6eURg=; b=RZQWndus3txIIBxcM8wBrSa8Po09zklJC6YWd2utG2ls3jNQX2irThk8odMZPwW0z3 klFvdfVHNuzoQ6fKFumwTT05cCATeNIqO35lka2xpnFaXTUx26dmF3zIARBkVYIS+GSP kM6336USzjDQoI7+DkZRyNDc73SsE/+iae8PeueLMrpnlU2FTviuGQ6zgDhpkGddvj/1 RArJKAmmd4rYLT9tU3TM/wPtiLVWogND/4Ca69hxC1vrDF6H63Q72Tm5n9zJLO4L7AV8 lF4ViS8u66xOBdaE9sNZ8ZDkC3eG84lyad2ZSwNNCo21jjTHfjQVE4sk7Xx/lKVEAOcZ aERA== X-Gm-Message-State: AO0yUKXWJWuxREEWiIoDlFLBezQ7UeuN06C9tyxKqvPdS2A+iuDxv/ej 1Jt5xLhk3SJmZ1T05y1/y1mf+4gHDVpYnSK8pSQ= X-Google-Smtp-Source: AK7set9O8YcAI9EE4pQjiIdEPXBn0kGqKAzu8iA1RFJfhSSqhD0oPSY1qA+ElShx9CosV5RpJBJrYA== X-Received: by 2002:a2e:7410:0:b0:290:6e01:8d0b with SMTP id p16-20020a2e7410000000b002906e018d0bmr9555492ljc.26.1678707679772; Mon, 13 Mar 2023 04:41:19 -0700 (PDT) Received: from [192.168.1.101] (abyj16.neoplus.adsl.tpnet.pl. [83.9.29.16]) by smtp.gmail.com with ESMTPSA id i2-20020ac25222000000b004d86808fd33sm948465lfl.15.2023.03.13.04.41.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Mar 2023 04:41:19 -0700 (PDT) From: Konrad Dybcio Date: Mon, 13 Mar 2023 12:41:08 +0100 Subject: [PATCH v2 2/7] soc: qcom: icc-bwmon: Handle global registers correctly MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230304-topic-ddr_bwmon-v2-2-04db989db059@linaro.org> References: <20230304-topic-ddr_bwmon-v2-0-04db989db059@linaro.org> In-Reply-To: <20230304-topic-ddr_bwmon-v2-0-04db989db059@linaro.org> To: Andy Gross , Bjorn Andersson , Krzysztof Kozlowski , Georgi Djakov , Rob Herring , Thara Gopinath , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678707675; l=15632; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=IYBe4UhCZnNpAwB7u6rQWepz0wfpVPugjWUuaHABSM0=; b=2FLwSM4clMtMjxRbNR44ZKEWxWVsyr2GqqdGbTHwiwFioCd9jSqTHrL/51i+mJnSV0UV1s3x0dD5 7frqHaf2CQKL6C7yr6IMJOL3FiniPpcqSawSr2vgZSvMSEGmfVuk X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The BWMON hardware has two sets of registers: one for the monitor itself and one called "global". It has what seems to be some kind of a head switch and an interrupt control register. It's usually 0x200 in size. On fairly recent SoCs (with the starting point seemingly being moving the OSM programming to the firmware) these two register sets are contiguous and overlapping, like this (on sm8450): /* notice how base.start =3D=3D global_base.start+0x100 */ reg =3D <0x90b6400 0x300>, <0x90b6300 0x200>; reg-names =3D "base", "global_base"; Which led to some confusion and the assumption that since the "interesting" global registers begin right after global_base+0x100, there's no need to map two separate regions and one can simply subtract 0x100 from the offsets. This is however not the case for anything older than SDM845, as the global region can appear in seemingly random spots on the register map. Handle the case where the global registers are mapped separately to allow proper functioning of BWMONv4 on MSM8998 and older. Add specific compatibles for 845, 8280xp, 7280 and 8550 (all of which use the single reg space scheme) to keep backwards compatibility with old DTs. Signed-off-by: Konrad Dybcio --- drivers/soc/qcom/icc-bwmon.c | 228 +++++++++++++++++++++++++++++++++++++++= ---- 1 file changed, 208 insertions(+), 20 deletions(-) diff --git a/drivers/soc/qcom/icc-bwmon.c b/drivers/soc/qcom/icc-bwmon.c index d07be3700db6..2fe67a3cd2d7 100644 --- a/drivers/soc/qcom/icc-bwmon.c +++ b/drivers/soc/qcom/icc-bwmon.c @@ -34,14 +34,27 @@ /* Internal sampling clock frequency */ #define HW_TIMER_HZ 19200000 =20 -#define BWMON_V4_GLOBAL_IRQ_CLEAR 0x008 -#define BWMON_V4_GLOBAL_IRQ_ENABLE 0x00c +#define BWMON_V4_GLOBAL_IRQ_CLEAR 0x108 +#define BWMON_V4_GLOBAL_IRQ_ENABLE 0x10c /* * All values here and further are matching regmap fields, so without abso= lute * register offsets. */ #define BWMON_V4_GLOBAL_IRQ_ENABLE_ENABLE BIT(0) =20 +/* + * Starting with SDM845, the BWMON4 register space has changed a bit: + * the global registers were jammed into the beginning of the monitor regi= on. + * To keep the proper offsets, one would have to map a= nd + * , which is straight up wrong. + * To facilitate for that, while allowing the older, arguably more proper + * implementations to work, offset the global registers by -0x100 to avoid + * having to map half of the global registers twice. + */ +#define BWMON_V4_845_OFFSET 0x100 +#define BWMON_V4_GLOBAL_IRQ_CLEAR_845 (BWMON_V4_GLOBAL_IRQ_CLEAR - BWMON_= V4_845_OFFSET) +#define BWMON_V4_GLOBAL_IRQ_ENABLE_845 (BWMON_V4_GLOBAL_IRQ_ENABLE - BWMO= N_V4_845_OFFSET) + #define BWMON_V4_IRQ_STATUS 0x100 #define BWMON_V4_IRQ_CLEAR 0x108 =20 @@ -118,8 +131,12 @@ #define BWMON_NEEDS_FORCE_CLEAR BIT(1) =20 enum bwmon_fields { + /* Global region fields, keep them at the top */ F_GLOBAL_IRQ_CLEAR, F_GLOBAL_IRQ_ENABLE, + F_NUM_GLOBAL_FIELDS, + + /* Monitor region fields */ F_IRQ_STATUS, F_IRQ_CLEAR, F_IRQ_ENABLE, @@ -157,6 +174,9 @@ struct icc_bwmon_data { =20 const struct regmap_config *regmap_cfg; const struct reg_field *regmap_fields; + + const struct regmap_config *global_regmap_cfg; + const struct reg_field *global_regmap_fields; }; =20 struct icc_bwmon { @@ -166,6 +186,7 @@ struct icc_bwmon { =20 struct regmap *regmap; struct regmap_field *regs[F_NUM_FIELDS]; + struct regmap_field *global_regs[F_NUM_FIELDS]; =20 unsigned int max_bw_kbps; unsigned int min_bw_kbps; @@ -175,8 +196,8 @@ struct icc_bwmon { =20 /* BWMON v4 */ static const struct reg_field msm8998_bwmon_reg_fields[] =3D { - [F_GLOBAL_IRQ_CLEAR] =3D REG_FIELD(BWMON_V4_GLOBAL_IRQ_CLEAR, 0, 0), - [F_GLOBAL_IRQ_ENABLE] =3D REG_FIELD(BWMON_V4_GLOBAL_IRQ_ENABLE, 0, 0), + [F_GLOBAL_IRQ_CLEAR] =3D {}, + [F_GLOBAL_IRQ_ENABLE] =3D {}, [F_IRQ_STATUS] =3D REG_FIELD(BWMON_V4_IRQ_STATUS, 4, 7), [F_IRQ_CLEAR] =3D REG_FIELD(BWMON_V4_IRQ_CLEAR, 4, 7), [F_IRQ_ENABLE] =3D REG_FIELD(BWMON_V4_IRQ_ENABLE, 4, 7), @@ -202,7 +223,6 @@ static const struct reg_field msm8998_bwmon_reg_fields[= ] =3D { }; =20 static const struct regmap_range msm8998_bwmon_reg_noread_ranges[] =3D { - regmap_reg_range(BWMON_V4_GLOBAL_IRQ_CLEAR, BWMON_V4_GLOBAL_IRQ_CLEAR), regmap_reg_range(BWMON_V4_IRQ_CLEAR, BWMON_V4_IRQ_CLEAR), regmap_reg_range(BWMON_V4_CLEAR, BWMON_V4_CLEAR), }; @@ -222,16 +242,33 @@ static const struct regmap_access_table msm8998_bwmon= _reg_volatile_table =3D { .n_yes_ranges =3D ARRAY_SIZE(msm8998_bwmon_reg_volatile_ranges), }; =20 +static const struct reg_field msm8998_bwmon_global_reg_fields[] =3D { + [F_GLOBAL_IRQ_CLEAR] =3D REG_FIELD(BWMON_V4_GLOBAL_IRQ_CLEAR, 0, 0), + [F_GLOBAL_IRQ_ENABLE] =3D REG_FIELD(BWMON_V4_GLOBAL_IRQ_ENABLE, 0, 0), +}; + +static const struct regmap_range msm8998_bwmon_global_reg_noread_ranges[] = =3D { + regmap_reg_range(BWMON_V4_GLOBAL_IRQ_CLEAR, BWMON_V4_GLOBAL_IRQ_CLEAR), +}; + +static const struct regmap_access_table msm8998_bwmon_global_reg_read_tabl= e =3D { + .no_ranges =3D msm8998_bwmon_global_reg_noread_ranges, + .n_no_ranges =3D ARRAY_SIZE(msm8998_bwmon_global_reg_noread_ranges), +}; + /* * Fill the cache for non-readable registers only as rest does not really * matter and can be read from the device. */ static const struct reg_default msm8998_bwmon_reg_defaults[] =3D { - { BWMON_V4_GLOBAL_IRQ_CLEAR, 0x0 }, { BWMON_V4_IRQ_CLEAR, 0x0 }, { BWMON_V4_CLEAR, 0x0 }, }; =20 +static const struct reg_default msm8998_bwmon_global_reg_defaults[] =3D { + { BWMON_V4_GLOBAL_IRQ_CLEAR, 0x0 }, +}; + static const struct regmap_config msm8998_bwmon_regmap_cfg =3D { .reg_bits =3D 32, .reg_stride =3D 4, @@ -252,6 +289,93 @@ static const struct regmap_config msm8998_bwmon_regmap= _cfg =3D { .cache_type =3D REGCACHE_RBTREE, }; =20 +static const struct regmap_config msm8998_bwmon_global_regmap_cfg =3D { + .reg_bits =3D 32, + .reg_stride =3D 4, + .val_bits =3D 32, + /* + * No concurrent access expected - driver has one interrupt handler, + * regmap is not shared, no driver or user-space API. + */ + .disable_locking =3D true, + .rd_table =3D &msm8998_bwmon_global_reg_read_table, + .reg_defaults =3D msm8998_bwmon_global_reg_defaults, + .num_reg_defaults =3D ARRAY_SIZE(msm8998_bwmon_global_reg_defaults), + /* + * Cache is necessary for using regmap fields with non-readable + * registers. + */ + .cache_type =3D REGCACHE_RBTREE, +}; + +static const struct reg_field sdm845_ddr_bwmon_reg_fields[] =3D { + [F_GLOBAL_IRQ_CLEAR] =3D REG_FIELD(BWMON_V4_GLOBAL_IRQ_CLEAR_845, 0, 0), + [F_GLOBAL_IRQ_ENABLE] =3D REG_FIELD(BWMON_V4_GLOBAL_IRQ_ENABLE_845, 0, 0), + [F_IRQ_STATUS] =3D REG_FIELD(BWMON_V4_IRQ_STATUS, 4, 7), + [F_IRQ_CLEAR] =3D REG_FIELD(BWMON_V4_IRQ_CLEAR, 4, 7), + [F_IRQ_ENABLE] =3D REG_FIELD(BWMON_V4_IRQ_ENABLE, 4, 7), + /* F_ENABLE covers entire register to disable other features */ + [F_ENABLE] =3D REG_FIELD(BWMON_V4_ENABLE, 0, 31), + [F_CLEAR] =3D REG_FIELD(BWMON_V4_CLEAR, 0, 1), + [F_SAMPLE_WINDOW] =3D REG_FIELD(BWMON_V4_SAMPLE_WINDOW, 0, 23), + [F_THRESHOLD_HIGH] =3D REG_FIELD(BWMON_V4_THRESHOLD_HIGH, 0, 11), + [F_THRESHOLD_MED] =3D REG_FIELD(BWMON_V4_THRESHOLD_MED, 0, 11), + [F_THRESHOLD_LOW] =3D REG_FIELD(BWMON_V4_THRESHOLD_LOW, 0, 11), + [F_ZONE_ACTIONS_ZONE0] =3D REG_FIELD(BWMON_V4_ZONE_ACTIONS, 0, 7), + [F_ZONE_ACTIONS_ZONE1] =3D REG_FIELD(BWMON_V4_ZONE_ACTIONS, 8, 15), + [F_ZONE_ACTIONS_ZONE2] =3D REG_FIELD(BWMON_V4_ZONE_ACTIONS, 16, 23), + [F_ZONE_ACTIONS_ZONE3] =3D REG_FIELD(BWMON_V4_ZONE_ACTIONS, 24, 31), + [F_THRESHOLD_COUNT_ZONE0] =3D REG_FIELD(BWMON_V4_THRESHOLD_COUNT, 0, 7), + [F_THRESHOLD_COUNT_ZONE1] =3D REG_FIELD(BWMON_V4_THRESHOLD_COUNT, 8, 15), + [F_THRESHOLD_COUNT_ZONE2] =3D REG_FIELD(BWMON_V4_THRESHOLD_COUNT, 16, 23), + [F_THRESHOLD_COUNT_ZONE3] =3D REG_FIELD(BWMON_V4_THRESHOLD_COUNT, 24, 31), + [F_ZONE0_MAX] =3D REG_FIELD(BWMON_V4_ZONE_MAX(0), 0, 11), + [F_ZONE1_MAX] =3D REG_FIELD(BWMON_V4_ZONE_MAX(1), 0, 11), + [F_ZONE2_MAX] =3D REG_FIELD(BWMON_V4_ZONE_MAX(2), 0, 11), + [F_ZONE3_MAX] =3D REG_FIELD(BWMON_V4_ZONE_MAX(3), 0, 11), +}; + +static const struct regmap_range sdm845_ddr_bwmon_reg_noread_ranges[] =3D { + regmap_reg_range(BWMON_V4_GLOBAL_IRQ_CLEAR_845, BWMON_V4_GLOBAL_IRQ_CLEAR= _845), + regmap_reg_range(BWMON_V4_IRQ_CLEAR, BWMON_V4_IRQ_CLEAR), + regmap_reg_range(BWMON_V4_CLEAR, BWMON_V4_CLEAR), +}; + +static const struct regmap_access_table sdm845_ddr_bwmon_reg_read_table = =3D { + .no_ranges =3D sdm845_ddr_bwmon_reg_noread_ranges, + .n_no_ranges =3D ARRAY_SIZE(sdm845_ddr_bwmon_reg_noread_ranges), +}; + +/* + * Fill the cache for non-readable registers only as rest does not really + * matter and can be read from the device. + */ +static const struct reg_default sdm845_ddr_bwmon_reg_defaults[] =3D { + { BWMON_V4_GLOBAL_IRQ_CLEAR_845, 0x0 }, + { BWMON_V4_IRQ_CLEAR, 0x0 }, + { BWMON_V4_CLEAR, 0x0 }, +}; + +static const struct regmap_config sdm845_ddr_bwmon_regmap_cfg =3D { + .reg_bits =3D 32, + .reg_stride =3D 4, + .val_bits =3D 32, + /* + * No concurrent access expected - driver has one interrupt handler, + * regmap is not shared, no driver or user-space API. + */ + .disable_locking =3D true, + .rd_table =3D &sdm845_ddr_bwmon_reg_read_table, + .volatile_table =3D &msm8998_bwmon_reg_volatile_table, + .reg_defaults =3D sdm845_ddr_bwmon_reg_defaults, + .num_reg_defaults =3D ARRAY_SIZE(sdm845_ddr_bwmon_reg_defaults), + /* + * Cache is necessary for using regmap fields with non-readable + * registers. + */ + .cache_type =3D REGCACHE_RBTREE, +}; + /* BWMON v5 */ static const struct reg_field sdm845_llcc_bwmon_reg_fields[] =3D { [F_GLOBAL_IRQ_CLEAR] =3D {}, @@ -350,6 +474,13 @@ static void bwmon_clear_counters(struct icc_bwmon *bwm= on, bool clear_all) =20 static void bwmon_clear_irq(struct icc_bwmon *bwmon) { + struct regmap_field *global_irq_clr; + + if (bwmon->data->global_regmap_fields) + global_irq_clr =3D bwmon->global_regs[F_GLOBAL_IRQ_CLEAR]; + else + global_irq_clr =3D bwmon->regs[F_GLOBAL_IRQ_CLEAR]; + /* * Clear zone and global interrupts. The order and barriers are * important. Quoting downstream Qualcomm msm-4.9 tree: @@ -370,15 +501,22 @@ static void bwmon_clear_irq(struct icc_bwmon *bwmon) if (bwmon->data->quirks & BWMON_NEEDS_FORCE_CLEAR) regmap_field_force_write(bwmon->regs[F_IRQ_CLEAR], 0); if (bwmon->data->quirks & BWMON_HAS_GLOBAL_IRQ) - regmap_field_force_write(bwmon->regs[F_GLOBAL_IRQ_CLEAR], + regmap_field_force_write(global_irq_clr, BWMON_V4_GLOBAL_IRQ_ENABLE_ENABLE); } =20 static void bwmon_disable(struct icc_bwmon *bwmon) { + struct regmap_field *global_irq_en; + + if (bwmon->data->global_regmap_fields) + global_irq_en =3D bwmon->global_regs[F_GLOBAL_IRQ_ENABLE]; + else + global_irq_en =3D bwmon->regs[F_GLOBAL_IRQ_ENABLE]; + /* Disable interrupts. Strict ordering, see bwmon_clear_irq(). */ if (bwmon->data->quirks & BWMON_HAS_GLOBAL_IRQ) - regmap_field_write(bwmon->regs[F_GLOBAL_IRQ_ENABLE], 0x0); + regmap_field_write(global_irq_en, 0x0); regmap_field_write(bwmon->regs[F_IRQ_ENABLE], 0x0); =20 /* @@ -390,10 +528,18 @@ static void bwmon_disable(struct icc_bwmon *bwmon) =20 static void bwmon_enable(struct icc_bwmon *bwmon, unsigned int irq_enable) { + struct regmap_field *global_irq_en; + + if (bwmon->data->global_regmap_fields) + global_irq_en =3D bwmon->global_regs[F_GLOBAL_IRQ_ENABLE]; + else + global_irq_en =3D bwmon->regs[F_GLOBAL_IRQ_ENABLE]; + /* Enable interrupts */ if (bwmon->data->quirks & BWMON_HAS_GLOBAL_IRQ) - regmap_field_write(bwmon->regs[F_GLOBAL_IRQ_ENABLE], + regmap_field_write(global_irq_en, BWMON_V4_GLOBAL_IRQ_ENABLE_ENABLE); + regmap_field_write(bwmon->regs[F_IRQ_ENABLE], irq_enable); =20 /* Enable bwmon */ @@ -556,7 +702,9 @@ static int bwmon_init_regmap(struct platform_device *pd= ev, struct device *dev =3D &pdev->dev; void __iomem *base; struct regmap *map; + int ret; =20 + /* Map the monitor base */ base =3D devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(base)) return dev_err_probe(dev, PTR_ERR(base), @@ -567,12 +715,35 @@ static int bwmon_init_regmap(struct platform_device *= pdev, return dev_err_probe(dev, PTR_ERR(map), "failed to initialize regmap\n"); =20 + BUILD_BUG_ON(ARRAY_SIZE(msm8998_bwmon_global_reg_fields) !=3D F_NUM_GLOBA= L_FIELDS); BUILD_BUG_ON(ARRAY_SIZE(msm8998_bwmon_reg_fields) !=3D F_NUM_FIELDS); + BUILD_BUG_ON(ARRAY_SIZE(sdm845_ddr_bwmon_reg_fields) !=3D F_NUM_FIELDS); BUILD_BUG_ON(ARRAY_SIZE(sdm845_llcc_bwmon_reg_fields) !=3D F_NUM_FIELDS); =20 - return devm_regmap_field_bulk_alloc(dev, map, bwmon->regs, + ret =3D devm_regmap_field_bulk_alloc(dev, map, bwmon->regs, bwmon->data->regmap_fields, F_NUM_FIELDS); + if (ret) + return ret; + + if (bwmon->data->global_regmap_cfg) { + /* Map the global base, if separate */ + base =3D devm_platform_ioremap_resource(pdev, 1); + if (IS_ERR(base)) + return dev_err_probe(dev, PTR_ERR(base), + "failed to map bwmon global registers\n"); + + map =3D devm_regmap_init_mmio(dev, base, bwmon->data->global_regmap_cfg); + if (IS_ERR(map)) + return dev_err_probe(dev, PTR_ERR(map), + "failed to initialize global regmap\n"); + + ret =3D devm_regmap_field_bulk_alloc(dev, map, bwmon->global_regs, + bwmon->data->global_regmap_fields, + F_NUM_GLOBAL_FIELDS); + } + + return ret; } =20 static int bwmon_probe(struct platform_device *pdev) @@ -645,6 +816,21 @@ static const struct icc_bwmon_data msm8998_bwmon_data = =3D { .quirks =3D BWMON_HAS_GLOBAL_IRQ, .regmap_fields =3D msm8998_bwmon_reg_fields, .regmap_cfg =3D &msm8998_bwmon_regmap_cfg, + .global_regmap_fields =3D msm8998_bwmon_global_reg_fields, + .global_regmap_cfg =3D &msm8998_bwmon_global_regmap_cfg, +}; + +static const struct icc_bwmon_data sdm845_ddr_bwmon_data =3D { + .sample_ms =3D 4, + .count_unit_kb =3D 64, + .default_highbw_kbps =3D 4800 * 1024, /* 4.8 GBps */ + .default_medbw_kbps =3D 512 * 1024, /* 512 MBps */ + .default_lowbw_kbps =3D 0, + .zone1_thres_count =3D 16, + .zone3_thres_count =3D 1, + .quirks =3D BWMON_HAS_GLOBAL_IRQ, + .regmap_fields =3D sdm845_ddr_bwmon_reg_fields, + .regmap_cfg =3D &sdm845_ddr_bwmon_regmap_cfg, }; =20 static const struct icc_bwmon_data sdm845_llcc_bwmon_data =3D { @@ -673,16 +859,18 @@ static const struct icc_bwmon_data sc7280_llcc_bwmon_= data =3D { }; =20 static const struct of_device_id bwmon_of_match[] =3D { - { - .compatible =3D "qcom,msm8998-bwmon", - .data =3D &msm8998_bwmon_data - }, { - .compatible =3D "qcom,sdm845-llcc-bwmon", - .data =3D &sdm845_llcc_bwmon_data - }, { - .compatible =3D "qcom,sc7280-llcc-bwmon", - .data =3D &sc7280_llcc_bwmon_data - }, + /* BWMONv4, separate monitor and global register spaces */ + { .compatible =3D "qcom,msm8998-bwmon", .data =3D &msm8998_bwmon_data }, + /* BWMONv4, unified register space */ + { .compatible =3D "qcom,sdm845-bwmon", .data =3D &sdm845_ddr_bwmon_data }, + /* BWMONv5 */ + { .compatible =3D "qcom,sdm845-llcc-bwmon", .data =3D &sdm845_llcc_bwmon_= data }, + { .compatible =3D "qcom,sc7280-llcc-bwmon", .data =3D &sc7280_llcc_bwmon_= data }, + + /* Compatibles kept for legacy reasons */ + { .compatible =3D "qcom,sc7280-cpu-bwmon", .data =3D &sdm845_ddr_bwmon_da= ta }, + { .compatible =3D "qcom,sc8280xp-cpu-bwmon", .data =3D &sdm845_ddr_bwmon_= data }, + { .compatible =3D "qcom,sm8550-cpu-bwmon", .data =3D &sdm845_ddr_bwmon_da= ta }, {} }; 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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id i2-20020ac25222000000b004d86808fd33sm948465lfl.15.2023.03.13.04.41.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Mar 2023 04:41:20 -0700 (PDT) From: Konrad Dybcio Date: Mon, 13 Mar 2023 12:41:09 +0100 Subject: [PATCH v2 3/7] soc: qcom: icc-bwmon: Remove unused struct member MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230304-topic-ddr_bwmon-v2-3-04db989db059@linaro.org> References: <20230304-topic-ddr_bwmon-v2-0-04db989db059@linaro.org> In-Reply-To: <20230304-topic-ddr_bwmon-v2-0-04db989db059@linaro.org> To: Andy Gross , Bjorn Andersson , Krzysztof Kozlowski , Georgi Djakov , Rob Herring , Thara Gopinath , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678707675; l=851; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=a+7UxhwPe8d61BMoAwcf5BTpQhH1To5AXAuiYkU2/Ik=; b=jUx0oZRfG7dGC/yyC6ZvD4X+x5wFkeq9oqlm+aYDu6ZAmyyHWKxjetMpSaN0o4ZZeWXm+sEeHUqy epkaJ87nDnBsnP6G6l6VMN7r+lHUQJOYofaPmZBasDh8Iw2jifMv X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org bwmon->regmap was never used, as the regmap for bwmon is registered through devres and accessed through bwmon's regmap_field members. Remove it Fixes: ec63dcd3c863 ("soc: qcom: icc-bwmon: use regmap and prepare for BWMO= N v5") Reviewed-by: Krzysztof Kozlowski Signed-off-by: Konrad Dybcio --- drivers/soc/qcom/icc-bwmon.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/soc/qcom/icc-bwmon.c b/drivers/soc/qcom/icc-bwmon.c index 2fe67a3cd2d7..3a3230a62ad9 100644 --- a/drivers/soc/qcom/icc-bwmon.c +++ b/drivers/soc/qcom/icc-bwmon.c @@ -184,7 +184,6 @@ struct icc_bwmon { const struct icc_bwmon_data *data; int irq; =20 - struct regmap *regmap; struct regmap_field *regs[F_NUM_FIELDS]; struct regmap_field *global_regs[F_NUM_FIELDS]; =20 --=20 2.39.2 From nobody Wed Feb 11 15:50:18 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 44310C7618E for ; Mon, 13 Mar 2023 11:42:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230083AbjCMLmn (ORCPT ); Mon, 13 Mar 2023 07:42:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49992 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230511AbjCMLl7 (ORCPT ); Mon, 13 Mar 2023 07:41:59 -0400 Received: from mail-lf1-x136.google.com (mail-lf1-x136.google.com [IPv6:2a00:1450:4864:20::136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 456D26507B for ; Mon, 13 Mar 2023 04:41:27 -0700 (PDT) Received: by mail-lf1-x136.google.com with SMTP id f18so15328904lfa.3 for ; Mon, 13 Mar 2023 04:41:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678707682; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=l+k+reC4AwOd4vHClc4yefjsS0s41ZK6miu+3sYuwsE=; b=D+6o3R1C0cSJshMzbgjMBzugrRd02mjgMMfcRAKcnQWvZlip/dpYUvdrAwLYStgPJo fiZzOFkhkhPAlxBmzrAa9GmJCIlaxse4NnECdxF1x4Yr3UqS4R4nWdNmiPFmWmDdRxY/ Df+eK9HgoGcaYxUT7CwXASV/f8O7XTz/pdgkKBAxrzBPktwfJxt40blD5azzyr7T/J61 bc1Co7BLkUKxHPkYsXIXFFrBY2Prt1gmxJjr9eawzJrvCcWGLTzDVaGLSUmmJz/3hDkE Gczune8n299zuSUo6Ddj04cgXOovXbVOBcbvLb3KCfQBULipdHVGos6yEaQ3jShQtU7d x97w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678707682; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=l+k+reC4AwOd4vHClc4yefjsS0s41ZK6miu+3sYuwsE=; b=vB6J2siCLCQ/GQh7mGygTprvrbLH1nfoF2nWl21Zw0CE8MBBymAp7xO7I5YPwlct0e 3O3ivLgmIOga1f2T2+1o2ULeKnPLU0y8Ck1b6486TZz2xGLA1n1ltd+wXRo840yzhcya wivy/BAjy9I3TNiuXuP0Npk6viGOcWVOwN55gtNxaynlSr/q4jRX4dRpJ7gjS9W/YerN 8jBrYzGTpngyOybSqlnXAAIk5jK3izCSLNhifeZjF2GzcaO57B3zIstrjyFNURFHLh4q AovMyCAyR97pEGMoDGUr8Sp7sS37LV25QrMlAI3/Wo1eIo4CTF7kW//4GZwMfnJbjELl L/7g== X-Gm-Message-State: AO0yUKW7Mb08Yue9UJEt9kfZQpg7QdB5AxX9+mW9UVfwqI9BmQkEl6nC eGAzzR2PAdRTwPVVQ4BS501obLBRGawhPaE3iq0= X-Google-Smtp-Source: AK7set8JAuzg3+U4FmrY83xuBoNpWhJ8U0Eae2ii+jB7mOPeJtAPpZ1/jkLcsDPaWDwSEPde5egsUA== X-Received: by 2002:a05:6512:204:b0:4db:a19:6dfe with SMTP id a4-20020a056512020400b004db0a196dfemr9171576lfo.26.1678707682378; Mon, 13 Mar 2023 04:41:22 -0700 (PDT) Received: from [192.168.1.101] (abyj16.neoplus.adsl.tpnet.pl. [83.9.29.16]) by smtp.gmail.com with ESMTPSA id i2-20020ac25222000000b004d86808fd33sm948465lfl.15.2023.03.13.04.41.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Mar 2023 04:41:22 -0700 (PDT) From: Konrad Dybcio Date: Mon, 13 Mar 2023 12:41:10 +0100 Subject: [PATCH v2 4/7] arm64: dts: qcom: sc7280: Use the correct BWMON fallback compatible MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230304-topic-ddr_bwmon-v2-4-04db989db059@linaro.org> References: <20230304-topic-ddr_bwmon-v2-0-04db989db059@linaro.org> In-Reply-To: <20230304-topic-ddr_bwmon-v2-0-04db989db059@linaro.org> To: Andy Gross , Bjorn Andersson , Krzysztof Kozlowski , Georgi Djakov , Rob Herring , Thara Gopinath , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678707675; l=775; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=HQt/UEo0cCtLu7F+JcX1cFn0BClxhTD3AkZRLXFvT0U=; b=8GfFDsHT11QIGg4Lh93AuCcCvfDiE3d5GrUEo35sOOaBIOvDCiRTRVmEUHTptsgg9YFoj0wItyjZ b0Q39cQ1Bp8sVVQITi4tFc+DvQ/0+uwT5yCCU3tEU/gbcqROcQd7 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Use the correct fallback compatible for the BWMONv4 with merged global and monitor register spaces. Signed-off-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qco= m/sc7280.dtsi index 8f4ab6bd2886..f15fea6cc316 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -3533,7 +3533,7 @@ opp-7 { }; =20 pmu@90b6400 { - compatible =3D "qcom,sc7280-cpu-bwmon", "qcom,msm8998-bwmon"; + compatible =3D "qcom,sc7280-cpu-bwmon", "qcom,sdm845-bwmon"; reg =3D <0 0x090b6400 0 0x600>; =20 interrupts =3D ; --=20 2.39.2 From nobody Wed Feb 11 15:50:18 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F15A4C6FD1C for ; Mon, 13 Mar 2023 11:42:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230200AbjCMLmp (ORCPT ); Mon, 13 Mar 2023 07:42:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50088 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231216AbjCMLmB (ORCPT ); Mon, 13 Mar 2023 07:42:01 -0400 Received: from mail-lf1-x12f.google.com (mail-lf1-x12f.google.com [IPv6:2a00:1450:4864:20::12f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C36CA6507C for ; Mon, 13 Mar 2023 04:41:29 -0700 (PDT) Received: by mail-lf1-x12f.google.com with SMTP id j11so15266847lfg.13 for ; Mon, 13 Mar 2023 04:41:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678707683; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=SCGFjRBw5kwMjl8qNpiz2QImrKHMHXlVZTsDYHugyGg=; b=Hevw8MpUQhJ7dhCXv28ZA3swpM0Ffb+hqVdNWZm7xQ9v9eTnnUy/32o6XO7j7DMCvz WaC+vdC29jTZ5FRWSXUfLjfEDGxSFHpy+Jls70apaMuK9LBi51+H22vwnLWYJBiSRF6z qkcu+WSSCkkrR7p8G7ydui/hvMlUDLfBnBm2Cl3a0mjpTwh05Y1q3YFpbWd6RVHZE7/K mnbPJ050unHHZyqS/jAE9vXjqSuKtRi0Kxh4bDqu6d/iGwuwa2jKnDhGZW0/GTWXp300 YGvAdVwL8m7wzF6s0fT4EVx0oQa9XFbZHbwlHtkhrUUeRUENQmrp2FwEiOYpyOV+tOT8 FGgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678707683; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=SCGFjRBw5kwMjl8qNpiz2QImrKHMHXlVZTsDYHugyGg=; b=vW+dXy2zERTpwNX/qJH+aX83aHlBjvYc8LoRCjbSBEkuyDfy7WTd9fenSqbPVncQw8 1cjz9JhiBEif35S2p+gcaG+znwjEKp1roUtu5fRW6bu8+kYlrskl12VmSNt5gEpeD+Kc PPAumQYeCl6i2pUbveBjPjlSsPQNc9fFkvQw2+JLs2MgRPFCF8Psm+p5y/wOvjBQuBLR iAyiyRwW1xW48GXOLjy44o+d9gSsU4DDPsjvs0OA0PT67jEOHR8pZJlWv+WX7Hz0z6po 7GncKsn3ilPmnPR1uEyotXYcPr0IpXQT73cNAX6x251eWWoHlgrF9ChdgbE74uR4KojT 21jg== X-Gm-Message-State: AO0yUKUCVKOMdgQ5DoLie95PzOqSudhreYkgmSjjpNDvFB+aG6cf35Bj /37YBeGUkJ4sA8E1x3uXFpoqtGRrzkvYEkrZrn0= X-Google-Smtp-Source: AK7set9p2ibp3gnxwnhhNIVY7ndNWc9bkAeYbLeGTpt+vkBn28KfcVYod45QeMaEjyMrscM/aBFR0w== X-Received: by 2002:ac2:59dc:0:b0:4d8:537a:753f with SMTP id x28-20020ac259dc000000b004d8537a753fmr10970228lfn.6.1678707683533; Mon, 13 Mar 2023 04:41:23 -0700 (PDT) Received: from [192.168.1.101] (abyj16.neoplus.adsl.tpnet.pl. [83.9.29.16]) by smtp.gmail.com with ESMTPSA id i2-20020ac25222000000b004d86808fd33sm948465lfl.15.2023.03.13.04.41.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Mar 2023 04:41:23 -0700 (PDT) From: Konrad Dybcio Date: Mon, 13 Mar 2023 12:41:11 +0100 Subject: [PATCH v2 5/7] arm64: dts: qcom: sc8280xp: Use the correct BWMON fallback compatible MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230304-topic-ddr_bwmon-v2-5-04db989db059@linaro.org> References: <20230304-topic-ddr_bwmon-v2-0-04db989db059@linaro.org> In-Reply-To: <20230304-topic-ddr_bwmon-v2-0-04db989db059@linaro.org> To: Andy Gross , Bjorn Andersson , Krzysztof Kozlowski , Georgi Djakov , Rob Herring , Thara Gopinath , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678707675; l=790; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=IfB7PpYzYG3JhtNIYAVnyF67Vej4u/Zl5gN61g/4fsQ=; b=qDWyQPMu7J26e1w/bsNK1rpsK3lhrpiLLXq5/I9EI6+1HEGUbVv6euLgP/9by1+5H7qdVhwNlZW7 kgqOguKGCB5vj9r7FeUCCJ3WpOlTFXdrbgKWpw0C/QeO+LpbQe/7 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Use the correct fallback compatible for the BWMONv4 with merged global and monitor register spaces. Signed-off-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/q= com/sc8280xp.dtsi index 0d02599d8867..131b99bfe771 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -2946,7 +2946,7 @@ opp-12 { }; =20 pmu@90b6400 { - compatible =3D "qcom,sc8280xp-cpu-bwmon", "qcom,msm8998-bwmon"; + compatible =3D "qcom,sc8280xp-cpu-bwmon", "qcom,sdm845-bwmon"; reg =3D <0 0x090b6400 0 0x600>; =20 interrupts =3D ; --=20 2.39.2 From nobody Wed Feb 11 15:50:18 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 25970C61DA4 for ; Mon, 13 Mar 2023 11:43:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231197AbjCMLnE (ORCPT ); Mon, 13 Mar 2023 07:43:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50142 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230448AbjCMLmF (ORCPT ); Mon, 13 Mar 2023 07:42:05 -0400 Received: from mail-lf1-x134.google.com (mail-lf1-x134.google.com [IPv6:2a00:1450:4864:20::134]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3E3B86511C for ; Mon, 13 Mar 2023 04:41:34 -0700 (PDT) Received: by mail-lf1-x134.google.com with SMTP id d36so15287266lfv.8 for ; Mon, 13 Mar 2023 04:41:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678707685; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=nhcwZlNg1FLmmoVA2v+6lR/X6B7kwoWSENbvRw3V+fM=; b=vfSPDSVrRfmUnyJTEAUk27gZ10xbrdknu8UTKubV/WT0zi5EufFWzhMxppY2TQx5X8 kGMGqLrG9x2pHGecSJUUh3uwY/+Uo+DaEksZzSaQBMiHK7Rpr/ftnDfnFXIW1GzA3+g/ vksxTrEaxTrgPG1Skc85M7cWweigIeS1wLicUl0lwYawScQmoNRafs1XuN8lo7uYVsp+ wlZNfXvB1f38GcNEewUE2YX820CZvZjHWeyg43RORrGTP/DCsT26NdXFvKj2A6Oa8boN uVn8986tIGtQZzI96vHQRmsSY1lp0WTFH8gjEjcLrhl6YO+s+Bj8p9KCXY5W+T6l0+gn uLPA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678707685; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nhcwZlNg1FLmmoVA2v+6lR/X6B7kwoWSENbvRw3V+fM=; b=nVXplwv/W1QgCI6bgDLmrHuqalgC5qKHt8BTb786Mf5FvhiDpDta35xM38sU0FvLtg cHgKjaTBnedIxhR4mmgmeLvP0GBHYF4yNkU/TbeXbiuH2QIU9Sru8g/BUKHBOgTPCAE5 XLa/ZXYj+RnhiZ2Zbb7GVzodSZTqo7Gzuv8deP/UchzUO24mtgcG0dYsG7wTXVLZ7xLu wPDBhqy1nWYVI2m0lAf4ZISZbIPsbqQzl2qxwzdG7Qce8yrwEd6gHNJM74pcyZIka5L0 Rm2YqFYGSdRs1CXjqtbtTydRBGDG+XMU4QOjDZbt584JULQXN2B9xHuHRF28WVEmdVHW keoA== X-Gm-Message-State: AO0yUKWr2zIKzFBOs1i6d6T4V4wLwAdMYIUFt7rIAiy59luDGOinzDOu b4Q3pfsT/SGv3nXFqStgYAA7TLAQzuT8ifn9WUw= X-Google-Smtp-Source: AK7set9nUZb/LOKJ1Ru3fd+Ng3zRMdv8buZPjLGcDSqZD+Jdo7l6mTnGUQ+SRa1ouS0Yaom0DfBFTQ== X-Received: by 2002:a19:ac05:0:b0:4b5:5b36:28bd with SMTP id g5-20020a19ac05000000b004b55b3628bdmr3310115lfc.2.1678707684861; Mon, 13 Mar 2023 04:41:24 -0700 (PDT) Received: from [192.168.1.101] (abyj16.neoplus.adsl.tpnet.pl. [83.9.29.16]) by smtp.gmail.com with ESMTPSA id i2-20020ac25222000000b004d86808fd33sm948465lfl.15.2023.03.13.04.41.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Mar 2023 04:41:24 -0700 (PDT) From: Konrad Dybcio Date: Mon, 13 Mar 2023 12:41:12 +0100 Subject: [PATCH v2 6/7] arm64: dts: qcom: sdm845: Use the correct BWMON compatible MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230304-topic-ddr_bwmon-v2-6-04db989db059@linaro.org> References: <20230304-topic-ddr_bwmon-v2-0-04db989db059@linaro.org> In-Reply-To: <20230304-topic-ddr_bwmon-v2-0-04db989db059@linaro.org> To: Andy Gross , Bjorn Andersson , Krzysztof Kozlowski , Georgi Djakov , Rob Herring , Thara Gopinath , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678707675; l=887; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=N++71rZKj+7oTWz7RtdV/kr/uVQ7WD5qOJ8G1FDU0t4=; b=B0vj+qTKkpt9ihZA5zXoBsvvJQfdra8ZsocCae4Got+Y6tx4AhzbMPk2vXYSkRuhPD7vxTLnJftX bzkqiBb0C2hHUke1lwm26GpmHmbmSzaJ0AuEAYgUP2yJdNQz53K+ X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Drop the incorrect msm8998 fallback and use the new qcom,sdm845-cpu-bwmon compatible to distinguish the DDR BWMON found on this platform. Signed-off-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qco= m/sdm845.dtsi index 479859bd8ab3..1f2a97a20ef3 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2241,7 +2241,7 @@ opp-4 { }; =20 pmu@1436400 { - compatible =3D "qcom,sdm845-bwmon", "qcom,msm8998-bwmon"; + compatible =3D "qcom,sdm845-cpu-bwmon", "qcom,sdm845-bwmon"; reg =3D <0 0x01436400 0 0x600>; interrupts =3D ; interconnects =3D <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_LL= CC 3>; --=20 2.39.2 From nobody Wed Feb 11 15:50:18 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5163CC6FD1C for ; Mon, 13 Mar 2023 11:42:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231126AbjCMLmy (ORCPT ); Mon, 13 Mar 2023 07:42:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50144 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231221AbjCMLmF (ORCPT ); Mon, 13 Mar 2023 07:42:05 -0400 Received: from mail-lf1-x12c.google.com (mail-lf1-x12c.google.com [IPv6:2a00:1450:4864:20::12c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C5D8765C7E for ; Mon, 13 Mar 2023 04:41:34 -0700 (PDT) Received: by mail-lf1-x12c.google.com with SMTP id y15so5786958lfa.7 for ; Mon, 13 Mar 2023 04:41:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678707686; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=RH10IfoWhFhfMN7U8guTBq/z8yFM8bycsFPXU+lvHyE=; b=xT30oxgN4y6Rar0wqRH4afPyKNC4nqyZTJ8SIeW/1FIly1DqrAbpUWyajxrBMlL6xa IC1FXWHVX+AI48ZCLgJ58xxG6Bol9YXcvtHOPuaG4YTrwdkqpFtd2v2mtxKPqthncZLV DFF7IXyFJhq/WySK/632zrh+rKhWbl10XPV5Esx0ACxHhSTN1ojE8KYE9vQ2vkOj184c 2aXQNlVC6sDdm+H3kH44c3ShSNXQstXCMBEAUg4t4XBFzGLomILmQzdB7FxatkK+FaYH CEJu8+Fv2iRDSx0oRLVT6MGjysxonOiP/duwhSlP1B6I5GQjrLfcIrQFsDlYPGokBTmq MeRw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678707686; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RH10IfoWhFhfMN7U8guTBq/z8yFM8bycsFPXU+lvHyE=; b=tPcS6xZzhO9fJDyEQ5DBs+arN1+g8LPXiBTvNBUCwcRH3z5yS3CChw2ZQYVjdT0/DS /jusfrHlFEeCOGYMTBwGuj5Pqadt700ZQsTA8rYG1hV4wDTtCLUNOzQffcaSgblVP64X +3HAGR9HU8n9wwDZLg34kQJXLoW8byg9YAWWepts6QQ1Ux5ap1+jxI1FL8LJbD3BcB1P FHy6DN+/rmOmViOtKrIffXakI0LKK+H3+KKgJwGIr6Poz5ftH1BHjkc9L6n3T5RJvwHG slxnWHwMvmtdkAG3nR7I/yiws99PsT15bpizzadAl14eVrNMP8cGp8lyw+e+NjW0tDNR EOYQ== X-Gm-Message-State: AO0yUKUkgT9D6PhxOdV/kM8YdKQM6TfGngAbqVn6Cg/4/5z0gXGj8Aia 4MWfbaRT9P6jjulb9KxpBmZyyOOz0VWFNNn4tqU= X-Google-Smtp-Source: AK7set/tI4nk7AoITBvfoTwGu0Y7NAxmBwOlHtVgi7aTL3sLkjBEvxxpJ+ZblFUd2oU/KXkw05pmFQ== X-Received: by 2002:a19:7614:0:b0:4e0:ce21:b92 with SMTP id c20-20020a197614000000b004e0ce210b92mr10348746lff.16.1678707685996; Mon, 13 Mar 2023 04:41:25 -0700 (PDT) Received: from [192.168.1.101] (abyj16.neoplus.adsl.tpnet.pl. [83.9.29.16]) by smtp.gmail.com with ESMTPSA id i2-20020ac25222000000b004d86808fd33sm948465lfl.15.2023.03.13.04.41.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Mar 2023 04:41:25 -0700 (PDT) From: Konrad Dybcio Date: Mon, 13 Mar 2023 12:41:13 +0100 Subject: [PATCH v2 7/7] arm64: dts: qcom: sm8550: Use the correct BWMON fallback compatible MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230304-topic-ddr_bwmon-v2-7-04db989db059@linaro.org> References: <20230304-topic-ddr_bwmon-v2-0-04db989db059@linaro.org> In-Reply-To: <20230304-topic-ddr_bwmon-v2-0-04db989db059@linaro.org> To: Andy Gross , Bjorn Andersson , Krzysztof Kozlowski , Georgi Djakov , Rob Herring , Thara Gopinath , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678707675; l=848; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=jgTEqsKAebB9bsGGIMDxQ30Eg4/dVyljepjgSni4ZzI=; b=a3ILA0uJYyR1CR/vHX+MwLfp1w+hxsINjmLCYH+GzvdULrSU2BCmuMMAFNVZPML/8nT5b1Qa8SK2 DwQCCVKxB/8JKZ1iDcm1Pa2VXyHKOzpxu4GiCwA3IhQOtN9UOmBY X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Use the correct fallback compatible for the BWMONv4 with merged global and monitor register spaces. Signed-off-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qco= m/sm8550.dtsi index 25f51245fe9b..b5488c6822bd 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -3391,7 +3391,7 @@ opp-8 { }; =20 pmu@240b6400 { - compatible =3D "qcom,sm8550-cpu-bwmon", "qcom,msm8998-bwmon"; + compatible =3D "qcom,sm8550-cpu-bwmon", "qcom,sdm845-bwmon"; reg =3D <0 0x240b6400 0 0x600>; interrupts =3D ; interconnects =3D <&gem_noc MASTER_APPSS_PROC 3 &gem_noc SLAVE_LLCC 3>; --=20 2.39.2