From nobody Sat Sep 21 03:01:52 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5EA69C7EE33 for ; Fri, 3 Mar 2023 02:00:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229651AbjCCCA1 (ORCPT ); Thu, 2 Mar 2023 21:00:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39126 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229555AbjCCCAZ (ORCPT ); Thu, 2 Mar 2023 21:00:25 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5E07C1ACC1; Thu, 2 Mar 2023 18:00:23 -0800 (PST) X-UUID: 248c5df0b96711ed945fc101203acc17-20230303 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=e1LaISQmDySBwK5fVZyb1TsPzxwkstAmNzoyLqLOhjA=; b=PYhtJKelZAJza8QcQyD6FQkSCGYMvoFZBrf3e56bagvkyySC5Q2Q9wU6+lX4PLwA6adHPbx5XCSRASRvVddHcomERVB56xjSQ25AbpHLtcOgtqjc1+QT5UCALiPW4muAsONh8oBaIIl90bZg4vWPkUxQrvyRkAGQ1RtKLSkiUMA=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.20,REQID:91ab8183-bbe0-41e3-a307-3aef4e8053d9,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:25b5999,CLOUDID:46470eb2-beed-4dfc-bd9c-e1b22fa6ccc4,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0 X-CID-BVR: 0 X-UUID: 248c5df0b96711ed945fc101203acc17-20230303 Received: from mtkmbs11n2.mediatek.inc [(172.21.101.187)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 455657128; Fri, 03 Mar 2023 10:00:16 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.25; Fri, 3 Mar 2023 10:00:15 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.25 via Frontend Transport; Fri, 3 Mar 2023 10:00:15 +0800 From: Allen-KH Cheng To: Rob Herring , Krzysztof Kozlowski , Matthias Brugger CC: , , , , , , Allen-KH Cheng Subject: [PATCH v2] arm64: dts: mediatek: Add cpufreq nodes for MT8192 Date: Fri, 3 Mar 2023 10:00:14 +0800 Message-ID: <20230303020014.23580-1-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the cpufreq nodes for MT8192 SoC. Signed-off-by: Allen-KH Cheng --- Change in v1: Fix : this should be <&performance 0> [Allen-KH Cheng ] --- --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts= /mediatek/mt8192.dtsi index 87b91c8feaf9..48a4fc88fde4 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -70,6 +70,7 @@ d-cache-line-size =3D <64>; d-cache-sets =3D <128>; next-level-cache =3D <&l2_0>; + performance-domains =3D <&performance 0>; capacity-dmips-mhz =3D <530>; }; =20 @@ -87,6 +88,7 @@ d-cache-line-size =3D <64>; d-cache-sets =3D <128>; next-level-cache =3D <&l2_0>; + performance-domains =3D <&performance 0>; capacity-dmips-mhz =3D <530>; }; =20 @@ -104,6 +106,7 @@ d-cache-line-size =3D <64>; d-cache-sets =3D <128>; next-level-cache =3D <&l2_0>; + performance-domains =3D <&performance 0>; capacity-dmips-mhz =3D <530>; }; =20 @@ -121,6 +124,7 @@ d-cache-line-size =3D <64>; d-cache-sets =3D <128>; next-level-cache =3D <&l2_0>; + performance-domains =3D <&performance 0>; capacity-dmips-mhz =3D <530>; }; =20 @@ -138,6 +142,7 @@ d-cache-line-size =3D <64>; d-cache-sets =3D <256>; next-level-cache =3D <&l2_1>; + performance-domains =3D <&performance 0>; capacity-dmips-mhz =3D <1024>; }; =20 @@ -155,6 +160,7 @@ d-cache-line-size =3D <64>; d-cache-sets =3D <256>; next-level-cache =3D <&l2_1>; + performance-domains =3D <&performance 0>; capacity-dmips-mhz =3D <1024>; }; =20 @@ -172,6 +178,7 @@ d-cache-line-size =3D <64>; d-cache-sets =3D <256>; next-level-cache =3D <&l2_1>; + performance-domains =3D <&performance 0>; capacity-dmips-mhz =3D <1024>; }; =20 @@ -189,6 +196,7 @@ d-cache-line-size =3D <64>; d-cache-sets =3D <256>; next-level-cache =3D <&l2_1>; + performance-domains =3D <&performance 0>; capacity-dmips-mhz =3D <1024>; }; =20 @@ -318,6 +326,12 @@ compatible =3D "simple-bus"; ranges; =20 + performance: performance-controller@11bc10 { + compatible =3D "mediatek,cpufreq-hw"; + reg =3D <0 0x0011bc10 0 0x120>, <0 0x0011bd30 0 0x120>; + #performance-domain-cells =3D <1>; + }; + gic: interrupt-controller@c000000 { compatible =3D "arm,gic-v3"; #interrupt-cells =3D <4>; --=20 2.18.0