From nobody Sat Apr 11 14:30:47 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06A85C64EC4 for ; Mon, 6 Mar 2023 22:20:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230051AbjCFWUr (ORCPT ); Mon, 6 Mar 2023 17:20:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47276 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230035AbjCFWUn (ORCPT ); Mon, 6 Mar 2023 17:20:43 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 14EEE5D476 for ; Mon, 6 Mar 2023 14:20:42 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id C20B7B81141 for ; Mon, 6 Mar 2023 22:20:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 30B7AC433A0; Mon, 6 Mar 2023 22:20:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1678141239; bh=VTfNMr9L+OZD61fr7gdaYm/jVX8qzkby7YMcuXZ9mFU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=JAg71P6ctiIsp3OinvUbuklYSbxEQNHCJaI/ZeYXIB8NoTMsEmlyMkkwvmmRqoEFY E3m7LuMxCfHN9MhDjpolb5APS/kcKsaZmEMHdKQyruQPMvZ/7/EmtNf7NSuCTIwE3J 9fnRiAYO6eAaQ3J7znBejZKC8UudnzkTYtOj8WDeY0bTUs4xD6pTUUVge9pTC1l/Nj lbWS0XSJPjspt92Z28comwlS/tOVi7Br+ZzNPkH9ouFs5ur/P8cp4hSKQMYGjWXdoo AF2qutd3rFc0k+Meu1ziqVDJFsswMZquodLMj7QGQsAlgQEbYE/OqopiJhXRtmCBSx +ll9DngBkjrtQ== From: Mark Brown Date: Mon, 06 Mar 2023 22:20:23 +0000 Subject: [PATCH 1/3] arm64/cpufeature: Pull out helper for CPUID register definitions MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230303-arm64-cpufeature-helpers-v1-1-b16cf36acaea@kernel.org> References: <20230303-arm64-cpufeature-helpers-v1-0-b16cf36acaea@kernel.org> In-Reply-To: <20230303-arm64-cpufeature-helpers-v1-0-b16cf36acaea@kernel.org> To: Catalin Marinas , Will Deacon Cc: Suzuki K Poulose , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Mark Brown X-Mailer: b4 0.13-dev-bd1bf X-Developer-Signature: v=1; a=openpgp-sha256; l=2794; i=broonie@kernel.org; h=from:subject:message-id; bh=VTfNMr9L+OZD61fr7gdaYm/jVX8qzkby7YMcuXZ9mFU=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBkBmcx2Y5IxiHuDp4hea7brk355PUmvzDhPhmF8Ym6 zQik5RyJATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCZAZnMQAKCRAk1otyXVSH0G8SB/ 9/oeM1uv8BJc13DrXGX31mWlPAc13MPIZtUQqHVCGbSaBn9FhFf2KiNeTUEiLFgJ7ELv6vtat5sxvX 6sCPSPUASguAku2QrOpqPvsOTYRSZZbgutHwo3QiCgeXAh3AoHNRRxv0aqz18XXWetLBbcC/yW8uAz viwoR6jhD9kThahXuXeHqfwpifLxGxFCW99N7kC4Y51VVJlUSfRIUzxpEcWbByxifOE03B77EGT29b HUtBY+leSgaFW/CCr2+Lr6LVgH4PNrhlxcH6E6ykpCoZCKgA5/SZdUmwOW4vWceSQUfy2i9aErOD3E P4UeeXBXyg8M4WfXF0IKxcKAFqM+H5 X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We use the same structure to match hwcaps and CPU features so we can use the same helper to generate the fields required. Pull the portion of the current hwcaps helper that initialises the fields out into a separate define placed earlier in the file so we can use it for cpufeatures. No functional change. Signed-off-by: Mark Brown --- arch/arm64/kernel/cpufeature.c | 27 +++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 2e3e55139777..77862b7c8908 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -140,6 +140,13 @@ void dump_cpu_features(void) pr_emerg("0x%*pb\n", ARM64_NCAPS, &cpu_hwcaps); } =20 +#define ARM64_CPUID_FIELDS(reg, field, min_value) \ + .sys_reg =3D SYS_##reg, \ + .field_pos =3D reg##_##field##_SHIFT, \ + .field_width =3D reg##_##field##_WIDTH, \ + .sign =3D reg##_##field##_SIGNED, \ + .min_field_value =3D reg##_##field##_##min_value, + #define __ARM64_FTR_BITS(SIGNED, VISIBLE, STRICT, TYPE, SHIFT, WIDTH, SAFE= _VAL) \ { \ .sign =3D SIGNED, \ @@ -2776,12 +2783,8 @@ static const struct arm64_cpu_capabilities arm64_fea= tures[] =3D { }; =20 #define HWCAP_CPUID_MATCH(reg, field, min_value) \ - .matches =3D has_user_cpuid_feature, \ - .sys_reg =3D SYS_##reg, \ - .field_pos =3D reg##_##field##_SHIFT, \ - .field_width =3D reg##_##field##_WIDTH, \ - .sign =3D reg##_##field##_SIGNED, \ - .min_field_value =3D reg##_##field##_##min_value, + .matches =3D has_user_cpuid_feature, \ + ARM64_CPUID_FIELDS(reg, field, min_value) =20 #define __HWCAP_CAP(name, cap_type, cap) \ .desc =3D name, \ @@ -2811,26 +2814,26 @@ static const struct arm64_cpu_capabilities arm64_fe= atures[] =3D { #ifdef CONFIG_ARM64_PTR_AUTH static const struct arm64_cpu_capabilities ptr_auth_hwcap_addr_matches[] = =3D { { - HWCAP_CPUID_MATCH(ID_AA64ISAR1_EL1, APA, PAuth) + ARM64_CPUID_FIELDS(ID_AA64ISAR1_EL1, APA, PAuth) }, { - HWCAP_CPUID_MATCH(ID_AA64ISAR2_EL1, APA3, PAuth) + ARM64_CPUID_FIELDS(ID_AA64ISAR2_EL1, APA3, PAuth) }, { - HWCAP_CPUID_MATCH(ID_AA64ISAR1_EL1, API, PAuth) + ARM64_CPUID_FIELDS(ID_AA64ISAR1_EL1, API, PAuth) }, {}, }; =20 static const struct arm64_cpu_capabilities ptr_auth_hwcap_gen_matches[] = =3D { { - HWCAP_CPUID_MATCH(ID_AA64ISAR1_EL1, GPA, IMP) + ARM64_CPUID_FIELDS(ID_AA64ISAR1_EL1, GPA, IMP) }, { - HWCAP_CPUID_MATCH(ID_AA64ISAR2_EL1, GPA3, IMP) + ARM64_CPUID_FIELDS(ID_AA64ISAR2_EL1, GPA3, IMP) }, { - HWCAP_CPUID_MATCH(ID_AA64ISAR1_EL1, GPI, IMP) + ARM64_CPUID_FIELDS(ID_AA64ISAR1_EL1, GPI, IMP) }, {}, }; --=20 2.30.2