From nobody Sat Sep 21 04:37:47 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 24447C7EE31 for ; Wed, 1 Mar 2023 09:56:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229960AbjCAJ4Y (ORCPT ); Wed, 1 Mar 2023 04:56:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41306 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229916AbjCAJzp (ORCPT ); Wed, 1 Mar 2023 04:55:45 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EA26337548; Wed, 1 Mar 2023 01:55:39 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 407B666020E0; Wed, 1 Mar 2023 09:55:38 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677664538; bh=KQl+1992t3fzHAo6w7W+uAYOQeZPx/82oAPGoJNpTLE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=csQbvl89FdpuAsidyeMxB6D5ASTOUwPVgoH5Ldnh9fdZZWivCdS2G7KYUswrxJIFV wlAFmBDrciA0DNmpSPQvoxOzg4ZmLz9OX9X3VtLEz5WV1hhfvwpd+WzeYxjm2KVlfq hS4uiwlRKR3Brzj6zUG//2QeXeFiyqTES4H5FZsz31g99FKXGkPK29LS1Hdhw84Bnk YFSmzIp+lzcbLC1dsmzbz8VpIfNd0ZypdPGyhthbuRE7r9TXmiLjEccDqZT0VGDIYU ZaUTYZgqGsmzhNmqQe8JU8wW0ZfGZZB0XXneg2oqrYRgZn7tBUN/ROgSbCrgTR/yxY dZuxGhlvH1HkA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v4 14/19] arm64: dts: mediatek: mt8195: Add mfg_core_tmp clock to MFG1 domain Date: Wed, 1 Mar 2023 10:55:18 +0100 Message-Id: <20230301095523.428461-15-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> References: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Similarly to what can be seen in MT8192, on MT8195 the mfg_core_tmp clock is a mux used to switch between different "safe" (and slower) clock sources for the GPU: this is used during MFGPLL reconfiguration and eventually during idling at very low frequencies. This clock getting turned off means that the GPU will occasionally be unclocked, producing obvious consequences such as system crash or unpredictable behavior: assigning it to the top level MFG power domain will make sure that this stays on at all times during any operation on the MFG domain (only GPU-related transactions). Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts= /mediatek/mt8195.dtsi index 8f1264d5290b..d116830d6af3 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -446,8 +446,9 @@ mfg0: power-domain@MT8195_POWER_DOMAIN_MFG0 { =20 power-domain@MT8195_POWER_DOMAIN_MFG1 { reg =3D ; - clocks =3D <&apmixedsys CLK_APMIXED_MFGPLL>; - clock-names =3D "mfg"; + clocks =3D <&apmixedsys CLK_APMIXED_MFGPLL>, + <&topckgen CLK_TOP_MFG_CORE_TMP>; + clock-names =3D "mfg", "alt"; mediatek,infracfg =3D <&infracfg_ao>; #address-cells =3D <1>; #size-cells =3D <0>; --=20 2.39.2