From nobody Sat Sep 21 03:14:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4629EC7EE36 for ; Wed, 1 Mar 2023 09:55:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229895AbjCAJzj (ORCPT ); Wed, 1 Mar 2023 04:55:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40664 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229861AbjCAJzf (ORCPT ); Wed, 1 Mar 2023 04:55:35 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 01C1D35243; Wed, 1 Mar 2023 01:55:30 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 3ED4166020E6; Wed, 1 Mar 2023 09:55:29 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677664529; bh=L6kGyfCrTlPJ9U3bVTbj8GIaJJMOf4x1aJLiGYToiq8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eW99pR/vA4O7k7G4KkUJeTWCnY9hsn6relGj8RSw22V3Yiphv7T7bj2crtdA/NLne 4vXHLbhPyb+76dA5+PtCPhoyOhZDC5VD6e4FOKW+LDH+pEda8OSzF7Igo05iNVVupr WjH4XiKEakpOFqQsVdUMyJUTT0FgiPig0BqNN2/EN/8LGlfKG/8pK0IvyOknXj8H1b TgjaVl8RxIbw5Y+cqbdfjUzWov7kjCPkkaI1Vg7ul1NAf1UyOywj1XWnAmdzVIwXZY sJa8i93kkcJc0jQh6AkiDU4dWWmkeAyxm7pI5Bvt9Q/Q5cDFf6ID9tlnCsRW7siR7w SxawEniUqxEIg== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v4 01/19] arm64: dts: mediatek: mt8183-kukui: Couple VGPU and VSRAM_GPU regulators Date: Wed, 1 Mar 2023 10:55:05 +0100 Message-Id: <20230301095523.428461-2-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> References: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add coupling for these regulators, as they have a strict voltage output relation to satisfy in order to ensure GPU stable operation. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/bo= ot/dts/mediatek/mt8183-kukui.dtsi index fbe14b13051a..de9778c85b94 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi @@ -294,7 +294,6 @@ dsi_out: endpoint { =20 &gpu { mali-supply =3D <&mt6358_vgpu_reg>; - sram-supply =3D <&mt6358_vsram_gpu_reg>; }; =20 &i2c0 { @@ -401,6 +400,11 @@ &mt6358codec { Avdd-supply =3D <&mt6358_vaud28_reg>; }; =20 +&mt6358_vgpu_reg { + regulator-coupled-with =3D <&mt6358_vsram_gpu_reg>; + regulator-coupled-max-spread =3D <100000>; +}; + &mt6358_vsim1_reg { regulator-min-microvolt =3D <2700000>; regulator-max-microvolt =3D <2700000>; @@ -411,6 +415,11 @@ &mt6358_vsim2_reg { regulator-max-microvolt =3D <2700000>; }; =20 +&mt6358_vsram_gpu_reg { + regulator-coupled-with =3D <&mt6358_vgpu_reg>; + regulator-coupled-max-spread =3D <100000>; +}; + &pio { aud_pins_default: audiopins { pins_bus { --=20 2.39.2 From nobody Sat Sep 21 03:14:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 39DE5C64ED6 for ; Wed, 1 Mar 2023 09:55:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229676AbjCAJzm (ORCPT ); Wed, 1 Mar 2023 04:55:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40746 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229862AbjCAJzf (ORCPT ); Wed, 1 Mar 2023 04:55:35 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 04ADC20562; Wed, 1 Mar 2023 01:55:31 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id E5B6F660211B; Wed, 1 Mar 2023 09:55:29 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677664530; bh=k3mmKlq0xAU4ScRTgH//jypGEajEo18Py+VrtVaBBbI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Xf4GrQUd18VtRsYjNDhI6iPGwpLLUBmOHp/idd/SAF4TenUvPKPuoNjQK0Fz5zZlB U1vMbfBLlstWasR/g8cupFzaRiy6HWAB0I0coRTMjyXD2Q4ZPsqechcdm3LzdvnKwv jQIyFVdO/8uZC/WgW7nq45PCBAP8I6y5AZHHclDVx4nxDx/Jzw1DlKLVbCv/HqpEZ5 NHXM/4J/es2w8GrIrvnCZpDOrG5CefOR2HuRV8jjoMEFVwTfQ6771wUIpRuR4Z2bvJ WLQpjKZFKvDr8XRt8lJZJDrZxxhvyN4RXNmdEhjA+YTerirCmgYmftsEFJbExnjwWg mWWZ5gAPvJieA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v4 02/19] arm64: dts: mediatek: mt8183-kukui: Override vgpu/vsram_gpu constraints Date: Wed, 1 Mar 2023 10:55:06 +0100 Message-Id: <20230301095523.428461-3-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> References: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Override the PMIC-default voltage constraints for VGPU and VSRAM_GPU with the platform specific vmin/vmax for the highest possible SoC binning. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/bo= ot/dts/mediatek/mt8183-kukui.dtsi index de9778c85b94..63952c1251df 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi @@ -401,6 +401,9 @@ &mt6358codec { }; =20 &mt6358_vgpu_reg { + regulator-min-microvolt =3D <625000>; + regulator-max-microvolt =3D <900000>; + regulator-coupled-with =3D <&mt6358_vsram_gpu_reg>; regulator-coupled-max-spread =3D <100000>; }; @@ -416,6 +419,9 @@ &mt6358_vsim2_reg { }; =20 &mt6358_vsram_gpu_reg { + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <1000000>; + regulator-coupled-with =3D <&mt6358_vgpu_reg>; regulator-coupled-max-spread =3D <100000>; }; --=20 2.39.2 From nobody Sat Sep 21 03:14:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E03B1C7EE30 for ; Wed, 1 Mar 2023 09:55:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229928AbjCAJzv (ORCPT ); Wed, 1 Mar 2023 04:55:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40780 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229879AbjCAJzg (ORCPT ); Wed, 1 Mar 2023 04:55:36 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9EFBC1BAC2; Wed, 1 Mar 2023 01:55:32 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 9AAFA6602123; Wed, 1 Mar 2023 09:55:30 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677664531; bh=lArSKCx17mh1O30bNJ4tPf+I/p5uXQpXGMq90jh0j/I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CYaj4f7FU9I5jMtcZ/eGrE4N4mxxH7E3r8dcgxBjl2dEYCtwfLel98ss2XCDiHzod dEk05TvqK14EnnBsZpUMTj/BvzAMJ7++Qw+ggFnHPkTcsE1zLIJaxx8tfDPMk0DW+f GER46cqxPOiddnf1YxWLySNljgvOwy70qI/9Q8Byg9XFqwYIjeEwaIvVOjA+yUnAq1 Yl5eIhHa+GsSrGN3xxMx/tVamZmTXLuq+6TImacl3uAsI4VIOs4Shp59/hlpYQk+ZK RwW+iG0UpGX3HWiX04VwlH63CKN6PbNSpBhoFwn5Y0cs400F8axh6qACOJbEllMNTA u3BQU9j3WRyNw== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v4 03/19] arm64: dts: mediatek: mt8183: Remove second opp-microvolt entries from gpu table Date: Wed, 1 Mar 2023 10:55:07 +0100 Message-Id: <20230301095523.428461-4-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> References: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This was done to keep a strict relation between VSRAM and VGPU, but it never worked: now we're doing it transparently with the new mediatek-regulator-coupler driver. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 32 ++++++++++++------------ 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts= /mediatek/mt8183.dtsi index 3d1d7870a5f1..e01b96adef02 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -563,82 +563,82 @@ gpu_opp_table: opp-table-0 { =20 opp-300000000 { opp-hz =3D /bits/ 64 <300000000>; - opp-microvolt =3D <625000>, <850000>; + opp-microvolt =3D <625000>; }; =20 opp-320000000 { opp-hz =3D /bits/ 64 <320000000>; - opp-microvolt =3D <631250>, <850000>; + opp-microvolt =3D <631250>; }; =20 opp-340000000 { opp-hz =3D /bits/ 64 <340000000>; - opp-microvolt =3D <637500>, <850000>; + opp-microvolt =3D <637500>; }; =20 opp-360000000 { opp-hz =3D /bits/ 64 <360000000>; - opp-microvolt =3D <643750>, <850000>; + opp-microvolt =3D <643750>; }; =20 opp-380000000 { opp-hz =3D /bits/ 64 <380000000>; - opp-microvolt =3D <650000>, <850000>; + opp-microvolt =3D <650000>; }; =20 opp-400000000 { opp-hz =3D /bits/ 64 <400000000>; - opp-microvolt =3D <656250>, <850000>; + opp-microvolt =3D <656250>; }; =20 opp-420000000 { opp-hz =3D /bits/ 64 <420000000>; - opp-microvolt =3D <662500>, <850000>; + opp-microvolt =3D <662500>; }; =20 opp-460000000 { opp-hz =3D /bits/ 64 <460000000>; - opp-microvolt =3D <675000>, <850000>; + opp-microvolt =3D <675000>; }; =20 opp-500000000 { opp-hz =3D /bits/ 64 <500000000>; - opp-microvolt =3D <687500>, <850000>; + opp-microvolt =3D <687500>; }; =20 opp-540000000 { opp-hz =3D /bits/ 64 <540000000>; - opp-microvolt =3D <700000>, <850000>; + opp-microvolt =3D <700000>; }; =20 opp-580000000 { opp-hz =3D /bits/ 64 <580000000>; - opp-microvolt =3D <712500>, <850000>; + opp-microvolt =3D <712500>; }; =20 opp-620000000 { opp-hz =3D /bits/ 64 <620000000>; - opp-microvolt =3D <725000>, <850000>; + opp-microvolt =3D <725000>; }; =20 opp-653000000 { opp-hz =3D /bits/ 64 <653000000>; - opp-microvolt =3D <743750>, <850000>; + opp-microvolt =3D <743750>; }; =20 opp-698000000 { opp-hz =3D /bits/ 64 <698000000>; - opp-microvolt =3D <768750>, <868750>; + opp-microvolt =3D <768750>; }; =20 opp-743000000 { opp-hz =3D /bits/ 64 <743000000>; - opp-microvolt =3D <793750>, <893750>; + opp-microvolt =3D <793750>; }; =20 opp-800000000 { opp-hz =3D /bits/ 64 <800000000>; - opp-microvolt =3D <825000>, <925000>; + opp-microvolt =3D <825000>; }; }; =20 --=20 2.39.2 From nobody Sat Sep 21 03:14:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB55EC7EE30 for ; Wed, 1 Mar 2023 09:55:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229613AbjCAJzp (ORCPT ); Wed, 1 Mar 2023 04:55:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40758 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229872AbjCAJzg (ORCPT ); Wed, 1 Mar 2023 04:55:36 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 186F9366AD; Wed, 1 Mar 2023 01:55:33 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 4CEDD6602126; Wed, 1 Mar 2023 09:55:31 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677664531; bh=68pAuhR2AwbWVXI3OvP5qkhYBgJxnDaV6L7C5W0OdA8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=U1HDW/xGfyw5NrMrPFCU/v9jyz8pC0fuA9PeRsZ5TFG0+qFsW5D6upIxRYwPsMFqM gTl4RmQ/oxW45ILWFsgzUZMSx5qakJoGVo1g9YN4bECROPHNFvrPMm03u29ayUtY1/ +dA43RxktVhEFfeCINFMnHmGPsIhVs2kWjRX7HXlHTXZs/HcjanVmrovgHj1MmKHB9 AMcXrmFtHVi2/qlAExpp0DiCSU4gY18atchb+tdfdnK52YvdY5FoQzmoQhTqqtKkRo voW63sMbjs5yMG4uoyGYm4iyxoaFfytZwoTKYo63Uv0FkXb57ytFTgBLZ7uOuCkKWO ueFcDgCgM6BcA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v4 04/19] arm64: dts: mt8183-pumpkin: Couple VGPU and VSRAM_GPU regulators Date: Wed, 1 Mar 2023 10:55:08 +0100 Message-Id: <20230301095523.428461-5-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> References: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add coupling for these regulators, as they have a strict voltage output relation to satisfy in order to ensure GPU stable operation. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts b/arch/arm64/b= oot/dts/mediatek/mt8183-pumpkin.dts index a1d01639df30..c228f04d086b 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts +++ b/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts @@ -71,7 +71,6 @@ &auxadc { =20 &gpu { mali-supply =3D <&mt6358_vgpu_reg>; - sram-supply =3D <&mt6358_vsram_gpu_reg>; }; =20 &i2c0 { @@ -176,6 +175,16 @@ &mmc1 { non-removable; }; =20 +&mt6358_vgpu_reg { + regulator-coupled-with =3D <&mt6358_vsram_gpu_reg>; + regulator-coupled-max-spread =3D <100000>; +}; + +&mt6358_vsram_gpu_reg { + regulator-coupled-with =3D <&mt6358_vgpu_reg>; + regulator-coupled-max-spread =3D <100000>; +}; + &pio { i2c_pins_0: i2c0 { pins_i2c{ --=20 2.39.2 From nobody Sat Sep 21 03:14:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 937D2C64EC7 for ; Wed, 1 Mar 2023 09:55:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229715AbjCAJzs (ORCPT ); Wed, 1 Mar 2023 04:55:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40782 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229534AbjCAJzg (ORCPT ); Wed, 1 Mar 2023 04:55:36 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 96CC91C599; Wed, 1 Mar 2023 01:55:35 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 005876602129; Wed, 1 Mar 2023 09:55:31 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677664532; bh=Ua7BwziPqVhfWLXLBzmILApbAUpa3Hpx/UhYQnsGNBU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NFQfYgKmh/wAZEKNGxC8nLtuK2x3mXJaEZNe3LXZeNA+pyYRgjxz7TXDbqb8mDzHh F32yXiXlRUIacfbgzJ+BLcb0CBnFkSNJBavd6zUhLsUI0ucTwr6PUY5AmNvH0/OXL+ +CEuZET5PQJLwGyFV/T+nEZlj7f14XjA0SZ2TrFiPGQl9dHllRAJcOxWMBFrkGOt5H qec7MiXa/qYy4uo1lLvtpGZemKuMDSghuRr5/ux5JLwRGuwUjJMyxVQXq4HHjemDnB D8XPHzo9b1Xo27I/BeL5W4lPvpr3XUPrTGJb+AGmITHSmM1vF4RxhibCWzENOStbdP tluhzhuX6ctGQ== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v4 05/19] arm64: dts: mediatek: mt8183-evb: Couple VGPU and VSRAM_GPU regulators Date: Wed, 1 Mar 2023 10:55:09 +0100 Message-Id: <20230301095523.428461-6-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> References: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add coupling for these regulators, as they have a strict voltage output relation to satisfy in order to ensure GPU stable operation. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/= dts/mediatek/mt8183-evb.dts index 52dc4a50e34d..fd327437e932 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts @@ -52,7 +52,6 @@ &auxadc { =20 &gpu { mali-supply =3D <&mt6358_vgpu_reg>; - sram-supply =3D <&mt6358_vsram_gpu_reg>; }; =20 &i2c0 { @@ -138,6 +137,16 @@ &mmc1 { non-removable; }; =20 +&mt6358_vgpu_reg { + regulator-coupled-with =3D <&mt6358_vsram_gpu_reg>; + regulator-coupled-max-spread =3D <100000>; +}; + +&mt6358_vsram_gpu_reg { + regulator-coupled-with =3D <&mt6358_vgpu_reg>; + regulator-coupled-max-spread =3D <100000>; +}; + &pio { i2c_pins_0: i2c0{ pins_i2c{ --=20 2.39.2 From nobody Sat Sep 21 03:14:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 07C38C64ED6 for ; Wed, 1 Mar 2023 09:55:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229894AbjCAJzx (ORCPT ); Wed, 1 Mar 2023 04:55:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40742 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229881AbjCAJzg (ORCPT ); Wed, 1 Mar 2023 04:55:36 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A57722A6DA; Wed, 1 Mar 2023 01:55:35 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id A601E660212B; Wed, 1 Mar 2023 09:55:32 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677664533; bh=7nrUbCRYVnwYMTUi2s51QYeV3DhvJQJoBM8PfyrS3Ok=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NiKrMvBDndF+/nbyd9BX/TRNSJ9R5YKqiJkhLQ9I7aJRrFLJukVqSCAF4jmwSzz50 o4UKRFGE2FP3hW9jL8i0lpGBGTa7NOqY8D4us1fnSglIJ3GRltz+u+d97wLsowuQfP XC+AYNziGRftlUVAzlrnNzYVzajkdIOg6lPs8aAnhHIR1DRfHKkaYFi+/tEvfXfDlm J8przl+LtTktHzp1ZNnexLdb1vhi9Q0T2ReOC6WYQrxl9bNhmyOmssatGfv6s3MwwL +8b+v/t7r17jBxOvigvZAQZkbM2CrNBWQcD/FxYgRTjuqMpI/z6rT+PkilyBo77uh6 H5A/6gIUtbJVw== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v4 06/19] arm64: dts: mediatek: mt8183: Use mediatek,mt8183b-mali as GPU compatible Date: Wed, 1 Mar 2023 10:55:10 +0100 Message-Id: <20230301095523.428461-7-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> References: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Use the new GPU related compatible to finally enable GPU DVFS on the MT8183 SoC. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts= /mediatek/mt8183.dtsi index e01b96adef02..5169779d01df 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -1752,7 +1752,7 @@ mfgcfg: syscon@13000000 { }; =20 gpu: gpu@13040000 { - compatible =3D "mediatek,mt8183-mali", "arm,mali-bifrost"; + compatible =3D "mediatek,mt8183b-mali", "arm,mali-bifrost"; reg =3D <0 0x13040000 0 0x4000>; interrupts =3D , --=20 2.39.2 From nobody Sat Sep 21 03:14:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C3A0CC7EE31 for ; Wed, 1 Mar 2023 09:56:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229911AbjCAJz7 (ORCPT ); Wed, 1 Mar 2023 04:55:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40742 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229887AbjCAJzi (ORCPT ); Wed, 1 Mar 2023 04:55:38 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E602B23C60; Wed, 1 Mar 2023 01:55:36 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 5AE7A6602136; Wed, 1 Mar 2023 09:55:33 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677664533; bh=WS/5GDWx9zfOrHB3JiHOO+tDSOb8JiL3fs15woWgU4M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QylmoMJ1GQotalrfRakBbOuQdDCgme16Wj0YeUN7rCOpBwlAE/GkXCy6rhJ95vxxJ K9Y+A2HujYoMjArvR2Y9f87xlbyEFKDHprhYMdgUuGcRZPUi3cHyHq2pdBXnJGkVOD Bp9rPdvtxaHj5WHlUkVQNGyOfBq/sbVDBpTkflqErAO6Qq9AO80+fnBH7JlVH3OLs5 49xU0pI90eVAWOT10lOQxM4H24YaPYwQdjP8LSy1B5B46nGoXqa+zx2OoXugewsJWz eW20diFbmoyh/+T4pQbQGA7Cr8U1up2M5w3G/OxbxUQm/cYkngQFBGoYwALVJkRXLx +Xf3JklBNNoHA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org, Alyssa Rosenzweig , =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= Subject: [PATCH v4 07/19] arm64: dts: mediatek: mt8192: Add GPU nodes Date: Wed, 1 Mar 2023 10:55:11 +0100 Message-Id: <20230301095523.428461-8-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> References: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Alyssa Rosenzweig The MediaTek MT8192 includes a Mali-G57 GPU supported in Panfrost. Add the GPU node to the device tree to enable 3D acceleration. The GPU node is disabled by default. It should be enabled by board with its power supplies correctly assigned. Signed-off-by: Alyssa Rosenzweig [nfraprado: removed sram supply, tweaked opp node name, adjusted commit mes= sage] Signed-off-by: N=C3=ADcolas F. R. A. Prado [wenst@: disable GPU by default; adjusted prefix; split out board change] Signed-off-by: Chen-Yu Tsai [Angelo: cosmetic fixes] Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 107 +++++++++++++++++++++++ 1 file changed, 107 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts= /mediatek/mt8192.dtsi index 87b91c8feaf9..34631adc52c6 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -312,6 +312,91 @@ timer: timer { clock-frequency =3D <13000000>; }; =20 + gpu_opp_table: opp-table-0 { + compatible =3D "operating-points-v2"; + opp-shared; + + opp-358000000 { + opp-hz =3D /bits/ 64 <358000000>; + opp-microvolt =3D <606250>; + }; + + opp-399000000 { + opp-hz =3D /bits/ 64 <399000000>; + opp-microvolt =3D <618750>; + }; + + opp-440000000 { + opp-hz =3D /bits/ 64 <440000000>; + opp-microvolt =3D <631250>; + }; + + opp-482000000 { + opp-hz =3D /bits/ 64 <482000000>; + opp-microvolt =3D <643750>; + }; + + opp-523000000 { + opp-hz =3D /bits/ 64 <523000000>; + opp-microvolt =3D <656250>; + }; + + opp-564000000 { + opp-hz =3D /bits/ 64 <564000000>; + opp-microvolt =3D <668750>; + }; + + opp-605000000 { + opp-hz =3D /bits/ 64 <605000000>; + opp-microvolt =3D <681250>; + }; + + opp-647000000 { + opp-hz =3D /bits/ 64 <647000000>; + opp-microvolt =3D <693750>; + }; + + opp-688000000 { + opp-hz =3D /bits/ 64 <688000000>; + opp-microvolt =3D <706250>; + }; + + opp-724000000 { + opp-hz =3D /bits/ 64 <724000000>; + opp-microvolt =3D <725000>; + }; + + opp-748000000 { + opp-hz =3D /bits/ 64 <748000000>; + opp-microvolt =3D <737500>; + }; + + opp-772000000 { + opp-hz =3D /bits/ 64 <772000000>; + opp-microvolt =3D <750000>; + }; + + opp-795000000 { + opp-hz =3D /bits/ 64 <795000000>; + opp-microvolt =3D <762500>; + }; + + opp-819000000 { + opp-hz =3D /bits/ 64 <819000000>; + opp-microvolt =3D <775000>; + }; + + opp-843000000 { + opp-hz =3D /bits/ 64 <843000000>; + opp-microvolt =3D <787500>; + }; + + opp-866000000 { + opp-hz =3D /bits/ 64 <866000000>; + opp-microvolt =3D <800000>; + }; + }; + soc { #address-cells =3D <2>; #size-cells =3D <2>; @@ -1266,6 +1351,28 @@ mmc1: mmc@11f70000 { status =3D "disabled"; }; =20 + gpu: gpu@13000000 { + compatible =3D "mediatek,mt8192-mali", "arm,mali-valhall-jm"; + reg =3D <0 0x13000000 0 0x4000>; + interrupts =3D , + , + ; + interrupt-names =3D "job", "mmu", "gpu"; + + clocks =3D <&apmixedsys CLK_APMIXED_MFGPLL>; + + power-domains =3D <&spm MT8192_POWER_DOMAIN_MFG2>, + <&spm MT8192_POWER_DOMAIN_MFG3>, + <&spm MT8192_POWER_DOMAIN_MFG4>, + <&spm MT8192_POWER_DOMAIN_MFG5>, + <&spm MT8192_POWER_DOMAIN_MFG6>; + power-domain-names =3D "core0", "core1", "core2", "core3", "core4"; + + operating-points-v2 =3D <&gpu_opp_table>; + + status =3D "disabled"; + }; + mfgcfg: clock-controller@13fbf000 { compatible =3D "mediatek,mt8192-mfgcfg"; reg =3D <0 0x13fbf000 0 0x1000>; --=20 2.39.2 From nobody Sat Sep 21 03:14:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8C847C7EE31 for ; Wed, 1 Mar 2023 09:55:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229953AbjCAJzz (ORCPT ); Wed, 1 Mar 2023 04:55:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40782 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229871AbjCAJzi (ORCPT ); Wed, 1 Mar 2023 04:55:38 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E6236366AD; Wed, 1 Mar 2023 01:55:36 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 1FCE36602124; Wed, 1 Mar 2023 09:55:34 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677664534; bh=2d8a1s6Yhde89pXYtEnq08v+ES25mvl579PIaEXQyEw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dV1Y8hUMxFxnT8si4HLY2rJ3SBPrJOLXxbctFDlQHKUnmFzEFPmkKbp7jAiwUK8+P syje2iCgft1dTVDo2IoWm7MeaB8+NBw2FKNzO+RyD2rBL2+5h4BOm50Hom67nAwa87 JiB5kCdpxCBpihHOT28dFjoYfebX5qSxw+j3sZ+z9M1Ef+h0LPF6oGGAVWW05THuPD gzGSp9hwuWBr5BOtsa/SATn2K6q58g/b/DRTu+aDetAab6soHlpjYcR8pygCKIKtEF Ifahfo7cy7/Ca1U9tmkULSlTSFqugDzdHECHaepiszG1ItUZtazmlkjVTbsbZlcB68 o4990U0jX0nxQ== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v4 08/19] arm64: dts: mediatek: mt8192: Add mfg_ref_sel clock to MFG0 domain Date: Wed, 1 Mar 2023 10:55:12 +0100 Message-Id: <20230301095523.428461-9-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> References: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The mfg_ref_sel clock is a mux used to switch between different "safe" (and slower) clock sources for the GPU: this is used during MFGPLL reconfiguration and eventually during idling at very low frequencies. This clock getting turned off means that the GPU will occasionally be unclocked, producing obvious consequences such as system crash or unpredictable behavior: assigning it to the top level MFG power domain will make sure that this stays on at all times during any operation on the MFG domain (only GPU-related transactions). Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts= /mediatek/mt8192.dtsi index 34631adc52c6..a29cdff8a095 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -499,8 +499,9 @@ power-domain@MT8192_POWER_DOMAIN_CONN { =20 power-domain@MT8192_POWER_DOMAIN_MFG0 { reg =3D ; - clocks =3D <&topckgen CLK_TOP_MFG_PLL_SEL>; - clock-names =3D "mfg"; + clocks =3D <&topckgen CLK_TOP_MFG_PLL_SEL>, + <&topckgen CLK_TOP_MFG_REF_SEL>; + clock-names =3D "mfg", "alt"; #address-cells =3D <1>; #size-cells =3D <0>; #power-domain-cells =3D <1>; --=20 2.39.2 From nobody Sat Sep 21 03:14:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C80EEC7EE30 for ; Wed, 1 Mar 2023 09:56:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229691AbjCAJ4D (ORCPT ); Wed, 1 Mar 2023 04:56:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40780 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229888AbjCAJzi (ORCPT ); Wed, 1 Mar 2023 04:55:38 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 106EF1A95E; Wed, 1 Mar 2023 01:55:37 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id C16D566020E0; Wed, 1 Mar 2023 09:55:34 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677664535; bh=/37a11W4Djj29RkQI1F06mX5BvaAyxmllH1tjzesJsU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=T7hJnrRxggsAGfxiujww0LUFHX5pGFVS4hmjQnSH/tVaz8Qh7qZ7s95kwI+W9q+z0 4rfqlSt9wJVMmkfjW6hap4fdiNZifTi7JnE1FQ+eSSJ8xfnSJciqOR/athpali235A vWd3XzYyWCmPXV9aT9RvGZp0pKVIvkX5ENsaoMXu8HWfxaL1fOVvIANheRLL/ceHBw Qi8b3ndnG3iWTrR/m3T6492/ACaed+E1dao1dRucN44ec6YUkCVJ+OeUMzSiBUrPul Y47EzxMxoS44gkONhhb4Pc7iX0DtHX0DPsvgRFWwUkeTp4+etuApG+/mo72qdz2dau aWTGfa/hz5Q6w== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= Subject: [PATCH v4 09/19] arm64: dts: mediatek: mt8192-asurada: Add MFG0 domain supply Date: Wed, 1 Mar 2023 10:55:13 +0100 Message-Id: <20230301095523.428461-10-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> References: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: N=C3=ADcolas F. R. A. Prado The mfg0 power domain encompasses the whole GPU and its surrounding glue logic. This power domain has a separate power rail. Add its power supply for Asurada. Signed-off-by: N=C3=ADcolas F. R. A. Prado [wenst@chromium.org: fix subject prefix and add commit message] Signed-off-by: Chen-Yu Tsai [Angelo: Reordered commits to address DVFS stability issues] Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 4 ++++ arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index 9f12257ab4e7..ec013d5ef157 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -380,6 +380,10 @@ &i2c7 { pinctrl-0 =3D <&i2c7_pins>; }; =20 +&mfg0 { + domain-supply =3D <&mt6315_7_vbuck1>; +}; + &mipi_tx0 { status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts= /mediatek/mt8192.dtsi index a29cdff8a095..f19d4a8ef3f6 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -497,7 +497,7 @@ power-domain@MT8192_POWER_DOMAIN_CONN { #power-domain-cells =3D <0>; }; =20 - power-domain@MT8192_POWER_DOMAIN_MFG0 { + mfg0: power-domain@MT8192_POWER_DOMAIN_MFG0 { reg =3D ; clocks =3D <&topckgen CLK_TOP_MFG_PLL_SEL>, <&topckgen CLK_TOP_MFG_REF_SEL>; --=20 2.39.2 From nobody Sat Sep 21 03:14:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3361BC64ED6 for ; Wed, 1 Mar 2023 09:56:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229445AbjCAJ4I (ORCPT ); Wed, 1 Mar 2023 04:56:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40664 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229886AbjCAJzi (ORCPT ); Wed, 1 Mar 2023 04:55:38 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2B57639282; Wed, 1 Mar 2023 01:55:37 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 749FC660215E; Wed, 1 Mar 2023 09:55:35 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677664536; bh=0DuJlRJGD/KVpO4odInSp/0rxcgpiRzq3+IVJVwVWMM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fUbcSnVjCJxEVrVxWBNmxnBroshnW8J2ORkb+F9GydxBhcQArvdKrC24g2HEcTUFC nf1a0DDT1H0YjVtopdoOKxMGJ3kiaDJiXq7HGdgbwNFNb5QKuvZRkzxxvw0N0Ef2/g P8YSAguXZhC20U4jyq9D8u2xpzdgzkC1z8dLs1UBGtGdoWYKA1+umIhB9Ev8zAJVnD a9ncB1Q1CdwLVC/fYW9EWYJx6dkEAC9SEgmOndy/qF/IDKZrujQhKojV8UdHq5cXh8 B2TwDHmUp9PHjN9IuE2SpTbbsiiBSU944NhkiAu71rrKTFJd8JNzPMVCF2xnkIejHN ao0uKHXTNagbA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v4 10/19] arm64: dts: mediatek: mt8192-asurada: Assign sram supply to MFG1 pd Date: Wed, 1 Mar 2023 10:55:14 +0100 Message-Id: <20230301095523.428461-11-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> References: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add a phandle to the MT8192_POWER_DOMAIN_MFG1 power domain and assign the GPU VSRAM supply to this in mt8192-asurada: this allows to keep the sram powered up while the GPU is used. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 4 ++++ arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index ec013d5ef157..df477eb89f21 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -384,6 +384,10 @@ &mfg0 { domain-supply =3D <&mt6315_7_vbuck1>; }; =20 +&mfg1 { + domain-supply =3D <&mt6359_vsram_others_ldo_reg>; +}; + &mipi_tx0 { status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts= /mediatek/mt8192.dtsi index f19d4a8ef3f6..5c30caf74026 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -506,7 +506,7 @@ mfg0: power-domain@MT8192_POWER_DOMAIN_MFG0 { #size-cells =3D <0>; #power-domain-cells =3D <1>; =20 - power-domain@MT8192_POWER_DOMAIN_MFG1 { + mfg1: power-domain@MT8192_POWER_DOMAIN_MFG1 { reg =3D ; mediatek,infracfg =3D <&infracfg>; #address-cells =3D <1>; --=20 2.39.2 From nobody Sat Sep 21 03:14:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD4F8C64ED6 for ; Wed, 1 Mar 2023 09:56:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229796AbjCAJ4N (ORCPT ); Wed, 1 Mar 2023 04:56:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40746 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229885AbjCAJzj (ORCPT ); Wed, 1 Mar 2023 04:55:39 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D6BBC392AA; Wed, 1 Mar 2023 01:55:37 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 297D266020E6; Wed, 1 Mar 2023 09:55:36 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677664536; bh=8ABzLk/e2rpCHLt16uUykksCJa8zFaozhbox7sQgQPA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jDpdAPcLUUkMKSd2i4Ita4lKN0g2OI5VS3BvB09Q+chWNGVMOPpOideIk7LMs2dOh t9S0/fbLiYZlvn/1nWgCxRtObYrN7joVanRPx3d3XfYQIIVldT1WR03TvG+rRQR4ov ORAyPsPsrNJ98qutjZrriNituD7SbYQ+wOFnFC/AVwuob4qxVfZu1UT2BmekH03S2i MUsUIMOi163XelGIj5nurZcdFZlyaS1KcTnuYtvl2RUyJhMvS7lzU7uG8O0lb4bSMn PNccE7tZhfPwTjE2wwlCkJrsMtU/CdzkUa4bDG8FOW5aolTbqOoqpsU80/mivtyeKD N9dmdIDoDnikA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v4 11/19] arm64: dts: mediatek: mt8192-asurada: Fix voltage constraint for Vgpu Date: Wed, 1 Mar 2023 10:55:15 +0100 Message-Id: <20230301095523.428461-12-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> References: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The MT8192 SoC specifies a maximum voltage for the GPU's digital supply of 0.88V and the GPU OPPs are declaring a maximum voltage of 0.80V. In order to keep the GPU voltage in the safe range, change the maximum voltage for mt6315@7's vbuck1 to 0.80V as sending, for any mistake, 1.193V would be catastrophic. Fixes: 3183cb62b033 ("arm64: dts: mediatek: asurada: Add SPMI regulators") Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-yu Tsai Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index df477eb89f21..8570b78c04a4 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -1408,7 +1408,7 @@ mt6315_7_vbuck1: vbuck1 { regulator-compatible =3D "vbuck1"; regulator-name =3D "Vgpu"; regulator-min-microvolt =3D <606250>; - regulator-max-microvolt =3D <1193750>; + regulator-max-microvolt =3D <800000>; regulator-enable-ramp-delay =3D <256>; regulator-allowed-modes =3D <0 1 2>; }; --=20 2.39.2 From nobody Sat Sep 21 03:14:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 700E1C64ED6 for ; Wed, 1 Mar 2023 09:56:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229958AbjCAJ4T (ORCPT ); Wed, 1 Mar 2023 04:56:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40972 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229896AbjCAJzj (ORCPT ); Wed, 1 Mar 2023 04:55:39 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9ADCC34F62; Wed, 1 Mar 2023 01:55:38 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id D050D660211B; Wed, 1 Mar 2023 09:55:36 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677664537; bh=co4SeDmQzj4uU8aYQJsjemsonD8P7POUOi2D/TyJicQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LNy8CnbOZxIoaSG9lOwDELZPZvwSOFF6ZoXE3St0Hjhbs1dq9GP2Vr9Ux4rfjgDDA c98a5Ml4ioX3aLdmuVF37c/VCxRt+/7GDBFM/Dj21pdh6dxvtdl+kKPCbKpCuLg1R8 3FQO3RGxwc3Zffx7q+wNLT8y7ajTGd6hHOXWGxCmDd2sYyxjkJ9GiNlt8jgdnJpbXM 2MDpGwx2YrkdLz6w8ibZ1vkQ2Ttg4Nv5B+h0PkTIbdaMXMSLdNwhcrB1niGm5IRuo4 5IbCQ8+tDH8EusEPQclRv9ytqM1Wt98Rnf/H0jlDjomO7qpGUyU3NQCGFYD7G+6Mzy zBPcCtltPv/SA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v4 12/19] arm64: dts: mediatek: mt8192-asurada: Couple VGPU and VSRAM_OTHER regulators Date: Wed, 1 Mar 2023 10:55:16 +0100 Message-Id: <20230301095523.428461-13-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> References: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add coupling for these regulators, as VSRAM_OTHER is used to power the GPU SRAM, and they have a strict voltage output relation to satisfy in order to ensure GPU stable operation. While at it, also add voltage constraint overrides for the GPU SRAM regulator "mt6359_vsram_others" so that we stay in a safe range of 0.75-0.80V. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index 8570b78c04a4..f858eca219d7 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -447,6 +447,13 @@ &mt6359_vrf12_ldo_reg { regulator-always-on; }; =20 +&mt6359_vsram_others_ldo_reg { + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <800000>; + regulator-coupled-with =3D <&mt6315_7_vbuck1>; + regulator-coupled-max-spread =3D <10000>; +}; + &mt6359_vufs_ldo_reg { regulator-always-on; }; @@ -1411,6 +1418,8 @@ mt6315_7_vbuck1: vbuck1 { regulator-max-microvolt =3D <800000>; regulator-enable-ramp-delay =3D <256>; regulator-allowed-modes =3D <0 1 2>; + regulator-coupled-with =3D <&mt6359_vsram_others_ldo_reg>; + regulator-coupled-max-spread =3D <10000>; }; }; }; --=20 2.39.2 From nobody Sat Sep 21 03:14:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6EA26C64EC7 for ; Wed, 1 Mar 2023 09:56:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230013AbjCAJ4W (ORCPT ); Wed, 1 Mar 2023 04:56:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40986 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229900AbjCAJzj (ORCPT ); Wed, 1 Mar 2023 04:55:39 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 33A443B3F4; Wed, 1 Mar 2023 01:55:39 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 833FC6602126; Wed, 1 Mar 2023 09:55:37 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677664538; bh=mY4hfSUTwSHqh4eiis9sq5UHYdSJwKcNza4C9t+I8c4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZtO9PRfSN0kIoXXl1gTXx2bnYG9+nSCiHkjmLShKx0sMNLpLhig0ayN/SGKNI9Hl0 v2HUBw6vvyOtyazIXL27MqkHiv+sTGOqEZHxaRJDQhYbB0P0fLF8+/e/MKzC7rQrvD CGegsyzWXJkl7P8sv8jyGrq9AU/rVPEYCK+4dUl0JMJl5NSfD4fF7pe29jIjeGC08W Dw3+bEDs5bUP6aGfMLAnGoPVId6DcHiq2NA5onKi6gVceuQg/qiZj9YdD8Awew+kR/ rkEeXj/+6tuf94gqPgsfQkc342hP/IVId6Ew6pFeeEG9vuBNQQJ8LwlEaUdDS5ghy7 UThANP0zQ08Bw== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org, Alyssa Rosenzweig Subject: [PATCH v4 13/19] arm64: dts: mediatek: mt8192-asurada: Enable GPU Date: Wed, 1 Mar 2023 10:55:17 +0100 Message-Id: <20230301095523.428461-14-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> References: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Alyssa Rosenzweig Enable the GPU with its power supplies described. Signed-off-by: Alyssa Rosenzweig [wenst@: patch split out from MT8192 GPU node patch] Signed-off-by: Chen-Yu Tsai [Angelo: Minor commit title fix] Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index f858eca219d7..5a440504d4f9 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -275,6 +275,11 @@ &dsi_out { remote-endpoint =3D <&anx7625_in>; }; =20 +&gpu { + mali-supply =3D <&mt6315_7_vbuck1>; + status =3D "okay"; +}; + &i2c0 { status =3D "okay"; =20 --=20 2.39.2 From nobody Sat Sep 21 03:14:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 24447C7EE31 for ; Wed, 1 Mar 2023 09:56:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229960AbjCAJ4Y (ORCPT ); Wed, 1 Mar 2023 04:56:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41306 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229916AbjCAJzp (ORCPT ); Wed, 1 Mar 2023 04:55:45 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EA26337548; Wed, 1 Mar 2023 01:55:39 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 407B666020E0; Wed, 1 Mar 2023 09:55:38 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677664538; bh=KQl+1992t3fzHAo6w7W+uAYOQeZPx/82oAPGoJNpTLE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=csQbvl89FdpuAsidyeMxB6D5ASTOUwPVgoH5Ldnh9fdZZWivCdS2G7KYUswrxJIFV wlAFmBDrciA0DNmpSPQvoxOzg4ZmLz9OX9X3VtLEz5WV1hhfvwpd+WzeYxjm2KVlfq hS4uiwlRKR3Brzj6zUG//2QeXeFiyqTES4H5FZsz31g99FKXGkPK29LS1Hdhw84Bnk YFSmzIp+lzcbLC1dsmzbz8VpIfNd0ZypdPGyhthbuRE7r9TXmiLjEccDqZT0VGDIYU ZaUTYZgqGsmzhNmqQe8JU8wW0ZfGZZB0XXneg2oqrYRgZn7tBUN/ROgSbCrgTR/yxY dZuxGhlvH1HkA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v4 14/19] arm64: dts: mediatek: mt8195: Add mfg_core_tmp clock to MFG1 domain Date: Wed, 1 Mar 2023 10:55:18 +0100 Message-Id: <20230301095523.428461-15-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> References: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Similarly to what can be seen in MT8192, on MT8195 the mfg_core_tmp clock is a mux used to switch between different "safe" (and slower) clock sources for the GPU: this is used during MFGPLL reconfiguration and eventually during idling at very low frequencies. This clock getting turned off means that the GPU will occasionally be unclocked, producing obvious consequences such as system crash or unpredictable behavior: assigning it to the top level MFG power domain will make sure that this stays on at all times during any operation on the MFG domain (only GPU-related transactions). Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts= /mediatek/mt8195.dtsi index 8f1264d5290b..d116830d6af3 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -446,8 +446,9 @@ mfg0: power-domain@MT8195_POWER_DOMAIN_MFG0 { =20 power-domain@MT8195_POWER_DOMAIN_MFG1 { reg =3D ; - clocks =3D <&apmixedsys CLK_APMIXED_MFGPLL>; - clock-names =3D "mfg"; + clocks =3D <&apmixedsys CLK_APMIXED_MFGPLL>, + <&topckgen CLK_TOP_MFG_CORE_TMP>; + clock-names =3D "mfg", "alt"; mediatek,infracfg =3D <&infracfg_ao>; #address-cells =3D <1>; #size-cells =3D <0>; --=20 2.39.2 From nobody Sat Sep 21 03:14:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD7E1C64EC7 for ; Wed, 1 Mar 2023 09:56:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230031AbjCAJ41 (ORCPT ); Wed, 1 Mar 2023 04:56:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41362 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229920AbjCAJzq (ORCPT ); Wed, 1 Mar 2023 04:55:46 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 371953B659; Wed, 1 Mar 2023 01:55:41 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id E572C6602123; Wed, 1 Mar 2023 09:55:38 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677664539; bh=smKRDmDdu68lnpbPgqG4z/RTkzBSVrXMEAsrpvTEOiY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gID9mgNdEM8lIoCqtjh1fLYHHiIebSoOFt1AYUFgrvvtr27rHTIM6Q13H42Rq7Q1q 2D3XkgV8TC3CTYEQer9Wu8zUeuSU7NlgDAhgIniKqa+8Ee9pU2GTt4jbjc7YtTVCSK H1AHjbkwDQn2N3+TUoYFk5SAqLHnhSqwX4/1OJuZ3/tjJZb7SRbl+DpTHzwcnBZ29u oEB9rKwxpZLpjQ4fRGjGhJhEc9Y6e9oAxro1xv26mpimd/P+2noAIsq69H//cVPKIm TyyKMnB44IL0qhsVlFWEfpSA7hQJnC/un7eTVFz7OqhGbbyqK1+uYkb1IkDUtEuQk/ TGw/bgmJ4H9lA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v4 15/19] arm64: dts: mt8195: Add panfrost node for Mali-G57 Valhall Natt GPU Date: Wed, 1 Mar 2023 10:55:19 +0100 Message-Id: <20230301095523.428461-16-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> References: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add GPU support through panfrost for the Mali-G57 GPU on MT8195 with its OPP table but keep it in disabled state. This is expected to be enabled only on boards which make use of the GPU. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 90 ++++++++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts= /mediatek/mt8195.dtsi index d116830d6af3..0e4ee7713c30 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -333,6 +333,76 @@ performance: performance-controller@11bc10 { #performance-domain-cells =3D <1>; }; =20 + gpu_opp_table: opp-table-gpu { + compatible =3D "operating-points-v2"; + opp-shared; + + opp-390000000 { + opp-hz =3D /bits/ 64 <390000000>; + opp-microvolt =3D <625000>; + }; + opp-410000000 { + opp-hz =3D /bits/ 64 <410000000>; + opp-microvolt =3D <631250>; + }; + opp-431000000 { + opp-hz =3D /bits/ 64 <431000000>; + opp-microvolt =3D <631250>; + }; + opp-473000000 { + opp-hz =3D /bits/ 64 <473000000>; + opp-microvolt =3D <637500>; + }; + opp-515000000 { + opp-hz =3D /bits/ 64 <515000000>; + opp-microvolt =3D <637500>; + }; + opp-556000000 { + opp-hz =3D /bits/ 64 <556000000>; + opp-microvolt =3D <643750>; + }; + opp-598000000 { + opp-hz =3D /bits/ 64 <598000000>; + opp-microvolt =3D <650000>; + }; + opp-640000000 { + opp-hz =3D /bits/ 64 <640000000>; + opp-microvolt =3D <650000>; + }; + opp-670000000 { + opp-hz =3D /bits/ 64 <670000000>; + opp-microvolt =3D <662500>; + }; + opp-700000000 { + opp-hz =3D /bits/ 64 <700000000>; + opp-microvolt =3D <675000>; + }; + opp-730000000 { + opp-hz =3D /bits/ 64 <730000000>; + opp-microvolt =3D <687500>; + }; + opp-760000000 { + opp-hz =3D /bits/ 64 <760000000>; + opp-microvolt =3D <700000>; + }; + opp-790000000 { + opp-hz =3D /bits/ 64 <790000000>; + opp-microvolt =3D <712500>; + }; + opp-820000000 { + opp-hz =3D /bits/ 64 <820000000>; + opp-microvolt =3D <725000>; + }; + opp-850000000 { + opp-hz =3D /bits/ 64 <850000000>; + opp-microvolt =3D <737500>; + }; + opp-880000000 { + opp-hz =3D /bits/ 64 <880000000>; + opp-microvolt =3D <750000>; + }; + }; + pmu-a55 { compatible =3D "arm,cortex-a55-pmu"; interrupt-parent =3D <&gic>; @@ -1790,6 +1860,26 @@ ufsphy: ufs-phy@11fa0000 { status =3D "disabled"; }; =20 + gpu: gpu@13000000 { + compatible =3D "mediatek,mt8195-mali", "mediatek,mt8192-mali", + "arm,mali-valhall-jm"; + reg =3D <0 0x13000000 0 0x4000>; + + clocks =3D <&mfgcfg CLK_MFG_BG3D>; + interrupts =3D , + , + ; + interrupt-names =3D "job", "mmu", "gpu"; + operating-points-v2 =3D <&gpu_opp_table>; + power-domains =3D <&spm MT8195_POWER_DOMAIN_MFG2>, + <&spm MT8195_POWER_DOMAIN_MFG3>, + <&spm MT8195_POWER_DOMAIN_MFG4>, + <&spm MT8195_POWER_DOMAIN_MFG5>, + <&spm MT8195_POWER_DOMAIN_MFG6>; + power-domain-names =3D "core0", "core1", "core2", "core3", "core4"; + status =3D "disabled"; + }; + mfgcfg: clock-controller@13fbf000 { compatible =3D "mediatek,mt8195-mfgcfg"; reg =3D <0 0x13fbf000 0 0x1000>; --=20 2.39.2 From nobody Sat Sep 21 03:14:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B49EEC64EC7 for ; Wed, 1 Mar 2023 09:56:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230037AbjCAJ4a (ORCPT ); Wed, 1 Mar 2023 04:56:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40664 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229879AbjCAJzv (ORCPT ); Wed, 1 Mar 2023 04:55:51 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5636A3B65B; Wed, 1 Mar 2023 01:55:41 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 9879F6602124; Wed, 1 Mar 2023 09:55:39 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677664540; bh=eoUuj+cxZRXF8or5zd6PgagsDUpoYC3djot0WKXw2CA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hhkBXk2E6FkkjzWFHfrQFY3szV5J3eYC7vihoX8QMtmYiJnBouEHytcgWIlQdh774 nS6GF8niejem4pwYCIwno8u55hl5sL17pA2rFL+6C1NU5TQAOaJ+PMSVPSts6GVego jQcb3SUaOknckuaAW+pYCoQIcsRRZEuQ9U/p7b9+cNkwPTPH09jpoPmfmSMzziuRFd xAaSRUyZ9Ji8z25/i+Gx+0B9NeY4FW0rhKzRhy3wUV583rDqmp+tC2W7XXsSd1Kpt8 RdyY/5NKnuckUtJgOxFBDnaxTlSl3pVBDV7BFdxAenTHm56YjX5kPIDLTjeiYV+owM 0MtB7C6puB40Q== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v4 16/19] arm64: dts: mediatek: mt8195-cherry: Enable Mali-G57 GPU Date: Wed, 1 Mar 2023 10:55:20 +0100 Message-Id: <20230301095523.428461-17-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> References: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Enable the Mali-G57 found on this platform with the open-source Panfrost driver. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi index 56749cfe7c33..24669093fbed 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -238,6 +238,11 @@ dptx_out: endpoint { }; }; =20 +&gpu { + status =3D "okay"; + mali-supply =3D <&mt6315_7_vbuck1>; +}; + &i2c0 { status =3D "okay"; =20 --=20 2.39.2 From nobody Sat Sep 21 03:14:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8F93C64ED6 for ; Wed, 1 Mar 2023 09:56:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230044AbjCAJ4c (ORCPT ); Wed, 1 Mar 2023 04:56:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40758 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229930AbjCAJzw (ORCPT ); Wed, 1 Mar 2023 04:55:52 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F0A4E3B667; Wed, 1 Mar 2023 01:55:41 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 5676866020E6; Wed, 1 Mar 2023 09:55:40 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677664540; bh=zNRcNap0DKbKus9H9hYNrxN03fzRsqShpCKFraZ9Guk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=n0mJRNYsI1EWGG60jwpP5XNylZ79iqYTvNxHVaQvBqOmgh4tyCnB9jzoigrQeL4/y YyWqIL5PD4EkiRFXi24I9wMkKwGspShqvOKzuHrjOIgEbokLHh2k8wPLFlJ1R8F+bR lw3b9RPQ7vp4d8cHepEKf2SQwtnPz0TK7uw392TUunQ7+iTozVM1tjeLWQzEkR28Bh gBhUM3PaBuZiSxGAlqNoRiVU0e5D0xdkwd6khL+MCS+jFfr1GYbYIbP2DcdeJ7rq0n 8S2+QsMb3D9Rn9HGmxhzlxxOpp0PV2ky7lXaEri7Xi99HCN2YUo7WkCVpe3Mi0NvF9 /n5QiMMTjOHCg== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v4 17/19] arm64: dts: mediatek: mt8186: Add GPU node Date: Wed, 1 Mar 2023 10:55:21 +0100 Message-Id: <20230301095523.428461-18-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> References: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add a GPU node for MT8186 SoC but keep it disabled. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8186.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts= /mediatek/mt8186.dtsi index a0d3e1f731bd..78ff8ba5718e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -1075,6 +1075,23 @@ mfgsys: clock-controller@13000000 { #clock-cells =3D <1>; }; =20 + gpu: gpu@13040000 { + compatible =3D "mediatek,mt8186-mali", + "arm,mali-bifrost"; + reg =3D <0 0x13040000 0 0x4000>; + + clocks =3D <&mfgsys CLK_MFG_BG3D>; + interrupts =3D , + , + ; + interrupt-names =3D "job", "mmu", "gpu"; + power-domains =3D <&spm MT8186_POWER_DOMAIN_MFG2>, + <&spm MT8186_POWER_DOMAIN_MFG3>; + power-domain-names =3D "core0", "core1"; + #cooling-cells =3D <2>; + status =3D "disabled"; + }; + mmsys: syscon@14000000 { compatible =3D "mediatek,mt8186-mmsys", "syscon"; reg =3D <0 0x14000000 0 0x1000>; --=20 2.39.2 From nobody Sat Sep 21 03:14:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5CB4CC64ED6 for ; Wed, 1 Mar 2023 09:56:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229976AbjCAJ4f (ORCPT ); Wed, 1 Mar 2023 04:56:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41936 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229938AbjCAJzy (ORCPT ); Wed, 1 Mar 2023 04:55:54 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A89793928E; Wed, 1 Mar 2023 01:55:42 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 0A57D6602126; Wed, 1 Mar 2023 09:55:40 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677664541; bh=PCEc0bjMqNKvK0LPA4cYUgfpO8q6NztoEiiPWzh7jAw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NiVE6nsAVdDP0ijo9ixkIlm+eqJxiTVQWljgzBTDIzaqUemLYuW/1v0W4KsPeFtRB kFTjaw9Am7usIJ6GjxDPTEtmHOVhPkCKzJhRXrkDb+qeSpy6D6S/vwSIy+rqTbY2z8 fh138dHOHtXCDHg21dHqd1k1SWpvsAbYlH86GNfL4NO63Q64qNeiw8jI8vB2v0Kxbx A9jEqWmbFLjs52ZhnHyu/1KxierwlrbgW7jVBiFoF022tcO+RN5QKysOeVzFApWwNg n/D06rJYmx+aF9W19Wk9ijLI2Es3uioiCbRUsgLNWIcFrroqVF14jHBuwRqk7f5mLL WQQBcmRaf9htw== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v4 18/19] arm64: dts: mediatek: mt8183-pumpkin: Override vgpu/vsram_gpu constraints Date: Wed, 1 Mar 2023 10:55:22 +0100 Message-Id: <20230301095523.428461-19-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> References: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Override the PMIC-default voltage constraints for VGPU and VSRAM_GPU with the platform specific vmin/vmax for the highest possible SoC binning. Signed-off-by: AngeloGioacchino Del Regno Suggested-by: Chen-Yu Tsai Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts b/arch/arm64/b= oot/dts/mediatek/mt8183-pumpkin.dts index c228f04d086b..526bcae7a3f8 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts +++ b/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts @@ -176,11 +176,17 @@ &mmc1 { }; =20 &mt6358_vgpu_reg { + regulator-min-microvolt =3D <625000>; + regulator-max-microvolt =3D <900000>; + regulator-coupled-with =3D <&mt6358_vsram_gpu_reg>; regulator-coupled-max-spread =3D <100000>; }; =20 &mt6358_vsram_gpu_reg { + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <1000000>; + regulator-coupled-with =3D <&mt6358_vgpu_reg>; regulator-coupled-max-spread =3D <100000>; }; --=20 2.39.2 From nobody Sat Sep 21 03:14:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3107CC7EE31 for ; Wed, 1 Mar 2023 09:56:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230073AbjCAJ4h (ORCPT ); Wed, 1 Mar 2023 04:56:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41128 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229963AbjCAJz5 (ORCPT ); Wed, 1 Mar 2023 04:55:57 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 716AF3B643; Wed, 1 Mar 2023 01:55:43 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id AEC4F66020E0; Wed, 1 Mar 2023 09:55:41 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677664542; bh=MxY4ueOZBhNlSB3Ww60xM9JsVfchLfbcAG6Y8p1jhmk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Vtqp1STq6IcNA22VmWpCX/xSfdrywj3W2JI2rwI+V3/0IxHQyu/+nOTYd/KSW+v8B Sa8pOsOmmfWXo8TmrnKpjL+Zq3WM5VwZxJsCJRRn21jAXO+CuOquYanePxaxt9DWyK whrAtX2aGdD2AZgj09COHUV4s1qRyDTPmjvk44ptZ68MF0H+Jw9/Cfh+oMbJSpu6bQ 1lAtpgahRbrBf9ApF7R2Idt/DMd0QVFszv9WSvPt5cVaMR5k1mfjrxD18qzDPJyWoO GlqNC6AqgviRbX5lTl2mYm8frUmjezgg0c9NsEpAGKUCk9MLsi4mOCM6MbaWqsNLjh 1RCthkU9h7Jig== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v4 19/19] arm64: dts: mediatek: mt8183-evb: Override vgpu/vsram_gpu constraints Date: Wed, 1 Mar 2023 10:55:23 +0100 Message-Id: <20230301095523.428461-20-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> References: <20230301095523.428461-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Override the PMIC-default voltage constraints for VGPU and VSRAM_GPU with the platform specific vmin/vmax for the highest possible SoC binning. Signed-off-by: AngeloGioacchino Del Regno Suggested-by: Chen-Yu Tsai Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/= dts/mediatek/mt8183-evb.dts index fd327437e932..3e3f4b1b00f0 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts @@ -138,11 +138,17 @@ &mmc1 { }; =20 &mt6358_vgpu_reg { + regulator-min-microvolt =3D <625000>; + regulator-max-microvolt =3D <900000>; + regulator-coupled-with =3D <&mt6358_vsram_gpu_reg>; regulator-coupled-max-spread =3D <100000>; }; =20 &mt6358_vsram_gpu_reg { + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <1000000>; + regulator-coupled-with =3D <&mt6358_vgpu_reg>; regulator-coupled-max-spread =3D <100000>; }; --=20 2.39.2