From nobody Sat Sep 21 02:33:15 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69BAEC64ED6 for ; Tue, 28 Feb 2023 10:47:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230422AbjB1Kr4 (ORCPT ); Tue, 28 Feb 2023 05:47:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230123AbjB1Krx (ORCPT ); Tue, 28 Feb 2023 05:47:53 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5BC8F19B5; Tue, 28 Feb 2023 02:47:51 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 9E5BF6602FD6; Tue, 28 Feb 2023 10:47:49 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581270; bh=L6kGyfCrTlPJ9U3bVTbj8GIaJJMOf4x1aJLiGYToiq8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hru/Bhv6rkdi/pc5OZ/qgVOJYCvL/DkC6PZj7ceZTdEjgCyE6H6s7dHsRschIiVYX 4MYHmN7rFlYH6xZbfkp2sWqUNiU3YUqf0aoJ5r1U7saLJSs2iGQXNQlWuPr6GHxLY7 f7SUMmKncl5NMZVddOlcvGl94nl9Qd3z00SVIOIXOgItFeaRH8DZKWI7oYa9FtWM+X Y5+CNmrE2NwTMRfJsdJqpOfu0tsUJadp2ydRVl6hMymInhZxfCf1M/sqYhgiLmmWKM tL9Lj8gZ6EhBGEL3q6B/cv+a4JNQYPFqfDpPVpAJ++Jnk57knUCMbzhr1XRVrrfcEJ Sn9zOvy19vnbQ== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v3 01/18] arm64: dts: mediatek: mt8183-kukui: Couple VGPU and VSRAM_GPU regulators Date: Tue, 28 Feb 2023 11:47:24 +0100 Message-Id: <20230228104741.717819-2-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add coupling for these regulators, as they have a strict voltage output relation to satisfy in order to ensure GPU stable operation. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/bo= ot/dts/mediatek/mt8183-kukui.dtsi index fbe14b13051a..de9778c85b94 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi @@ -294,7 +294,6 @@ dsi_out: endpoint { =20 &gpu { mali-supply =3D <&mt6358_vgpu_reg>; - sram-supply =3D <&mt6358_vsram_gpu_reg>; }; =20 &i2c0 { @@ -401,6 +400,11 @@ &mt6358codec { Avdd-supply =3D <&mt6358_vaud28_reg>; }; =20 +&mt6358_vgpu_reg { + regulator-coupled-with =3D <&mt6358_vsram_gpu_reg>; + regulator-coupled-max-spread =3D <100000>; +}; + &mt6358_vsim1_reg { regulator-min-microvolt =3D <2700000>; regulator-max-microvolt =3D <2700000>; @@ -411,6 +415,11 @@ &mt6358_vsim2_reg { regulator-max-microvolt =3D <2700000>; }; =20 +&mt6358_vsram_gpu_reg { + regulator-coupled-with =3D <&mt6358_vgpu_reg>; + regulator-coupled-max-spread =3D <100000>; +}; + &pio { aud_pins_default: audiopins { pins_bus { --=20 2.39.2 From nobody Sat Sep 21 02:33:15 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3DCDC64EC7 for ; Tue, 28 Feb 2023 10:48:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230488AbjB1KsC (ORCPT ); Tue, 28 Feb 2023 05:48:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60872 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230151AbjB1Krx (ORCPT ); Tue, 28 Feb 2023 05:47:53 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E9FA81996; Tue, 28 Feb 2023 02:47:51 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 459E16602FD8; Tue, 28 Feb 2023 10:47:50 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581270; bh=hCOuhzILoJBXJQ8GwcXy/t+mRkm6ZJBcUpxH7FjYYQQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OYeliOY9+LesjMYhIx7f5QCcRs2qu3uoATLfmuW161HAHJsRBbA7dGR8kJMeyWlN7 VknOmJMi0yrWc0B/6RBmvyxo8qwWkdRABE9k28d+72bvdQBAUB0YQvAPvs7AeviDDp DZOqbEeffJY6yA8Bq5w+D8wMWQAKantkckWH84Fiitl8WN4BBh/kBWO0CdRaPvdu5+ FvipDMtYmV0DHmY8FNE3ZukS4sAFh4Kyrdp4c0VaKpSLjbcofQzH9wO6Lyy+5HSZgR TkypHtjO/yVP2CiD2LKq7oHH+qsTZuS9D+93y3jXXYfP7YqtgXL21IMdt1fcfbTzNy Cpbmyhm4b9+7A== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v3 02/18] arm64: dts: mediatek: mt8183-kukui: Override vgpu/vsram_gpu constraints Date: Tue, 28 Feb 2023 11:47:25 +0100 Message-Id: <20230228104741.717819-3-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Override the PMIC-default voltage constraints for VGPU and VSRAM_GPU with the platform specific vmin/vmax for the highest possible SoC binning. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/bo= ot/dts/mediatek/mt8183-kukui.dtsi index de9778c85b94..63952c1251df 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi @@ -401,6 +401,9 @@ &mt6358codec { }; =20 &mt6358_vgpu_reg { + regulator-min-microvolt =3D <625000>; + regulator-max-microvolt =3D <900000>; + regulator-coupled-with =3D <&mt6358_vsram_gpu_reg>; regulator-coupled-max-spread =3D <100000>; }; @@ -416,6 +419,9 @@ &mt6358_vsim2_reg { }; =20 &mt6358_vsram_gpu_reg { + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <1000000>; + regulator-coupled-with =3D <&mt6358_vgpu_reg>; regulator-coupled-max-spread =3D <100000>; }; --=20 2.39.2 From nobody Sat Sep 21 02:33:15 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC788C64ED6 for ; Tue, 28 Feb 2023 10:48:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229797AbjB1KsF (ORCPT ); Tue, 28 Feb 2023 05:48:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60874 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230220AbjB1Krx (ORCPT ); Tue, 28 Feb 2023 05:47:53 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C49F2108; Tue, 28 Feb 2023 02:47:52 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id E106E6602FDA; Tue, 28 Feb 2023 10:47:50 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581271; bh=lArSKCx17mh1O30bNJ4tPf+I/p5uXQpXGMq90jh0j/I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OWM8GNat2cxz2dHig+YugKoL+OwAddx+1YznjJbNxnFhTFXspLxH6Dy8FDq+jOA+K xtgtptCoLnOc3iLfGHxYuTQEBIbgLRsBCg0+QxL9KmQ8NPZq47vcKMNz8glpon+/bj dKalxWeJIqHFmg/dtfgl3NY1gYcxP4VpAgFZAwvgCykLjxSdelXoqZE0QpZdJZnbX/ YIPUJqXJYiCZLPPYoXgJO0/4mGr4CIURa8oX6q0Ar9ImBiy5AlMxFLsMe4RvVH1OiT 38mD8GR5LzccWvMr9szI6SNtknO51dwE5D/Qn1HmViPM9snCYMWgOxkY6NR2K9RSIm WwwWJotS+u4+Q== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v3 03/18] arm64: dts: mediatek: mt8183: Remove second opp-microvolt entries from gpu table Date: Tue, 28 Feb 2023 11:47:26 +0100 Message-Id: <20230228104741.717819-4-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This was done to keep a strict relation between VSRAM and VGPU, but it never worked: now we're doing it transparently with the new mediatek-regulator-coupler driver. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 32 ++++++++++++------------ 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts= /mediatek/mt8183.dtsi index 3d1d7870a5f1..e01b96adef02 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -563,82 +563,82 @@ gpu_opp_table: opp-table-0 { =20 opp-300000000 { opp-hz =3D /bits/ 64 <300000000>; - opp-microvolt =3D <625000>, <850000>; + opp-microvolt =3D <625000>; }; =20 opp-320000000 { opp-hz =3D /bits/ 64 <320000000>; - opp-microvolt =3D <631250>, <850000>; + opp-microvolt =3D <631250>; }; =20 opp-340000000 { opp-hz =3D /bits/ 64 <340000000>; - opp-microvolt =3D <637500>, <850000>; + opp-microvolt =3D <637500>; }; =20 opp-360000000 { opp-hz =3D /bits/ 64 <360000000>; - opp-microvolt =3D <643750>, <850000>; + opp-microvolt =3D <643750>; }; =20 opp-380000000 { opp-hz =3D /bits/ 64 <380000000>; - opp-microvolt =3D <650000>, <850000>; + opp-microvolt =3D <650000>; }; =20 opp-400000000 { opp-hz =3D /bits/ 64 <400000000>; - opp-microvolt =3D <656250>, <850000>; + opp-microvolt =3D <656250>; }; =20 opp-420000000 { opp-hz =3D /bits/ 64 <420000000>; - opp-microvolt =3D <662500>, <850000>; + opp-microvolt =3D <662500>; }; =20 opp-460000000 { opp-hz =3D /bits/ 64 <460000000>; - opp-microvolt =3D <675000>, <850000>; + opp-microvolt =3D <675000>; }; =20 opp-500000000 { opp-hz =3D /bits/ 64 <500000000>; - opp-microvolt =3D <687500>, <850000>; + opp-microvolt =3D <687500>; }; =20 opp-540000000 { opp-hz =3D /bits/ 64 <540000000>; - opp-microvolt =3D <700000>, <850000>; + opp-microvolt =3D <700000>; }; =20 opp-580000000 { opp-hz =3D /bits/ 64 <580000000>; - opp-microvolt =3D <712500>, <850000>; + opp-microvolt =3D <712500>; }; =20 opp-620000000 { opp-hz =3D /bits/ 64 <620000000>; - opp-microvolt =3D <725000>, <850000>; + opp-microvolt =3D <725000>; }; =20 opp-653000000 { opp-hz =3D /bits/ 64 <653000000>; - opp-microvolt =3D <743750>, <850000>; + opp-microvolt =3D <743750>; }; =20 opp-698000000 { opp-hz =3D /bits/ 64 <698000000>; - opp-microvolt =3D <768750>, <868750>; + opp-microvolt =3D <768750>; }; =20 opp-743000000 { opp-hz =3D /bits/ 64 <743000000>; - opp-microvolt =3D <793750>, <893750>; + opp-microvolt =3D <793750>; }; =20 opp-800000000 { opp-hz =3D /bits/ 64 <800000000>; - opp-microvolt =3D <825000>, <925000>; + opp-microvolt =3D <825000>; }; }; =20 --=20 2.39.2 From nobody Sat Sep 21 02:33:15 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 553E1C64ED6 for ; Tue, 28 Feb 2023 10:48:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229988AbjB1KsJ (ORCPT ); Tue, 28 Feb 2023 05:48:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60882 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230308AbjB1Kry (ORCPT ); Tue, 28 Feb 2023 05:47:54 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3435830EE; Tue, 28 Feb 2023 02:47:53 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 87EFD6602FDB; Tue, 28 Feb 2023 10:47:51 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581272; bh=iTiXsbcvL98tLYBNMasBh9C/GsvGSy9IVHh+FRRt/uQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JUS5j3F6XoHW0m9VpkYAIFNOvfhSr5WYYwQlBODNQmGx6LU3E7Gu8H1TB92gy8Xjd Kq8eF5nFyJbUGP+bKRFb4ly03VMEG7gXr88VMTxkAgeMycW30vbYKZeTxY5GOHnUkY 9uLnnuXfvwbnQ9QdnH/A0ESKNlKVZOe43ZVPbkcI/xQchKJW3z/A4mLOF9n08ljlwh xYB3Q7tWUGWaeFC7Sqa9wJ9iQboVT6OMANFbFI+qau7j/iTk1UBInJP8FvXB5wrR86 JoMTMJhx3jbt5f6V/SLnOmfLmCcAxnU06nODrQa0PQl5k9UZgEKCYu/MZCpf6sHIc8 p8qn5ynxr+8Hg== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v3 04/18] arm64: dts: mt8183-pumpkin: Couple VGPU and VSRAM_GPU regulators Date: Tue, 28 Feb 2023 11:47:27 +0100 Message-Id: <20230228104741.717819-5-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add coupling for these regulators, as they have a strict voltage output relation to satisfy in order to ensure GPU stable operation. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts b/arch/arm64/b= oot/dts/mediatek/mt8183-pumpkin.dts index a1d01639df30..c228f04d086b 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts +++ b/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts @@ -71,7 +71,6 @@ &auxadc { =20 &gpu { mali-supply =3D <&mt6358_vgpu_reg>; - sram-supply =3D <&mt6358_vsram_gpu_reg>; }; =20 &i2c0 { @@ -176,6 +175,16 @@ &mmc1 { non-removable; }; =20 +&mt6358_vgpu_reg { + regulator-coupled-with =3D <&mt6358_vsram_gpu_reg>; + regulator-coupled-max-spread =3D <100000>; +}; + +&mt6358_vsram_gpu_reg { + regulator-coupled-with =3D <&mt6358_vgpu_reg>; + regulator-coupled-max-spread =3D <100000>; +}; + &pio { i2c_pins_0: i2c0 { pins_i2c{ --=20 2.39.2 From nobody Sat Sep 21 02:33:15 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C8FDC64EC7 for ; Tue, 28 Feb 2023 10:48:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231167AbjB1KsH (ORCPT ); Tue, 28 Feb 2023 05:48:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60884 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230313AbjB1Kry (ORCPT ); Tue, 28 Feb 2023 05:47:54 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BE3093AB2; Tue, 28 Feb 2023 02:47:53 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 2F0106602FDC; Tue, 28 Feb 2023 10:47:52 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581272; bh=MrIqGkrI7LujwoSZ7Bc2owhtRwNGguk3yNGZ02UZ6+Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dR4/b3b5lltCNN8KfeulljLkwod7OuVNaM74a5HrWCCgegN1d2AhvW1vKT6Tr1vaR 1/SObUDle1lbS2jS+xAY5A7XfAZT/4WOhOgyNU6EKlFOvvJjQaWxpA8/ZcVUL5eVyA goyY64+helLLB/rgqG0gQjaCUs2CreVyKfqEzt5z+wTAdOUcj5Q4BqJFIIPFpdOw/9 sg07ArnkLn47yTd+Hg1/ugU4uMQX3fyHn3k+kDWe6+1yTKYG1gZhO3kj5Yb3m/WN1m A9LK6MVj+j2mC5orTIAkjMgZT1aL3SK3Yal8sxhThI4/vWBDUP7ziDaQr8uez07c1E AnFuCFXdJE9+g== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v3 05/18] arm64: dts: mediatek: mt8183-evb: Couple VGPU and VSRAM_GPU regulators Date: Tue, 28 Feb 2023 11:47:28 +0100 Message-Id: <20230228104741.717819-6-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add coupling for these regulators, as they have a strict voltage output relation to satisfy in order to ensure GPU stable operation. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/= dts/mediatek/mt8183-evb.dts index 52dc4a50e34d..fd327437e932 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts @@ -52,7 +52,6 @@ &auxadc { =20 &gpu { mali-supply =3D <&mt6358_vgpu_reg>; - sram-supply =3D <&mt6358_vsram_gpu_reg>; }; =20 &i2c0 { @@ -138,6 +137,16 @@ &mmc1 { non-removable; }; =20 +&mt6358_vgpu_reg { + regulator-coupled-with =3D <&mt6358_vsram_gpu_reg>; + regulator-coupled-max-spread =3D <100000>; +}; + +&mt6358_vsram_gpu_reg { + regulator-coupled-with =3D <&mt6358_vgpu_reg>; + regulator-coupled-max-spread =3D <100000>; +}; + &pio { i2c_pins_0: i2c0{ pins_i2c{ --=20 2.39.2 From nobody Sat Sep 21 02:33:15 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B3025C64EC7 for ; Tue, 28 Feb 2023 10:48:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230370AbjB1KsL (ORCPT ); Tue, 28 Feb 2023 05:48:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60968 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230381AbjB1Kr4 (ORCPT ); Tue, 28 Feb 2023 05:47:56 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BFA5B423F; Tue, 28 Feb 2023 02:47:54 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id C902D6602FDD; Tue, 28 Feb 2023 10:47:52 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581273; bh=7nrUbCRYVnwYMTUi2s51QYeV3DhvJQJoBM8PfyrS3Ok=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AdrM3BuVZzfiKKrYYkFPomdI7sp+7R98ThxfEuzos9BLkOXV4Y202LwUlimO5rp5g 1yxBPpnu07eB1MuQhc9/fqvuLWPiwyhtkwe/6r+JSectev19ZNrmaQNemuMTc5+GRB pELshWUNgV4trouIlEFAmLeOz4IE5nw/cPU3cMwBT4bCPZndvKcUnaXQsvfjtpDmCu 45nULDczz1ts90NEc0e1Lm9qXRgyyCwJZEgs9GxaKtw1JouNAHW3U/PU3XtdBTajO5 n2Prbgj13wA4R6LphJuDRTUwYYkOeu68I2W9t/x+zlm8R+4hX5MIE+TXwa6oRw95C5 z/CIDWEtXTyLg== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v3 06/18] arm64: dts: mediatek: mt8183: Use mediatek,mt8183b-mali as GPU compatible Date: Tue, 28 Feb 2023 11:47:29 +0100 Message-Id: <20230228104741.717819-7-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Use the new GPU related compatible to finally enable GPU DVFS on the MT8183 SoC. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts= /mediatek/mt8183.dtsi index e01b96adef02..5169779d01df 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -1752,7 +1752,7 @@ mfgcfg: syscon@13000000 { }; =20 gpu: gpu@13040000 { - compatible =3D "mediatek,mt8183-mali", "arm,mali-bifrost"; + compatible =3D "mediatek,mt8183b-mali", "arm,mali-bifrost"; reg =3D <0 0x13040000 0 0x4000>; interrupts =3D , --=20 2.39.2 From nobody Sat Sep 21 02:33:15 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 143E9C7EE32 for ; Tue, 28 Feb 2023 10:48:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231235AbjB1KsQ (ORCPT ); Tue, 28 Feb 2023 05:48:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32822 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230479AbjB1Kr5 (ORCPT ); Tue, 28 Feb 2023 05:47:57 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2135A2108; Tue, 28 Feb 2023 02:47:55 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 6BDA96602FD5; Tue, 28 Feb 2023 10:47:53 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581274; bh=WS/5GDWx9zfOrHB3JiHOO+tDSOb8JiL3fs15woWgU4M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hFiGqwIy0PW5EEBiCOUUhlRawMccNNZVVKNBuS2jqmVQkisdZSCiAw/FNWT0nfE14 23urU4jIHs8M5D739n8PlEArHUfAm2KIRtvD/rHiycwSKjzNmHkWYq0r0n7OlIMM2y NPa6H5/c6Bg+7k8Vfy/7iwQcfIeUBS+YxS91h28an+eYDiNvSvmIvvGBOrYOxvSm5u 6jHdz1r9ZKc/XOXYmJAKb/kXUcLz6YFHAVcfltEm2AeNzR1yvS3ZH8NGrdPU9I0CPO AeZAaWANoHuMB3VsKL3wtCNT7jyvtUcacSuAnjdIeth14V0U+3ilkvaxzPakmaIefj wFwKZm9CJy7jA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org, Alyssa Rosenzweig , =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= Subject: [PATCH v3 07/18] arm64: dts: mediatek: mt8192: Add GPU nodes Date: Tue, 28 Feb 2023 11:47:30 +0100 Message-Id: <20230228104741.717819-8-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Alyssa Rosenzweig The MediaTek MT8192 includes a Mali-G57 GPU supported in Panfrost. Add the GPU node to the device tree to enable 3D acceleration. The GPU node is disabled by default. It should be enabled by board with its power supplies correctly assigned. Signed-off-by: Alyssa Rosenzweig [nfraprado: removed sram supply, tweaked opp node name, adjusted commit mes= sage] Signed-off-by: N=C3=ADcolas F. R. A. Prado [wenst@: disable GPU by default; adjusted prefix; split out board change] Signed-off-by: Chen-Yu Tsai [Angelo: cosmetic fixes] Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 107 +++++++++++++++++++++++ 1 file changed, 107 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts= /mediatek/mt8192.dtsi index 87b91c8feaf9..34631adc52c6 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -312,6 +312,91 @@ timer: timer { clock-frequency =3D <13000000>; }; =20 + gpu_opp_table: opp-table-0 { + compatible =3D "operating-points-v2"; + opp-shared; + + opp-358000000 { + opp-hz =3D /bits/ 64 <358000000>; + opp-microvolt =3D <606250>; + }; + + opp-399000000 { + opp-hz =3D /bits/ 64 <399000000>; + opp-microvolt =3D <618750>; + }; + + opp-440000000 { + opp-hz =3D /bits/ 64 <440000000>; + opp-microvolt =3D <631250>; + }; + + opp-482000000 { + opp-hz =3D /bits/ 64 <482000000>; + opp-microvolt =3D <643750>; + }; + + opp-523000000 { + opp-hz =3D /bits/ 64 <523000000>; + opp-microvolt =3D <656250>; + }; + + opp-564000000 { + opp-hz =3D /bits/ 64 <564000000>; + opp-microvolt =3D <668750>; + }; + + opp-605000000 { + opp-hz =3D /bits/ 64 <605000000>; + opp-microvolt =3D <681250>; + }; + + opp-647000000 { + opp-hz =3D /bits/ 64 <647000000>; + opp-microvolt =3D <693750>; + }; + + opp-688000000 { + opp-hz =3D /bits/ 64 <688000000>; + opp-microvolt =3D <706250>; + }; + + opp-724000000 { + opp-hz =3D /bits/ 64 <724000000>; + opp-microvolt =3D <725000>; + }; + + opp-748000000 { + opp-hz =3D /bits/ 64 <748000000>; + opp-microvolt =3D <737500>; + }; + + opp-772000000 { + opp-hz =3D /bits/ 64 <772000000>; + opp-microvolt =3D <750000>; + }; + + opp-795000000 { + opp-hz =3D /bits/ 64 <795000000>; + opp-microvolt =3D <762500>; + }; + + opp-819000000 { + opp-hz =3D /bits/ 64 <819000000>; + opp-microvolt =3D <775000>; + }; + + opp-843000000 { + opp-hz =3D /bits/ 64 <843000000>; + opp-microvolt =3D <787500>; + }; + + opp-866000000 { + opp-hz =3D /bits/ 64 <866000000>; + opp-microvolt =3D <800000>; + }; + }; + soc { #address-cells =3D <2>; #size-cells =3D <2>; @@ -1266,6 +1351,28 @@ mmc1: mmc@11f70000 { status =3D "disabled"; }; =20 + gpu: gpu@13000000 { + compatible =3D "mediatek,mt8192-mali", "arm,mali-valhall-jm"; + reg =3D <0 0x13000000 0 0x4000>; + interrupts =3D , + , + ; + interrupt-names =3D "job", "mmu", "gpu"; + + clocks =3D <&apmixedsys CLK_APMIXED_MFGPLL>; + + power-domains =3D <&spm MT8192_POWER_DOMAIN_MFG2>, + <&spm MT8192_POWER_DOMAIN_MFG3>, + <&spm MT8192_POWER_DOMAIN_MFG4>, + <&spm MT8192_POWER_DOMAIN_MFG5>, + <&spm MT8192_POWER_DOMAIN_MFG6>; + power-domain-names =3D "core0", "core1", "core2", "core3", "core4"; + + operating-points-v2 =3D <&gpu_opp_table>; + + status =3D "disabled"; + }; + mfgcfg: clock-controller@13fbf000 { compatible =3D "mediatek,mt8192-mfgcfg"; reg =3D <0 0x13fbf000 0 0x1000>; --=20 2.39.2 From nobody Sat Sep 21 02:33:15 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5A19EC7EE2E for ; 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c=relaxed/simple; d=collabora.com; s=mail; t=1677581274; bh=2d8a1s6Yhde89pXYtEnq08v+ES25mvl579PIaEXQyEw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ima4zDZiIey6aYeTZgcLCNjPNHGjugB/Df1/IfaoIYBEivRgbURpY7DngWKPpL4IN bTPc+7QzSiOv44327eM+ZQGsEs0ewW2kgtQta4Uyp13ddd9/dcA5U/earYcBMoqJf0 OE9DgpcdUav5OgHsjnYuA+8LefTbmI3bwb4pNptqhYDU5Ui574U9YpEC0iVCaNQI8P jidOEyEuUASIf5J+FmOL36A74vQj0OFbFX74LCWavpC8cPg498ZUx7daM1/JdlISJy R184Qb853erFpVWQNLbFLeyjghIh/YcJhLQ/M/7gTOaN7tL2Dk4wJ2NcdbJTr7b9/8 aSFqUCItI9ftQ== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v3 08/18] arm64: dts: mediatek: mt8192: Add mfg_ref_sel clock to MFG0 domain Date: Tue, 28 Feb 2023 11:47:31 +0100 Message-Id: <20230228104741.717819-9-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The mfg_ref_sel clock is a mux used to switch between different "safe" (and slower) clock sources for the GPU: this is used during MFGPLL reconfiguration and eventually during idling at very low frequencies. This clock getting turned off means that the GPU will occasionally be unclocked, producing obvious consequences such as system crash or unpredictable behavior: assigning it to the top level MFG power domain will make sure that this stays on at all times during any operation on the MFG domain (only GPU-related transactions). Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts= /mediatek/mt8192.dtsi index 34631adc52c6..a29cdff8a095 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -499,8 +499,9 @@ power-domain@MT8192_POWER_DOMAIN_CONN { =20 power-domain@MT8192_POWER_DOMAIN_MFG0 { reg =3D ; - clocks =3D <&topckgen CLK_TOP_MFG_PLL_SEL>; - clock-names =3D "mfg"; + clocks =3D <&topckgen CLK_TOP_MFG_PLL_SEL>, + <&topckgen CLK_TOP_MFG_REF_SEL>; + clock-names =3D "mfg", "alt"; #address-cells =3D <1>; #size-cells =3D <0>; #power-domain-cells =3D <1>; --=20 2.39.2 From nobody Sat Sep 21 02:33:15 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D2FBC64ED6 for ; Tue, 28 Feb 2023 10:48:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231211AbjB1KsT (ORCPT ); Tue, 28 Feb 2023 05:48:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33372 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231160AbjB1KsG (ORCPT ); Tue, 28 Feb 2023 05:48:06 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 69A4EA5FB; Tue, 28 Feb 2023 02:47:56 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id C54BB6602FD8; Tue, 28 Feb 2023 10:47:54 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581275; bh=/37a11W4Djj29RkQI1F06mX5BvaAyxmllH1tjzesJsU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jUnwV8DkKYgp0efQlZ3Av9SsbY6lnJiN2sKcpLo/e4f3yhDfgFMfut41lHFFvxFJF 7ZaNMdC5qXqThl/VOOPyDJdTSvotOxLx6I+hQtMNgy2AOkVx3GjwHFHi9BUzXETiSn D9Htts/fzp+ZHMRu8u0SVAE1T0LxZOfO3pjH4tZ4b1omL8+eroO8SAU9tvIIYkpV4X HuZP6Nfj14F9VHdUOvoAnRyABirJJRD/x+vGKaHFNDPmpbXHv/adsWc7yVjjjBVEXK OcUP987PtCzd+cLJT+jhhJzO5sBuqKgFmsGi+MD9ec7pmuT6yg/NL2+TSUsQSBe5Yt 1NNvMZLvyqSAg== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= Subject: [PATCH v3 09/18] arm64: dts: mediatek: mt8192-asurada: Add MFG0 domain supply Date: Tue, 28 Feb 2023 11:47:32 +0100 Message-Id: <20230228104741.717819-10-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: N=C3=ADcolas F. R. A. Prado The mfg0 power domain encompasses the whole GPU and its surrounding glue logic. This power domain has a separate power rail. Add its power supply for Asurada. Signed-off-by: N=C3=ADcolas F. R. A. Prado [wenst@chromium.org: fix subject prefix and add commit message] Signed-off-by: Chen-Yu Tsai [Angelo: Reordered commits to address DVFS stability issues] Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 4 ++++ arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index 9f12257ab4e7..ec013d5ef157 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -380,6 +380,10 @@ &i2c7 { pinctrl-0 =3D <&i2c7_pins>; }; =20 +&mfg0 { + domain-supply =3D <&mt6315_7_vbuck1>; +}; + &mipi_tx0 { status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts= /mediatek/mt8192.dtsi index a29cdff8a095..f19d4a8ef3f6 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -497,7 +497,7 @@ power-domain@MT8192_POWER_DOMAIN_CONN { #power-domain-cells =3D <0>; }; =20 - power-domain@MT8192_POWER_DOMAIN_MFG0 { + mfg0: power-domain@MT8192_POWER_DOMAIN_MFG0 { reg =3D ; clocks =3D <&topckgen CLK_TOP_MFG_PLL_SEL>, <&topckgen CLK_TOP_MFG_REF_SEL>; --=20 2.39.2 From nobody Sat Sep 21 02:33:15 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D1A86C7EE31 for ; Tue, 28 Feb 2023 10:48:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230321AbjB1KsY (ORCPT ); Tue, 28 Feb 2023 05:48:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33390 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231177AbjB1KsH (ORCPT ); Tue, 28 Feb 2023 05:48:07 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1404D4C0B; Tue, 28 Feb 2023 02:47:57 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 6D8B26602FDC; Tue, 28 Feb 2023 10:47:55 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581275; bh=0DuJlRJGD/KVpO4odInSp/0rxcgpiRzq3+IVJVwVWMM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BkmJzhOgmkJosw1IA7xWf5oLQRhl1YAP7Yqw2UzBw82i7SFvHViUJdyKYMHlIqrw0 WV5jf9RJKGj37HvSAr5OGqMUTkikMYvQS9Wsqk8nX8A6azQ1CrSwUmcQt3Fs2T5VXb eY5AbfFxsjXwyzRthyx9e66VpX5QXKsakbdSc79l+Hq5nBpqfN9Q3EAHgvw1BF84Wa 37VgzuoWvk9K1yDFPQ4G5U5nEVnt1FJIIG6si1VPRfvS0XCbY+PvofiPlMvDwPXf0x dkAx3lI6gliwfW2jGMXqgCpUjQeDSyjRkES/RDE2nar5VVF084vOFIYB+Wenf8H0kx lDBFULPxkGgdQ== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v3 10/18] arm64: dts: mediatek: mt8192-asurada: Assign sram supply to MFG1 pd Date: Tue, 28 Feb 2023 11:47:33 +0100 Message-Id: <20230228104741.717819-11-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add a phandle to the MT8192_POWER_DOMAIN_MFG1 power domain and assign the GPU VSRAM supply to this in mt8192-asurada: this allows to keep the sram powered up while the GPU is used. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 4 ++++ arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index ec013d5ef157..df477eb89f21 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -384,6 +384,10 @@ &mfg0 { domain-supply =3D <&mt6315_7_vbuck1>; }; =20 +&mfg1 { + domain-supply =3D <&mt6359_vsram_others_ldo_reg>; +}; + &mipi_tx0 { status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts= /mediatek/mt8192.dtsi index f19d4a8ef3f6..5c30caf74026 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -506,7 +506,7 @@ mfg0: power-domain@MT8192_POWER_DOMAIN_MFG0 { #size-cells =3D <0>; #power-domain-cells =3D <1>; =20 - power-domain@MT8192_POWER_DOMAIN_MFG1 { + mfg1: power-domain@MT8192_POWER_DOMAIN_MFG1 { reg =3D ; mediatek,infracfg =3D <&infracfg>; #address-cells =3D <1>; --=20 2.39.2 From nobody Sat Sep 21 02:33:15 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE418C64EC7 for ; Tue, 28 Feb 2023 10:48:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231317AbjB1Ks3 (ORCPT ); Tue, 28 Feb 2023 05:48:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34006 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231181AbjB1KsO (ORCPT ); Tue, 28 Feb 2023 05:48:14 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 07563769A; Tue, 28 Feb 2023 02:47:57 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 141D16602FDA; Tue, 28 Feb 2023 10:47:56 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581276; bh=VIfsardJ+9N5gfD68eWHLQAfgPXFsPsNOQTEezXqqYc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eDNm0LLCVYLdi20WIoODyMKMVC8P5uQS2p5Qq97qO2zAHV0ibUPx5RkZf217/B6HT YNaBX3d/fmf1/ozomdQdlCY+gCjJQ27LOO3yElthsZAG1GZKO8Uwl81ywVL62MKWpc qNE2PN7EJ/0QHu968Oe44E4LcH/imaprFBoPeHbMiKcAJFI2Zntw8ahIFUq781sYJE V1kbO6LRhave0fc3ySnfaSXgmrTw/sE3nc6weSJHeDwqLhrsFVlmeZcM7VNOnub5og Z922lNkLrWn8fVCIyqwjZyxYF1AyhPOx5JQxthHqlKAySNCKvK48INWrtOoNI5xctj TV/uQQSB/aNlA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v3 11/18] arm64: dts: mediatek: mt8192-asurada: Couple VGPU and VSRAM_OTHER regulators Date: Tue, 28 Feb 2023 11:47:34 +0100 Message-Id: <20230228104741.717819-12-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add coupling for these regulators, as VSRAM_OTHER is used to power the GPU SRAM, and they have a strict voltage output relation to satisfy in order to ensure GPU stable operation. While at it, also add voltage constraint overrides for the GPU SRAM regulator "mt6359_vsram_others", but don't touch mt6315's vbuck1 as its constraints are fine. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index df477eb89f21..c8b6e1a9605b 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -447,6 +447,13 @@ &mt6359_vrf12_ldo_reg { regulator-always-on; }; =20 +&mt6359_vsram_others_ldo_reg { + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <850000>; + regulator-coupled-with =3D <&mt6315_7_vbuck1>; + regulator-coupled-max-spread =3D <10000>; +}; + &mt6359_vufs_ldo_reg { regulator-always-on; }; @@ -1411,6 +1418,8 @@ mt6315_7_vbuck1: vbuck1 { regulator-max-microvolt =3D <1193750>; regulator-enable-ramp-delay =3D <256>; regulator-allowed-modes =3D <0 1 2>; + regulator-coupled-with =3D <&mt6359_vsram_others_ldo_reg>; + regulator-coupled-max-spread =3D <10000>; }; }; }; --=20 2.39.2 From nobody Sat Sep 21 02:33:15 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 73EF5C7EE2E for ; Tue, 28 Feb 2023 10:48:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231243AbjB1Ksc (ORCPT ); Tue, 28 Feb 2023 05:48:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33390 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231222AbjB1KsP (ORCPT ); Tue, 28 Feb 2023 05:48:15 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AD9416A61; Tue, 28 Feb 2023 02:47:58 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id AF3B56602FDB; Tue, 28 Feb 2023 10:47:56 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581277; bh=ZrDmD1sWJzuZxLXrgoqDyjE5ZroJ8Fh1Xr2mllsFmVQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bzE81dy4xS0Ef1DuEpeSeEggU2pTIVv0EEEeHxy2rgtWa6PLl78uXWV5jKW57KKIc 1Q2clOeaUFd6WKMZqR3Bp1eRJZPSxtDVNFhIaUUNgsIG6cfEUlayeJtPTT9enM46y9 wPzHDPulBQGKMzJHvKKOVNUF9S1gTWW5PWbqFdKz2yanajmh0WDSLcykvKFyzgKlNq OoEWATOBFu2YUX1PS1mJKXI7798a8hFgNcBBwXZxe7mGD+8jQ8XXNY935R9IRPxn0P 37csBH6y/ZPxiDWkMo5mAQXD96snxtWPQ4xF+5zWWjxNEPB3ZPQ6I/8iw/142ZIStF lltp0oZWz6ATQ== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org, Alyssa Rosenzweig Subject: [PATCH v3 12/18] arm64: dts: mediatek: mt8192-asurada: Enable GPU Date: Tue, 28 Feb 2023 11:47:35 +0100 Message-Id: <20230228104741.717819-13-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Alyssa Rosenzweig Enable the GPU with its power supplies described. Signed-off-by: Alyssa Rosenzweig [wenst@: patch split out from MT8192 GPU node patch] Signed-off-by: Chen-Yu Tsai [Angelo: Minor commit title fix] Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index c8b6e1a9605b..067685191ba6 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -275,6 +275,11 @@ &dsi_out { remote-endpoint =3D <&anx7625_in>; }; =20 +&gpu { + mali-supply =3D <&mt6315_7_vbuck1>; + status =3D "okay"; +}; + &i2c0 { status =3D "okay"; =20 --=20 2.39.2 From nobody Sat Sep 21 02:33:15 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 694B1C64EC7 for ; Tue, 28 Feb 2023 10:48:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231344AbjB1Ksf (ORCPT ); Tue, 28 Feb 2023 05:48:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34006 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231229AbjB1KsP (ORCPT ); Tue, 28 Feb 2023 05:48:15 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 432084C1F; Tue, 28 Feb 2023 02:47:59 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 5FCA46602FDD; Tue, 28 Feb 2023 10:47:57 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581277; bh=KQl+1992t3fzHAo6w7W+uAYOQeZPx/82oAPGoJNpTLE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Xe9WLaq3kXmjLFR7IiT8Hn40k3Ol8L118xWU7hVeSVN4exhL0sc2fOj2Jp4nMj2+a NX74A23spu82s1ciJMsH/zpJy+KeUCWZJaNEibn0Y8gdPy7ZsKDkfWxrk63Qe+LsL1 UCXX1LqpptivTIk7XN9P0RUhRcEDuAiK33ym1fySxKNHSluWMw4NSA3VUUtXqUafci dmpxL9UOO2n0Qhso3myRCSrNAwYeiVxp60pw7fX+HOaQVEWhvRfNyroSHPT/bz4P26 ruvXorklpLrqC0QTI4JA0F3kdU1gcfMePKiwW/rzpnR3vlf+r2cKIS0ETdjdapwWMd rYEZIXaySzjJg== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v3 13/18] arm64: dts: mediatek: mt8195: Add mfg_core_tmp clock to MFG1 domain Date: Tue, 28 Feb 2023 11:47:36 +0100 Message-Id: <20230228104741.717819-14-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Similarly to what can be seen in MT8192, on MT8195 the mfg_core_tmp clock is a mux used to switch between different "safe" (and slower) clock sources for the GPU: this is used during MFGPLL reconfiguration and eventually during idling at very low frequencies. This clock getting turned off means that the GPU will occasionally be unclocked, producing obvious consequences such as system crash or unpredictable behavior: assigning it to the top level MFG power domain will make sure that this stays on at all times during any operation on the MFG domain (only GPU-related transactions). Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts= /mediatek/mt8195.dtsi index 8f1264d5290b..d116830d6af3 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -446,8 +446,9 @@ mfg0: power-domain@MT8195_POWER_DOMAIN_MFG0 { =20 power-domain@MT8195_POWER_DOMAIN_MFG1 { reg =3D ; - clocks =3D <&apmixedsys CLK_APMIXED_MFGPLL>; - clock-names =3D "mfg"; + clocks =3D <&apmixedsys CLK_APMIXED_MFGPLL>, + <&topckgen CLK_TOP_MFG_CORE_TMP>; + clock-names =3D "mfg", "alt"; mediatek,infracfg =3D <&infracfg_ao>; #address-cells =3D <1>; #size-cells =3D <0>; --=20 2.39.2 From nobody Sat Sep 21 02:33:15 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 11C95C64EC7 for ; Tue, 28 Feb 2023 10:48:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231355AbjB1Ksy (ORCPT ); Tue, 28 Feb 2023 05:48:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34026 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230381AbjB1KsR (ORCPT ); Tue, 28 Feb 2023 05:48:17 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 53A102885F; Tue, 28 Feb 2023 02:47:59 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 065186602FDE; Tue, 28 Feb 2023 10:47:57 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581278; bh=smKRDmDdu68lnpbPgqG4z/RTkzBSVrXMEAsrpvTEOiY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ar5wQuJ/4XMRO/fhjH1erUDGVxa2IrETJPY3HYhhDkbOnhBN49QpB+RSCUpUm98je Q+BV1ivVx6kqXx0wLmg8mmMOSczH3bJvWN0rC7Oh1cnvgvLdB/+ErTkRxlZxgzNEO7 +6xFd570rLl1/a4f7Adtx+49khPcOLZMYPMFKIohalxbMFBPmR63g++cMg+MCU4tXv kaAnEtO3YCbMh4VdX6cTfIoGULFgNjj2TfBUtHArpxkuWtIGrx6AfDu88xcSQIO6tb UXOwEArS1zdQ5wbUwPYx4UfqIQsEdV2YKIKKLRFABBr7/nXntCkTxVDKzCvYSSnF7y 4pstYL5APJD9Q== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v3 14/18] arm64: dts: mt8195: Add panfrost node for Mali-G57 Valhall Natt GPU Date: Tue, 28 Feb 2023 11:47:37 +0100 Message-Id: <20230228104741.717819-15-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add GPU support through panfrost for the Mali-G57 GPU on MT8195 with its OPP table but keep it in disabled state. This is expected to be enabled only on boards which make use of the GPU. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 90 ++++++++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts= /mediatek/mt8195.dtsi index d116830d6af3..0e4ee7713c30 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -333,6 +333,76 @@ performance: performance-controller@11bc10 { #performance-domain-cells =3D <1>; }; =20 + gpu_opp_table: opp-table-gpu { + compatible =3D "operating-points-v2"; + opp-shared; + + opp-390000000 { + opp-hz =3D /bits/ 64 <390000000>; + opp-microvolt =3D <625000>; + }; + opp-410000000 { + opp-hz =3D /bits/ 64 <410000000>; + opp-microvolt =3D <631250>; + }; + opp-431000000 { + opp-hz =3D /bits/ 64 <431000000>; + opp-microvolt =3D <631250>; + }; + opp-473000000 { + opp-hz =3D /bits/ 64 <473000000>; + opp-microvolt =3D <637500>; + }; + opp-515000000 { + opp-hz =3D /bits/ 64 <515000000>; + opp-microvolt =3D <637500>; + }; + opp-556000000 { + opp-hz =3D /bits/ 64 <556000000>; + opp-microvolt =3D <643750>; + }; + opp-598000000 { + opp-hz =3D /bits/ 64 <598000000>; + opp-microvolt =3D <650000>; + }; + opp-640000000 { + opp-hz =3D /bits/ 64 <640000000>; + opp-microvolt =3D <650000>; + }; + opp-670000000 { + opp-hz =3D /bits/ 64 <670000000>; + opp-microvolt =3D <662500>; + }; + opp-700000000 { + opp-hz =3D /bits/ 64 <700000000>; + opp-microvolt =3D <675000>; + }; + opp-730000000 { + opp-hz =3D /bits/ 64 <730000000>; + opp-microvolt =3D <687500>; + }; + opp-760000000 { + opp-hz =3D /bits/ 64 <760000000>; + opp-microvolt =3D <700000>; + }; + opp-790000000 { + opp-hz =3D /bits/ 64 <790000000>; + opp-microvolt =3D <712500>; + }; + opp-820000000 { + opp-hz =3D /bits/ 64 <820000000>; + opp-microvolt =3D <725000>; + }; + opp-850000000 { + opp-hz =3D /bits/ 64 <850000000>; + opp-microvolt =3D <737500>; + }; + opp-880000000 { + opp-hz =3D /bits/ 64 <880000000>; + opp-microvolt =3D <750000>; + }; + }; + pmu-a55 { compatible =3D "arm,cortex-a55-pmu"; interrupt-parent =3D <&gic>; @@ -1790,6 +1860,26 @@ ufsphy: ufs-phy@11fa0000 { status =3D "disabled"; }; =20 + gpu: gpu@13000000 { + compatible =3D "mediatek,mt8195-mali", "mediatek,mt8192-mali", + "arm,mali-valhall-jm"; + reg =3D <0 0x13000000 0 0x4000>; + + clocks =3D <&mfgcfg CLK_MFG_BG3D>; + interrupts =3D , + , + ; + interrupt-names =3D "job", "mmu", "gpu"; + operating-points-v2 =3D <&gpu_opp_table>; + power-domains =3D <&spm MT8195_POWER_DOMAIN_MFG2>, + <&spm MT8195_POWER_DOMAIN_MFG3>, + <&spm MT8195_POWER_DOMAIN_MFG4>, + <&spm MT8195_POWER_DOMAIN_MFG5>, + <&spm MT8195_POWER_DOMAIN_MFG6>; + power-domain-names =3D "core0", "core1", "core2", "core3", "core4"; + status =3D "disabled"; + }; + mfgcfg: clock-controller@13fbf000 { compatible =3D "mediatek,mt8195-mfgcfg"; reg =3D <0 0x13fbf000 0 0x1000>; --=20 2.39.2 From nobody Sat Sep 21 02:33:15 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E1C27C7EE2E for ; Tue, 28 Feb 2023 10:49:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231381AbjB1KtC (ORCPT ); Tue, 28 Feb 2023 05:49:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34040 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230482AbjB1KsR (ORCPT ); Tue, 28 Feb 2023 05:48:17 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 84F4383CB; Tue, 28 Feb 2023 02:48:00 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id A26596602FD6; Tue, 28 Feb 2023 10:47:58 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581279; bh=eoUuj+cxZRXF8or5zd6PgagsDUpoYC3djot0WKXw2CA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NZ0+0OKWVIQRQzwWaxjzmQDnnUC0Hi0PNYg4+iQtCpKAJLcIdMW83XgGUT0hc4Jn0 oafIIAmOCzQd0WmOIpnzlc5I2WgByKaOo8pSfakuhx1p8kj20Nx+VOSh4MK0G/srDL GHK5Ej/R2HfgJT8PNF0n56oAsiy/31I0juGfH8I5F9tus73xnvbTePXjjUr9K0Pzfh x2T/loYUkJ1+b/7BR+ptcrNHN74bp5UeupXXWo7qPIPNQgA8HJ8pwWZs2E7hgitkzA wc66iQw/Gc/NjdOnaW+F6o2mPH8jRGtaJR2GDvl98jEPPE6uBWb5X9GAjnQB3H2PTD TFlgQZN/vMxwQ== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v3 15/18] arm64: dts: mediatek: mt8195-cherry: Enable Mali-G57 GPU Date: Tue, 28 Feb 2023 11:47:38 +0100 Message-Id: <20230228104741.717819-16-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Enable the Mali-G57 found on this platform with the open-source Panfrost driver. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi index 56749cfe7c33..24669093fbed 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -238,6 +238,11 @@ dptx_out: endpoint { }; }; =20 +&gpu { + status =3D "okay"; + mali-supply =3D <&mt6315_7_vbuck1>; +}; + &i2c0 { status =3D "okay"; =20 --=20 2.39.2 From nobody Sat Sep 21 02:33:15 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EB8DBC64EC7 for ; Tue, 28 Feb 2023 10:49:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231421AbjB1KtH (ORCPT ); Tue, 28 Feb 2023 05:49:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33390 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231278AbjB1KsU (ORCPT ); Tue, 28 Feb 2023 05:48:20 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F014D2B60A; Tue, 28 Feb 2023 02:48:00 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 51F626602FD8; Tue, 28 Feb 2023 10:47:59 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581279; bh=zNRcNap0DKbKus9H9hYNrxN03fzRsqShpCKFraZ9Guk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QozOyhjvhaL80WmrxET48lIxFyT9zy9c+/kvpqlZVra9vyXmqBWX+4+Dst89a9M3K 93U5FDEWYAGoZ4MfEhQVWTVncU03ZqXlkfBYM4Xh2a+KYuM1HfsGGKVuoJgMee5D/7 hGlKkf8tTgyic0FrhNcopub0dp/bYqbZfh863RaTVPS1Q+cc1tmdVtcShU7AHZ1TiM h3EEU8kAy1zPSD8AygJL8bJ/1LdR4VS6f5d2OFraMld1q6P9oK1g3Rpw0rbCr3UGem lB1cLcUl3jMLIZupv4XmKB7F2Pg+lbZZPqmyn6JVbAZrnBKQ1uTMPrDWCd68zRYjjH xO1+OPEONDDZA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v3 16/18] arm64: dts: mediatek: mt8186: Add GPU node Date: Tue, 28 Feb 2023 11:47:39 +0100 Message-Id: <20230228104741.717819-17-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add a GPU node for MT8186 SoC but keep it disabled. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8186.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts= /mediatek/mt8186.dtsi index a0d3e1f731bd..78ff8ba5718e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -1075,6 +1075,23 @@ mfgsys: clock-controller@13000000 { #clock-cells =3D <1>; }; =20 + gpu: gpu@13040000 { + compatible =3D "mediatek,mt8186-mali", + "arm,mali-bifrost"; + reg =3D <0 0x13040000 0 0x4000>; + + clocks =3D <&mfgsys CLK_MFG_BG3D>; + interrupts =3D , + , + ; + interrupt-names =3D "job", "mmu", "gpu"; + power-domains =3D <&spm MT8186_POWER_DOMAIN_MFG2>, + <&spm MT8186_POWER_DOMAIN_MFG3>; + power-domain-names =3D "core0", "core1"; + #cooling-cells =3D <2>; + status =3D "disabled"; + }; + mmsys: syscon@14000000 { compatible =3D "mediatek,mt8186-mmsys", "syscon"; reg =3D <0 0x14000000 0 0x1000>; --=20 2.39.2 From nobody Sat Sep 21 02:33:15 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 462BCC64EC7 for ; Tue, 28 Feb 2023 10:49:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231408AbjB1KtF (ORCPT ); Tue, 28 Feb 2023 05:49:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34048 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231265AbjB1KsS (ORCPT ); Tue, 28 Feb 2023 05:48:18 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CEA7B2CFD4; Tue, 28 Feb 2023 02:48:01 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id EB3506602FDA; Tue, 28 Feb 2023 10:47:59 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581280; bh=Iwin79s7Du0gnKNyuCiVlTOYzAcjAthdmz358wfq0fA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ONRPHnIoSN/2rIxjTIP1qdq1UCGfN07Z5Pgt6f7WkCkjwy/XUFFsA3fCwym+ZmK/s yxuQ57xO+xuczLY9KBo67vhLS47z/Mrkyr+Jo4RMvB4GUqmFd/NquiDnoJKk6bZI2r lcFzVMxj9xQAK4ulv7jpj1My1JddC8Ipteop4gG1l/vZQ/+5o6z3lc400s7ee1jOHu nsErMvydS/PzCNH91kH13fgkRFBju5L9X4Tqjfyf+453Gj30yP1cLimBAGchtX96iU tzcQbnZqPfBaeRezWagDfHJBKYh6srThZbRrboB+rJmZPlvtrpambKjp1GadifDxCf v/309XhTRdyrw== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v3 17/18] arm64: dts: mediatek: mt8183-pumpkin: Override vgpu/vsram_gpu constraints Date: Tue, 28 Feb 2023 11:47:40 +0100 Message-Id: <20230228104741.717819-18-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Override the PMIC-default voltage constraints for VGPU and VSRAM_GPU with the platform specific vmin/vmax for the highest possible SoC binning. Signed-off-by: AngeloGioacchino Del Regno Suggested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts b/arch/arm64/b= oot/dts/mediatek/mt8183-pumpkin.dts index c228f04d086b..526bcae7a3f8 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts +++ b/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts @@ -176,11 +176,17 @@ &mmc1 { }; =20 &mt6358_vgpu_reg { + regulator-min-microvolt =3D <625000>; + regulator-max-microvolt =3D <900000>; + regulator-coupled-with =3D <&mt6358_vsram_gpu_reg>; regulator-coupled-max-spread =3D <100000>; }; =20 &mt6358_vsram_gpu_reg { + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <1000000>; + regulator-coupled-with =3D <&mt6358_vgpu_reg>; regulator-coupled-max-spread =3D <100000>; }; --=20 2.39.2 From nobody Sat Sep 21 02:33:15 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 79900C7EE31 for ; Tue, 28 Feb 2023 10:49:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231439AbjB1KtN (ORCPT ); Tue, 28 Feb 2023 05:49:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34532 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231319AbjB1Ksa (ORCPT ); Tue, 28 Feb 2023 05:48:30 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BAF9C469A; Tue, 28 Feb 2023 02:48:02 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 929D76602FDC; Tue, 28 Feb 2023 10:48:00 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581281; bh=xNmiw2ujYQURCmwW9t7m1kerphWvM2Xx2d/qe8evz/4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EsL4UoDdDIceOXiCYkSlqmWUwfG44aQh0lfZSEHL8OECQjdQuvUBvh1ZolqJtIaU8 RUj2bFLzPSTuVesYRUOmQ282jVzYJ4RGjhKZuRh3Ss8MAywL1z7ohC3E9bNreQMTPL 0au+IEQ+7cZbTtuXWwX1Dc3uzp1egiNOGXeVcqIn7zIXQSny54lpAt2JviiQ2Smngf Hoqk1M8I7WShI7dgWtT63W9sUUNyAGTS9FYvqSNR5yAuUl/UMWfS1RYA1aJdtvdeYi sCuc1Gl4WImVJz6Z4H4F1Naerwq6+b+Wj2r50WzbPfU8Ob3ShzqvsMkymKAmcT63h8 jk8AQxf7bYZlg== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v3 18/18] arm64: dts: mediatek: mt8183-evb: Override vgpu/vsram_gpu constraints Date: Tue, 28 Feb 2023 11:47:41 +0100 Message-Id: <20230228104741.717819-19-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Override the PMIC-default voltage constraints for VGPU and VSRAM_GPU with the platform specific vmin/vmax for the highest possible SoC binning. Signed-off-by: AngeloGioacchino Del Regno Suggested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/= dts/mediatek/mt8183-evb.dts index fd327437e932..3e3f4b1b00f0 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts @@ -138,11 +138,17 @@ &mmc1 { }; =20 &mt6358_vgpu_reg { + regulator-min-microvolt =3D <625000>; + regulator-max-microvolt =3D <900000>; + regulator-coupled-with =3D <&mt6358_vsram_gpu_reg>; regulator-coupled-max-spread =3D <100000>; }; =20 &mt6358_vsram_gpu_reg { + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <1000000>; + regulator-coupled-with =3D <&mt6358_vgpu_reg>; regulator-coupled-max-spread =3D <100000>; }; --=20 2.39.2