From nobody Tue Sep 9 22:24:55 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40436C61DA4 for ; Fri, 24 Feb 2023 13:51:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229696AbjBXNvg (ORCPT ); Fri, 24 Feb 2023 08:51:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43584 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229669AbjBXNvc (ORCPT ); Fri, 24 Feb 2023 08:51:32 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 955DE6798C; Fri, 24 Feb 2023 05:51:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1677246691; x=1708782691; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=TCkNh4u/HJoVJLn9r2u33Qgna6ijjTAiufIVVsHyKZ8=; b=kOYy0+sn9SEHEp6T9vQQfMjuSgnkLBnKOBka1XdbeDgFwNmrvEDifYqh nTVZiOStR7Qvf7MubT7M5tiVXABZr5cfzxk7eYVWr8IaCUPzzLKRrXnje I2VPvUnPetobXWNuNTsuT9js5IKfW0yyEKKiWDZU1l6d6a+xmDDPymQ7w BJiVmvnbiF+0KiEl9SOaCwt3MdMP1uQdmz2jRAfDE+vzDTOGQMac7NnHT eBYZu/f3JG43Au0RuafAbd2JktblD22OuqRJYItED1sIkFPWesOrqpQWr PIQGZ+i6CGxSV12fmyn6KPMbPMJFY/YhlBuycRL0AK33n4qmFeWZEUbUv w==; X-IronPort-AV: E=Sophos;i="5.97,324,1669100400"; d="scan'208";a="138923429" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 24 Feb 2023 06:51:30 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Fri, 24 Feb 2023 06:51:30 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Fri, 24 Feb 2023 06:51:27 -0700 From: Conor Dooley To: CC: Conor Dooley , , "Miguel Ojeda" , Alex Gaynor , "Wedson Almeida Filho" , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , "Nathan Chancellor" , Nick Desaulniers , Tom Rix , , , , Subject: [RFC RESEND 1/2] scripts: generate_rust_target: enable building on RISC-V Date: Fri, 24 Feb 2023 13:50:43 +0000 Message-ID: <20230224135044.2882109-2-conor.dooley@microchip.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230224135044.2882109-1-conor.dooley@microchip.com> References: <20230224135044.2882109-1-conor.dooley@microchip.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1577; i=conor.dooley@microchip.com; h=from:subject; bh=QsTuP87FnJv8kjQnYjXUt2ZRgTNJmBC7A5v4jw6v4qE=; b=owGbwMvMwCFWscWwfUFT0iXG02pJDMk/DmwoqlM8Npu9+sKdL28fS73Q9jNZKf9sgbZD2yPfwx82 iky711HKwiDGwSArpsiSeLuvRWr9H5cdzj1vYeawMoEMYeDiFICJ1F5g+F8XuWHlXfFyzvi1cvPVXP 79fxB5a97XGz96eFm8fugdi3dj+F9fO585oFbA/1+8r/1+zsLbO0rUyyad3v9ta57G6jPHH/ABAA== X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Miguel Ojeda Add the required bits from rust-for-linux to enable generating a RISC-V target for rust. Signed-off-by: Miguel Ojeda Signed-off-by: Conor Dooley --- scripts/generate_rust_target.rs | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/scripts/generate_rust_target.rs b/scripts/generate_rust_target= .rs index 3c6cbe2b278d..72428fc66502 100644 --- a/scripts/generate_rust_target.rs +++ b/scripts/generate_rust_target.rs @@ -161,6 +161,25 @@ fn main() { ts.push("features", features); ts.push("llvm-target", "x86_64-linux-gnu"); ts.push("target-pointer-width", "64"); + } else if cfg.has("RISCV") { + if cfg.has("64BIT") { + ts.push("arch", "riscv64"); + ts.push("data-layout", "e-m:e-p:64:64-i64:64-i128:128-n64-S128= "); + ts.push("llvm-target", "riscv64-linux-gnu"); + ts.push("target-pointer-width", "64"); + } else { + ts.push("arch", "riscv32"); + ts.push("data-layout", "e-m:e-p:32:32-i64:64-n32-S128"); + ts.push("llvm-target", "riscv32-linux-gnu"); + ts.push("target-pointer-width", "32"); + } + ts.push("code-model", "medium"); + ts.push("disable-redzone", true); + let mut features =3D "+m,+a".to_string(); + if cfg.has("RISCV_ISA_C") { + features +=3D ",+c"; + } + ts.push("features", features); } else { panic!("Unsupported architecture"); } --=20 2.39.2 From nobody Tue Sep 9 22:24:55 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12CE6C678D5 for ; Fri, 24 Feb 2023 13:51:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229705AbjBXNvr (ORCPT ); Fri, 24 Feb 2023 08:51:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44138 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229477AbjBXNvp (ORCPT ); Fri, 24 Feb 2023 08:51:45 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E3A5A69ACF; Fri, 24 Feb 2023 05:51:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1677246701; x=1708782701; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ZukmKbhuckdgYPxcrfE3bKQ6TkEUIZBG4kNxEuFJMEs=; b=bcf5dK0AceYDByhTOLgGLHU6PC0bYN1OArEwbbrQG9ZY56KMkNoA8MNP W5nYLuSCp/bWG/s9KZsgo1qcGPnLfGkyIQbdKsDMxs6ncdJAUQ8iKUaDo s+doXSrKE92oRTL4la79pAg+GcC9VxFyNOlVRTFu5F3vM1octttVwYNPN /aCrB4KT80FpOvpsh4OMDA7lLwAte3ZAqVJ4QekMayNp6UZ0dmfnnSJdc l1OF/0GPvZ4U6AkLg4ikhnCaBUSTGDGg2a1KBBxFCOErABDzRPhNzcqV0 FAPV98vy8vUkmmtgf9nTJkjTF4x3ZGauESzJQ4jWJDsBMhftxrncjZoK1 g==; X-IronPort-AV: E=Sophos;i="5.97,324,1669100400"; d="scan'208";a="138923444" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 24 Feb 2023 06:51:39 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Fri, 24 Feb 2023 06:51:33 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Fri, 24 Feb 2023 06:51:30 -0700 From: Conor Dooley To: CC: Conor Dooley , , "Miguel Ojeda" , Alex Gaynor , "Wedson Almeida Filho" , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , "Nathan Chancellor" , Nick Desaulniers , Tom Rix , , , , Subject: [RFC RESEND 2/2] RISC-V: enable building the 64-bit kernels with rust support Date: Fri, 24 Feb 2023 13:50:44 +0000 Message-ID: <20230224135044.2882109-3-conor.dooley@microchip.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230224135044.2882109-1-conor.dooley@microchip.com> References: <20230224135044.2882109-1-conor.dooley@microchip.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2374; i=conor.dooley@microchip.com; h=from:subject; bh=HpaH7oMTktYgKSCgvr9/FNMbXJinNGLWnda4ScFUHPo=; b=owGbwMvMwCFWscWwfUFT0iXG02pJDMk/Dmwo8fSS+rnrslhV3QIxvewyGfVJjuHBOg8sXjq7yN4O SKzsKGVhEONgkBVTZEm83dcitf6Pyw7nnrcwc1iZQIYwcHEKwETSHzEyNLGy7y/49uWRcuOr+Z2vC6 4smbJ76bE1dctbZCoUmMunr2X4X/Ar9bmz27Vrej8EeOez+1t/dfoyxTXEdtfO1T5qXzbdZgQA X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Miguel Ojeda The rust modules work on 64-bit RISC-V, with no twiddling required. Select HAS_RUST and provide the required flags to kbuild so that the modules can be used. 32-bit is broken in core rust code, so support is limited to 64-bit only: ld.lld: error: undefined symbol: __udivdi3 Signed-off-by: Miguel Ojeda Signed-off-by: Conor Dooley --- Documentation/rust/arch-support.rst | 2 ++ arch/riscv/Kconfig | 1 + arch/riscv/Makefile | 3 ++- 3 files changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/rust/arch-support.rst b/Documentation/rust/arch-= support.rst index 6982b63775da..197919158596 100644 --- a/Documentation/rust/arch-support.rst +++ b/Documentation/rust/arch-support.rst @@ -15,5 +15,7 @@ support corresponds to ``S`` values in the ``MAINTAINERS`= ` file. =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D Architecture Level of support Constraints =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D +``riscv`` Maintained ``rv64`` only. +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D ``x86`` Maintained ``x86_64`` only. =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 81eb031887d2..73174157212d 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -115,6 +115,7 @@ config RISCV select HAVE_POSIX_CPU_TIMERS_TASK_WORK select HAVE_REGS_AND_STACK_ACCESS_API select HAVE_RSEQ + select HAVE_RUST if 64BIT select HAVE_STACKPROTECTOR select HAVE_SYSCALL_TRACEPOINTS select IRQ_DOMAIN diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile index 76989561566b..0d6fc4e25221 100644 --- a/arch/riscv/Makefile +++ b/arch/riscv/Makefile @@ -29,8 +29,8 @@ ifeq ($(CONFIG_ARCH_RV64I),y) =20 KBUILD_CFLAGS +=3D -mabi=3Dlp64 KBUILD_AFLAGS +=3D -mabi=3Dlp64 - KBUILD_LDFLAGS +=3D -melf64lriscv + KBUILD_RUSTFLAGS +=3D -Ctarget-cpu=3Dgeneric-rv64 else BITS :=3D 32 UTS_MACHINE :=3D riscv32 @@ -38,6 +38,7 @@ else KBUILD_CFLAGS +=3D -mabi=3Dilp32 KBUILD_AFLAGS +=3D -mabi=3Dilp32 KBUILD_LDFLAGS +=3D -melf32lriscv + KBUILD_RUSTFLAGS +=3D -Ctarget-cpu=3Dgeneric-rv32 endif =20 ifeq ($(CONFIG_LD_IS_LLD),y) --=20 2.39.2