From nobody Sat Sep 21 04:40:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6F248C61DA3 for ; Tue, 21 Feb 2023 11:57:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233532AbjBUL5K (ORCPT ); Tue, 21 Feb 2023 06:57:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34276 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234461AbjBUL4q (ORCPT ); Tue, 21 Feb 2023 06:56:46 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 60F8C28869; Tue, 21 Feb 2023 03:56:26 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id B034766021D0; Tue, 21 Feb 2023 11:56:11 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1676980572; bh=wSnbyMfzTT5K6YQ9dYPu4W/7E3SDjJAMqKz1KNLxFIE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=C4Tf75bo7pgoctemE/ByGBx2dCfgjcXbtdQAoQVqOW3I5BRcZJtNZuPZzkIQRwp5V Yc6XiGfepUzmTR9eXcfpp4i6YIRKV6HgmRFOEJ3mmGTCLiUObhPzbaWU3FnoZybd3n xUkfS/CFErdweYIvLPVRB2Bm/Xu8QnfVXWJKnIGtJpVGLSekzrLGGD86UHJ7GXsDIe +sI1Kyq6PN9r/pMAcrE2Wq1uBAGh1tqBSHqfdSIpjlLZyW8fX+69xxD3hiZ2T2zL3n o2CepGjnwI8Wh6Dfmz48KXgYqXpYt+f998G6aS+o9rCQq1vCW2fFiySMjntrzP+gGP TQmkiuOETYE5g== From: AngeloGioacchino Del Regno To: mturquette@baylibre.com Cc: sboyd@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, wenst@chromium.org, johnson.wang@mediatek.com, miles.chen@mediatek.com, chun-jie.chen@mediatek.com, daniel@makrotopia.org, fparent@baylibre.com, msp@baylibre.com, nfraprado@collabora.com, rex-bc.chen@mediatek.com, zhaojh329@gmail.com, sam.shih@mediatek.com, edward-jw.yang@mediatek.com, yangyingliang@huawei.com, granquet@baylibre.com, pablo.sun@mediatek.com, sean.wang@mediatek.com, chen.zhong@mediatek.com, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v4 13/54] clk: mediatek: mt8365: Join top_misc_mux_gates and top_misc_muxes arrays Date: Tue, 21 Feb 2023 12:55:08 +0100 Message-Id: <20230221115549.360132-14-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230221115549.360132-1-angelogioacchino.delregno@collabora.com> References: <20230221115549.360132-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" In preparation for migrating this driver to the simple probe mechanism, join the audio gates to the top_misc_mux_gates array of mtk_composite clocks in one top_misc_muxes array. While at it, since the `apll_i2s0_parents` array is for all i2s clocks, rename that to `apll_i2s_parents`. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- drivers/clk/mediatek/clk-mt8365.c | 46 ++++++++++--------------------- 1 file changed, 14 insertions(+), 32 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt8365.c b/drivers/clk/mediatek/clk-m= t8365.c index 85fe7586a69b..fef6c653c9ce 100644 --- a/drivers/clk/mediatek/clk-mt8365.c +++ b/drivers/clk/mediatek/clk-mt8365.c @@ -384,25 +384,23 @@ static const char * const mbist_diag_parents[] =3D { "univpll2_d8" }; =20 -static const char * const apll_i2s0_parents[] =3D { +static const char * const apll_i2s_parents[] =3D { "aud_1_sel", "aud_2_sel" }; =20 -static struct mtk_composite top_misc_mux_gates[] =3D { +static struct mtk_composite top_misc_muxes[] =3D { /* CLK_CFG_11 */ MUX_GATE(CLK_TOP_MBIST_DIAG_SEL, "mbist_diag_sel", mbist_diag_parents, 0x0ec, 0, 2, 7), -}; - -static struct mt8365_clk_audio_mux top_misc_muxes[] =3D { - { CLK_TOP_APLL_I2S0_SEL, "apll_i2s0_sel", 11}, - { CLK_TOP_APLL_I2S1_SEL, "apll_i2s1_sel", 12}, - { CLK_TOP_APLL_I2S2_SEL, "apll_i2s2_sel", 13}, - { CLK_TOP_APLL_I2S3_SEL, "apll_i2s3_sel", 14}, - { CLK_TOP_APLL_TDMOUT_SEL, "apll_tdmout_sel", 15}, - { CLK_TOP_APLL_TDMIN_SEL, "apll_tdmin_sel", 16}, - { CLK_TOP_APLL_SPDIF_SEL, "apll_spdif_sel", 17}, + /* Audio MUX */ + MUX(CLK_TOP_APLL_I2S0_SEL, "apll_i2s0_sel", apll_i2s_parents, 0x0320, 11,= 1), + MUX(CLK_TOP_APLL_I2S1_SEL, "apll_i2s1_sel", apll_i2s_parents, 0x0320, 12,= 1), + MUX(CLK_TOP_APLL_I2S2_SEL, "apll_i2s2_sel", apll_i2s_parents, 0x0320, 13,= 1), + MUX(CLK_TOP_APLL_I2S3_SEL, "apll_i2s3_sel", apll_i2s_parents, 0x0320, 14,= 1), + MUX(CLK_TOP_APLL_TDMOUT_SEL, "apll_tdmout_sel", apll_i2s_parents, 0x0320,= 15, 1), + MUX(CLK_TOP_APLL_TDMIN_SEL, "apll_tdmin_sel", apll_i2s_parents, 0x0320, 1= 6, 1), + MUX(CLK_TOP_APLL_SPDIF_SEL, "apll_spdif_sel", apll_i2s_parents, 0x0320, 1= 7, 1), }; =20 #define CLK_CFG_UPDATE 0x004 @@ -787,28 +785,12 @@ static int clk_mt8365_top_probe(struct platform_devic= e *pdev) if (ret) goto unregister_factors; =20 - ret =3D mtk_clk_register_composites(&pdev->dev, top_misc_mux_gates, - ARRAY_SIZE(top_misc_mux_gates), base, + ret =3D mtk_clk_register_composites(&pdev->dev, top_misc_muxes, + ARRAY_SIZE(top_misc_muxes), base, &mt8365_clk_lock, clk_data); if (ret) goto unregister_muxes; =20 - for (i =3D 0; i !=3D ARRAY_SIZE(top_misc_muxes); ++i) { - struct mt8365_clk_audio_mux *mux =3D &top_misc_muxes[i]; - struct clk_hw *hw; - - hw =3D devm_clk_hw_register_mux(dev, mux->name, apll_i2s0_parents, - ARRAY_SIZE(apll_i2s0_parents), - CLK_SET_RATE_PARENT, base + 0x320, - mux->shift, 1, 0, NULL); - if (IS_ERR(hw)) { - ret =3D PTR_ERR(hw); - goto unregister_composites; - } - - clk_data->hws[mux->id] =3D hw; - } - ret =3D mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs), base, &mt8365_clk_lock, clk_data); if (ret) @@ -830,8 +812,8 @@ static int clk_mt8365_top_probe(struct platform_device = *pdev) mtk_clk_unregister_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs), clk_data); unregister_composites: - mtk_clk_unregister_composites(top_misc_mux_gates, - ARRAY_SIZE(top_misc_mux_gates), clk_data); + mtk_clk_unregister_composites(top_misc_muxes, + ARRAY_SIZE(top_misc_muxes), clk_data); unregister_muxes: mtk_clk_unregister_muxes(top_muxes, ARRAY_SIZE(top_muxes), clk_data); unregister_factors: --=20 2.39.1