From nobody Sat Sep 21 05:34:07 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 876A8C64EC4 for ; Mon, 20 Feb 2023 15:02:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232853AbjBTPCg (ORCPT ); Mon, 20 Feb 2023 10:02:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47794 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231925AbjBTPCH (ORCPT ); Mon, 20 Feb 2023 10:02:07 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5CF8120049; Mon, 20 Feb 2023 07:01:37 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id B02AA6602168; Mon, 20 Feb 2023 15:01:34 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1676905295; bh=vIDbGzqkfmXmHDtcPk514occm+SjmUa+rP1OcAWimTk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GqCY7QVjfLtl/X8E7KJ6+LyCn+rO2D+RBWCDO10FB82tB6plPynE9XjZC8DsbTftt l4lRW15Wru87dD0VyBgk/49SP0XIAIWQhPjEk4kZsQIuy7gFV5GSK8QEuHC7cFXKld uORta9eGJiX2WpxRYi7fyMNqlNJMH3ahXDagMyGrVieG8Iyv3vFfLS0cdCvIZBVu/+ 4OeFZNAsJOGD8Cd2yjBbwtot0PnjZ64V0OEpi/EYZs+8p6cat6V54jlIVvZ6VcAIwP uiNe+yFu8Fe0bDB0EkrP9ng3BYrCzHr8FXXiocNAKEP/QwDEKr7H3IGBSMdNC0a7Bf WSkyVy7FY2fhg== From: AngeloGioacchino Del Regno To: mturquette@baylibre.com Cc: sboyd@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, wenst@chromium.org, johnson.wang@mediatek.com, miles.chen@mediatek.com, chun-jie.chen@mediatek.com, daniel@makrotopia.org, fparent@baylibre.com, msp@baylibre.com, nfraprado@collabora.com, rex-bc.chen@mediatek.com, zhaojh329@gmail.com, sam.shih@mediatek.com, edward-jw.yang@mediatek.com, yangyingliang@huawei.com, granquet@baylibre.com, pablo.sun@mediatek.com, sean.wang@mediatek.com, chen.zhong@mediatek.com, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 14/55] clk: mediatek: mt8365: Convert to mtk_clk_simple_{probe,remove}() Date: Mon, 20 Feb 2023 16:00:30 +0100 Message-Id: <20230220150111.77897-15-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230220150111.77897-1-angelogioacchino.delregno@collabora.com> References: <20230220150111.77897-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" All clocks in this driver are supported by the common simple probe mechanism and it's now possible to migrate to it. While at it, also switch to using the module_platform_driver() macro. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- drivers/clk/mediatek/clk-mt8365.c | 241 +++++------------------------- 1 file changed, 37 insertions(+), 204 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt8365.c b/drivers/clk/mediatek/clk-m= t8365.c index fef6c653c9ce..208cdc157918 100644 --- a/drivers/clk/mediatek/clk-mt8365.c +++ b/drivers/clk/mediatek/clk-mt8365.c @@ -752,220 +752,53 @@ static const struct mtk_gate peri_clks[] =3D { &mtk_clk_gate_ops_no_setclr), }; =20 -static int clk_mt8365_top_probe(struct platform_device *pdev) -{ - void __iomem *base; - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - struct device *dev =3D &pdev->dev; - int ret; - int i; - - base =3D devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(base)) - return PTR_ERR(base); - - clk_data =3D mtk_alloc_clk_data(CLK_TOP_NR_CLK); - if (!clk_data) - return -ENOMEM; - - ret =3D mtk_clk_register_fixed_clks(top_fixed_clks, - ARRAY_SIZE(top_fixed_clks), clk_data); - if (ret) - goto free_clk_data; - - ret =3D mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), - clk_data); - if (ret) - goto unregister_fixed_clks; - - ret =3D mtk_clk_register_muxes(&pdev->dev, top_muxes, - ARRAY_SIZE(top_muxes), node, - &mt8365_clk_lock, clk_data); - if (ret) - goto unregister_factors; - - ret =3D mtk_clk_register_composites(&pdev->dev, top_misc_muxes, - ARRAY_SIZE(top_misc_muxes), base, - &mt8365_clk_lock, clk_data); - if (ret) - goto unregister_muxes; - - ret =3D mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs), - base, &mt8365_clk_lock, clk_data); - if (ret) - goto unregister_composites; - - ret =3D mtk_clk_register_gates(&pdev->dev, node, top_clk_gates, - ARRAY_SIZE(top_clk_gates), clk_data); - if (ret) - goto unregister_dividers; - - ret =3D of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - if (ret) - goto unregister_gates; - - return 0; -unregister_gates: - mtk_clk_unregister_gates(top_clk_gates, ARRAY_SIZE(top_clk_gates), clk_da= ta); -unregister_dividers: - mtk_clk_unregister_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs), - clk_data); -unregister_composites: - mtk_clk_unregister_composites(top_misc_muxes, - ARRAY_SIZE(top_misc_muxes), clk_data); -unregister_muxes: - mtk_clk_unregister_muxes(top_muxes, ARRAY_SIZE(top_muxes), clk_data); -unregister_factors: - mtk_clk_unregister_factors(top_divs, ARRAY_SIZE(top_divs), clk_data); -unregister_fixed_clks: - mtk_clk_unregister_fixed_clks(top_fixed_clks, - ARRAY_SIZE(top_fixed_clks), clk_data); -free_clk_data: - mtk_free_clk_data(clk_data); - - return ret; -} - -static int clk_mt8365_infra_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - int ret; - - clk_data =3D mtk_alloc_clk_data(CLK_IFR_NR_CLK); - if (!clk_data) - return -ENOMEM; - - ret =3D mtk_clk_register_gates(&pdev->dev, node, ifr_clks, - ARRAY_SIZE(ifr_clks), clk_data); - if (ret) - goto free_clk_data; - - ret =3D of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - if (ret) - goto unregister_gates; - - return 0; - -unregister_gates: - mtk_clk_unregister_gates(ifr_clks, ARRAY_SIZE(ifr_clks), clk_data); -free_clk_data: - mtk_free_clk_data(clk_data); - - return ret; -} - -static int clk_mt8365_peri_probe(struct platform_device *pdev) -{ - void __iomem *base; - struct clk_hw_onecell_data *clk_data; - struct device *dev =3D &pdev->dev; - struct device_node *node =3D dev->of_node; - int ret; - - base =3D devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(base)) - return PTR_ERR(base); - - clk_data =3D mtk_devm_alloc_clk_data(dev, CLK_PERI_NR_CLK); - if (!clk_data) - return -ENOMEM; - - - ret =3D mtk_clk_register_gates(&pdev->dev, node, peri_clks, - ARRAY_SIZE(peri_clks), clk_data); - if (ret) - return ret; - - ret =3D of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - - return ret; -} - -static int clk_mt8365_mcu_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - struct device_node *node =3D pdev->dev.of_node; - void __iomem *base; - int ret; - - base =3D devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(base)) - return PTR_ERR(base); - - clk_data =3D mtk_alloc_clk_data(CLK_MCU_NR_CLK); - if (!clk_data) - return -ENOMEM; - - ret =3D mtk_clk_register_composites(&pdev->dev, mcu_muxes, - ARRAY_SIZE(mcu_muxes), base, - &mt8365_clk_lock, clk_data); - if (ret) - goto free_clk_data; - - ret =3D of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - if (ret) - goto unregister_composites; +static const struct mtk_clk_desc topck_desc =3D { + .clks =3D top_clk_gates, + .num_clks =3D ARRAY_SIZE(top_clk_gates), + .fixed_clks =3D top_fixed_clks, + .num_fixed_clks =3D ARRAY_SIZE(top_fixed_clks), + .factor_clks =3D top_divs, + .num_factor_clks =3D ARRAY_SIZE(top_divs), + .mux_clks =3D top_muxes, + .num_mux_clks =3D ARRAY_SIZE(top_muxes), + .composite_clks =3D top_misc_muxes, + .num_composite_clks =3D ARRAY_SIZE(top_misc_muxes), + .divider_clks =3D top_adj_divs, + .num_divider_clks =3D ARRAY_SIZE(top_adj_divs), + .clk_lock =3D &mt8365_clk_lock, +}; =20 - return 0; +static const struct mtk_clk_desc infra_desc =3D { + .clks =3D ifr_clks, + .num_clks =3D ARRAY_SIZE(ifr_clks), +}; =20 -unregister_composites: - mtk_clk_unregister_composites(mcu_muxes, ARRAY_SIZE(mcu_muxes), - clk_data); -free_clk_data: - mtk_free_clk_data(clk_data); +static const struct mtk_clk_desc peri_desc =3D { + .clks =3D peri_clks, + .num_clks =3D ARRAY_SIZE(peri_clks), +}; =20 - return ret; -} +static const struct mtk_clk_desc mcu_desc =3D { + .composite_clks =3D mcu_muxes, + .num_composite_clks =3D ARRAY_SIZE(mcu_muxes), + .clk_lock =3D &mt8365_clk_lock, +}; =20 static const struct of_device_id of_match_clk_mt8365[] =3D { - { - .compatible =3D "mediatek,mt8365-topckgen", - .data =3D clk_mt8365_top_probe, - }, { - .compatible =3D "mediatek,mt8365-infracfg", - .data =3D clk_mt8365_infra_probe, - }, { - .compatible =3D "mediatek,mt8365-pericfg", - .data =3D clk_mt8365_peri_probe, - }, { - .compatible =3D "mediatek,mt8365-mcucfg", - .data =3D clk_mt8365_mcu_probe, - }, { - /* sentinel */ - } -}; - -static int clk_mt8365_probe(struct platform_device *pdev) -{ - int (*clk_probe)(struct platform_device *pdev); - int ret; - - clk_probe =3D of_device_get_match_data(&pdev->dev); - if (!clk_probe) - return -EINVAL; - - ret =3D clk_probe(pdev); - if (ret) - dev_err(&pdev->dev, - "%s: could not register clock provider: %d\n", - pdev->name, ret); - - return ret; -} + { .compatible =3D "mediatek,mt8365-topckgen", .data =3D &topck_desc }, + { .compatible =3D "mediatek,mt8365-infracfg", .data =3D &infra_desc }, + { .compatible =3D "mediatek,mt8365-pericfg", .data =3D &peri_desc }, + { .compatible =3D "mediatek,mt8365-mcucfg", .data =3D &mcu_desc }, + { /* sentinel */ } +}; =20 static struct platform_driver clk_mt8365_drv =3D { - .probe =3D clk_mt8365_probe, .driver =3D { .name =3D "clk-mt8365", .of_match_table =3D of_match_clk_mt8365, }, + .probe =3D mtk_clk_simple_probe, + .remove =3D mtk_clk_simple_remove, }; - -static int __init clk_mt8365_init(void) -{ - return platform_driver_register(&clk_mt8365_drv); -} -arch_initcall(clk_mt8365_init); +module_platform_driver(clk_mt8365_drv); MODULE_LICENSE("GPL"); --=20 2.39.1