From nobody Tue Sep 9 17:14:38 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 675F5C636CC for ; Mon, 20 Feb 2023 11:15:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231769AbjBTLPC (ORCPT ); Mon, 20 Feb 2023 06:15:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39210 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231771AbjBTLOr (ORCPT ); Mon, 20 Feb 2023 06:14:47 -0500 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 25EA918A87; Mon, 20 Feb 2023 03:14:32 -0800 (PST) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 31KBEKjT016913; Mon, 20 Feb 2023 05:14:20 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1676891660; bh=NXBtGTnmU6MEU5MwPKrhSePF79GF6ekGtgCVFCB1og8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=p7Q6DLmPjp5X6tQbMRAfSrqzZNGvdynJOrWqxV4nB0O+9sGTzLEWfBOYLDtouH2XF UM/oYKgahQ8qcR1tuqZJLfgwfqroD6BRtKxWo0gSpINMLT7wF3A1VGmx7NSZKv2Eat Km/ZZXePJtjXdWvK5zrLtG0OQ+1GB2KL92+2TAmA= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 31KBEKdq016429 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 20 Feb 2023 05:14:20 -0600 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Mon, 20 Feb 2023 05:14:20 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Mon, 20 Feb 2023 05:14:20 -0600 Received: from uda0500640.dal.design.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 31KBE983068490; Mon, 20 Feb 2023 05:14:16 -0600 From: Ravi Gunasekaran To: , , , , , , , CC: , , Subject: [PATCH v9 2/9] arm64: dts: ti: k3-j721s2-main: Add support for USB Date: Mon, 20 Feb 2023 16:44:01 +0530 Message-ID: <20230220111408.9476-3-r-gunasekaran@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230220111408.9476-1-r-gunasekaran@ti.com> References: <20230220111408.9476-1-r-gunasekaran@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Aswath Govindraju Add support for single instance of USB 3.0 controller in J721S2 SoC. Signed-off-by: Aswath Govindraju Signed-off-by: Matt Ranostay Link: https://lore.kernel.org/r/20221122101616.770050-2-mranostay@ti.com Signed-off-by: Ravi Gunasekaran Reviewed-by tag. --- I had reviewed this patch in the v5 series [1]. Since I'm taking over upstreaming this series, I removed the self Reviewed-by tag. Links: [1] - https://lore.kernel.org/all/134c28a0-2d49-549c-dc8d-0887d8fd29c3@ti.c= om/ arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 42 ++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/d= ts/ti/k3-j721s2-main.dtsi index 8915132efcc1..c0daa75116f9 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -26,6 +26,20 @@ }; }; =20 + scm_conf: syscon@104000 { + compatible =3D "ti,j721e-system-controller", "syscon", "simple-mfd"; + reg =3D <0x00 0x00104000 0x00 0x18000>; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges =3D <0x00 0x00 0x00104000 0x18000>; + + usb_serdes_mux: mux-controller@0 { + compatible =3D "mmio-mux"; + #mux-control-cells =3D <1>; + mux-reg-masks =3D <0x0 0x8000000>; /* USB0 to SERDES0 lane 1/3 mux */ + }; + }; + gic500: interrupt-controller@1800000 { compatible =3D "arm,gic-v3"; #address-cells =3D <2>; @@ -745,6 +759,34 @@ }; }; =20 + usbss0: cdns-usb@4104000 { + compatible =3D "ti,j721e-usb"; + reg =3D <0x00 0x04104000 0x00 0x100>; + clocks =3D <&k3_clks 360 16>, <&k3_clks 360 15>; + clock-names =3D "ref", "lpm"; + assigned-clocks =3D <&k3_clks 360 16>; /* USB2_REFCLK */ + assigned-clock-parents =3D <&k3_clks 360 17>; + power-domains =3D <&k3_pds 360 TI_SCI_PD_EXCLUSIVE>; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + dma-coherent; + + usb0: usb@6000000 { + compatible =3D "cdns,usb3"; + reg =3D <0x00 0x06000000 0x00 0x10000>, + <0x00 0x06010000 0x00 0x10000>, + <0x00 0x06020000 0x00 0x10000>; + reg-names =3D "otg", "xhci", "dev"; + interrupts =3D , + , + ; + interrupt-names =3D "host", "peripheral", "otg"; + maximum-speed =3D "super-speed"; + dr_mode =3D "otg"; + }; + }; + main_mcan0: can@2701000 { compatible =3D "bosch,m_can"; reg =3D <0x00 0x02701000 0x00 0x200>, --=20 2.17.1