From nobody Thu Sep 11 14:17:25 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 70AA5C05027 for ; Fri, 17 Feb 2023 18:53:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229716AbjBQSxH (ORCPT ); Fri, 17 Feb 2023 13:53:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52428 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229689AbjBQSxA (ORCPT ); Fri, 17 Feb 2023 13:53:00 -0500 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [IPv6:2a00:1450:4864:20::332]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0633DB47E; Fri, 17 Feb 2023 10:52:59 -0800 (PST) Received: by mail-wm1-x332.google.com with SMTP id m21-20020a05600c3b1500b003e1f5f2a29cso1669122wms.4; Fri, 17 Feb 2023 10:52:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CNEF4fipdoHCuo0/Rmv+9N9jdN1WQtjB48jcLvFIJM0=; b=OOf1QpSOIHQet9Z855DB1KvVOZV7THJ0Rp4RGA7bYB63FSuZCk5geY2X2z3jZpOXvb TwYuhtKLKVxOFcIDFIKAUAurb0ExHImNkalYjmFY2Rt3a3iqX9Djl63phjmYt7mqo+l9 n/LlON1GPytkE2pagZEKsrMSMM923YE+UJLVLIFRWIFe2IbvVMs/8D/ZQ+zy+FjBtVVr hZ35KKgzCWfOpB/50WA1g0W7igIHf+MblBJAWkTVTl7vEBWwTd+BAlEhsXDnr6NWH8+o IRji+5aiSNWCUD2AirGx70z4QG5mRLZkVD1dVW4c4w2Rd1Y9ja717zvnD8S+kQyRvotd g8DQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CNEF4fipdoHCuo0/Rmv+9N9jdN1WQtjB48jcLvFIJM0=; b=mT5leV/Ni0mOFa3sdn/RNj3H1+FOCWmRWloMGf/iJw44nxLg473IflrE/al7OPirrl 86crI7brmIb/MOR6D4Gj5DW8v34qg4+9e2xXER2pOewQxRPa5qBKDOgFIyat4yxj5cvR RUZqAarWdXe2euG8dlO+pHzuZoJrcZ8OwUiNdUtP8xvSqLMzpkcq8J43Hnk2Sf1VHoJ9 ZkTiG5+gG24sA5CamUbCp7uSZgxzcdpnGVpsRXTDcaGLIwmBBxLd0oISIdQKUVdAhexe CG9Me+1qDW1gxcEAsNUznNzrk/vgIE5YCqctXv0vP50TF/zGD9yEk7Kn92CN8jE8Swu/ JwIA== X-Gm-Message-State: AO0yUKWJc9SSA3w8N8TPVGD0fTxi846cLgiN7ZxzmcZiK75kH5ATGtCr q2HVtti+iDQ9cMnrgWkYJ/I= X-Google-Smtp-Source: AK7set/HQOxX57eReSaexgzyj9+zEziOHOg6F2mkRMYC/iABeacCkHDexTxzBR/lDcupAVxTveVafQ== X-Received: by 2002:a7b:ce0d:0:b0:3dc:576c:ab07 with SMTP id m13-20020a7bce0d000000b003dc576cab07mr1970177wmc.14.1676659977422; Fri, 17 Feb 2023 10:52:57 -0800 (PST) Received: from prasmi.home ([2a00:23c8:2501:c701:d8bd:e692:c27f:c09d]) by smtp.gmail.com with ESMTPSA id l37-20020a05600c1d2500b003db0ad636d1sm2964514wms.28.2023.02.17.10.52.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Feb 2023 10:52:56 -0800 (PST) From: Prabhakar X-Google-Original-From: Prabhakar To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Jaroslav Kysela , Takashi Iwai Cc: alsa-devel@alsa-project.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Lad Prabhakar Subject: [PATCH 1/4] ASoC: dt-bindings: renesas,rz-ssi: Update interrupts and interrupt-names properties Date: Fri, 17 Feb 2023 18:52:22 +0000 Message-Id: <20230217185225.43310-2-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230217185225.43310-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20230217185225.43310-1-prabhakar.mahadev-lad.rj@bp.renesas.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Lad Prabhakar From R01UH0914EJ0120 Rev.1.20 HW manual, for full duplex channels (SSI0/1/3) dma_rt interrupt has now being marked as reserved and similarly for half duplex channel (SSI2) dma_rx and dma_tx interrupts have now being marked as reserved (this applies to RZ/G2L and alike SoC's). This patch updates the binding doc to match the same. While at it also updated the example node. Signed-off-by: Lad Prabhakar Reviewed-by: Biju Das Acked-by: Krzysztof Kozlowski --- .../bindings/sound/renesas,rz-ssi.yaml | 21 +++++++++++-------- 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml b/= Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml index 196881d94396..3b5ae45eee4a 100644 --- a/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml +++ b/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml @@ -25,14 +25,18 @@ properties: maxItems: 1 =20 interrupts: - maxItems: 4 + minItems: 2 + maxItems: 3 =20 interrupt-names: - items: - - const: int_req - - const: dma_rx - - const: dma_tx - - const: dma_rt + oneOf: + - items: + - const: int_req + - const: dma_rx + - const: dma_tx + - items: + - const: int_req + - const: dma_rt =20 clocks: maxItems: 4 @@ -106,9 +110,8 @@ examples: reg =3D <0x10049c00 0x400>; interrupts =3D , , - , - ; - interrupt-names =3D "int_req", "dma_rx", "dma_tx", "dma_rt"; + ; + interrupt-names =3D "int_req", "dma_rx", "dma_tx"; clocks =3D <&cpg CPG_MOD R9A07G044_SSI0_PCLK2>, <&cpg CPG_MOD R9A07G044_SSI0_PCLK_SFR>, <&audio_clk1>, --=20 2.25.1 From nobody Thu Sep 11 14:17:25 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 57F69C636D6 for ; Fri, 17 Feb 2023 18:53:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229744AbjBQSxK (ORCPT ); Fri, 17 Feb 2023 13:53:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52648 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229712AbjBQSxE (ORCPT ); Fri, 17 Feb 2023 13:53:04 -0500 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [IPv6:2a00:1450:4864:20::32e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C491D1448C; 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Fri, 17 Feb 2023 10:52:57 -0800 (PST) From: Prabhakar X-Google-Original-From: Prabhakar To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Jaroslav Kysela , Takashi Iwai Cc: alsa-devel@alsa-project.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Lad Prabhakar Subject: [PATCH 2/4] ASoC: sh: rz-ssi: Update interrupt handling for half duplex channels Date: Fri, 17 Feb 2023 18:52:23 +0000 Message-Id: <20230217185225.43310-3-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230217185225.43310-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20230217185225.43310-1-prabhakar.mahadev-lad.rj@bp.renesas.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Lad Prabhakar For half duplex channels we dont have separate interrupts for Tx and Rx instead we have single interrupt Rt (where the signal for Rx and Tx is muxed). To handle such a case install a handler in case we have a dma_rt interrupt specified in the DT for the PIO mode. Note, for backward compatibility we check if the Rx and Tx interrupts are present first instead of checking Rt interrupt. Signed-off-by: Lad Prabhakar Reviewed-by: Biju Das --- sound/soc/sh/rz-ssi.c | 63 ++++++++++++++++++++++++++++++------------- 1 file changed, 44 insertions(+), 19 deletions(-) diff --git a/sound/soc/sh/rz-ssi.c b/sound/soc/sh/rz-ssi.c index 5d6bae33ae34..d502aa55c5a8 100644 --- a/sound/soc/sh/rz-ssi.c +++ b/sound/soc/sh/rz-ssi.c @@ -109,6 +109,7 @@ struct rz_ssi_priv { int irq_int; int irq_tx; int irq_rx; + int irq_rt; =20 spinlock_t lock; =20 @@ -565,6 +566,17 @@ static irqreturn_t rz_ssi_interrupt(int irq, void *dat= a) rz_ssi_reg_mask_setl(ssi, SSIFSR, SSIFSR_RDF, 0); } =20 + if (irq =3D=3D ssi->irq_rt) { + struct snd_pcm_substream *substream =3D strm->substream; + + if (rz_ssi_stream_is_play(ssi, substream)) { + strm->transfer(ssi, &ssi->playback); + } else { + strm->transfer(ssi, &ssi->capture); + rz_ssi_reg_mask_setl(ssi, SSIFSR, SSIFSR_RDF, 0); + } + } + return IRQ_HANDLED; } =20 @@ -993,26 +1005,39 @@ static int rz_ssi_probe(struct platform_device *pdev) if (!rz_ssi_is_dma_enabled(ssi)) { /* Tx and Rx interrupts (pio only) */ ssi->irq_tx =3D platform_get_irq_byname(pdev, "dma_tx"); - if (ssi->irq_tx < 0) - return ssi->irq_tx; - - ret =3D devm_request_irq(&pdev->dev, ssi->irq_tx, - &rz_ssi_interrupt, 0, - dev_name(&pdev->dev), ssi); - if (ret < 0) - return dev_err_probe(&pdev->dev, ret, - "irq request error (dma_tx)\n"); - ssi->irq_rx =3D platform_get_irq_byname(pdev, "dma_rx"); - if (ssi->irq_rx < 0) - return ssi->irq_rx; - - ret =3D devm_request_irq(&pdev->dev, ssi->irq_rx, - &rz_ssi_interrupt, 0, - dev_name(&pdev->dev), ssi); - if (ret < 0) - return dev_err_probe(&pdev->dev, ret, - "irq request error (dma_rx)\n"); + if (ssi->irq_tx =3D=3D -ENXIO && ssi->irq_rx =3D=3D -ENXIO) { + ssi->irq_rt =3D platform_get_irq_byname(pdev, "dma_rt"); + if (ssi->irq_rt < 0) + return ssi->irq_rt; + + ret =3D devm_request_irq(&pdev->dev, ssi->irq_rt, + &rz_ssi_interrupt, 0, + dev_name(&pdev->dev), ssi); + if (ret < 0) + return dev_err_probe(&pdev->dev, ret, + "irq request error (dma_tx)\n"); + } else { + if (ssi->irq_tx < 0) + return ssi->irq_tx; + + if (ssi->irq_rx < 0) + return ssi->irq_rx; + + ret =3D devm_request_irq(&pdev->dev, ssi->irq_tx, + &rz_ssi_interrupt, 0, + dev_name(&pdev->dev), ssi); + if (ret < 0) + return dev_err_probe(&pdev->dev, ret, + "irq request error (dma_tx)\n"); + + ret =3D devm_request_irq(&pdev->dev, ssi->irq_rx, + &rz_ssi_interrupt, 0, + dev_name(&pdev->dev), ssi); + if (ret < 0) + return dev_err_probe(&pdev->dev, ret, + "irq request error (dma_rx)\n"); + } } =20 ssi->rstc =3D devm_reset_control_get_exclusive(&pdev->dev, NULL); --=20 2.25.1 From nobody Thu Sep 11 14:17:25 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05035C636D6 for ; Fri, 17 Feb 2023 18:53:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229640AbjBQSxY (ORCPT ); Fri, 17 Feb 2023 13:53:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52766 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229706AbjBQSxG (ORCPT ); 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Fri, 17 Feb 2023 10:52:58 -0800 (PST) From: Prabhakar X-Google-Original-From: Prabhakar To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Jaroslav Kysela , Takashi Iwai Cc: alsa-devel@alsa-project.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Lad Prabhakar Subject: [PATCH 3/4] arm64: dts: renesas: r9a07g044: Update IRQ numbers for SSI channels Date: Fri, 17 Feb 2023 18:52:24 +0000 Message-Id: <20230217185225.43310-4-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230217185225.43310-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20230217185225.43310-1-prabhakar.mahadev-lad.rj@bp.renesas.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Lad Prabhakar From R01UH0914EJ0120 Rev.1.20 HW manual the interrupt numbers for SSI channels have been updated, SPI 329 - SSIF0 is now marked as reserved SPI 333 - SSIF1 is now marked as reserved SPI 335 - SSIF2 is now marked as reserved SPI 336 - SSIF2 is now marked as reserved SPI 341 - SSIF3 is now marked as reserved This patch drops the above IRQs from SoC DTSI. Fixes: 92a341315afc9 ("arm64: dts: renesas: r9a07g044: Add SSI support") Signed-off-by: Lad Prabhakar Reviewed-by: Biju Das Reviewed-by: Geert Uytterhoeven --- Hi Geert, As this is is a fixes patch and we are still waiting for [0] to be merged shall do the same for V2L SoC? [0] https://patchwork.kernel.org/project/linux-renesas-soc/cover/2023013122= 3529.11905-1-prabhakar.mahadev-lad.rj@bp.renesas.com/ Cheers, Prabhakar --- arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 19 +++++++------------ 1 file changed, 7 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/d= ts/renesas/r9a07g044.dtsi index 68bd70210d08..9945dcf38031 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi @@ -184,9 +184,8 @@ ssi0: ssi@10049c00 { reg =3D <0 0x10049c00 0 0x400>; interrupts =3D , , - , - ; - interrupt-names =3D "int_req", "dma_rx", "dma_tx", "dma_rt"; + ; + interrupt-names =3D "int_req", "dma_rx", "dma_tx"; clocks =3D <&cpg CPG_MOD SOC_PREFIX(SSI0_PCLK2)>, <&cpg CPG_MOD SOC_PREFIX(SSI0_PCLK_SFR)>, <&audio_clk1>, <&audio_clk2>; @@ -205,9 +204,8 @@ ssi1: ssi@1004a000 { reg =3D <0 0x1004a000 0 0x400>; interrupts =3D , , - , - ; - interrupt-names =3D "int_req", "dma_rx", "dma_tx", "dma_rt"; + ; + interrupt-names =3D "int_req", "dma_rx", "dma_tx"; clocks =3D <&cpg CPG_MOD SOC_PREFIX(SSI1_PCLK2)>, <&cpg CPG_MOD SOC_PREFIX(SSI1_PCLK_SFR)>, <&audio_clk1>, <&audio_clk2>; @@ -225,10 +223,8 @@ ssi2: ssi@1004a400 { "renesas,rz-ssi"; reg =3D <0 0x1004a400 0 0x400>; interrupts =3D , - , - , ; - interrupt-names =3D "int_req", "dma_rx", "dma_tx", "dma_rt"; + interrupt-names =3D "int_req", "dma_rt"; clocks =3D <&cpg CPG_MOD SOC_PREFIX(SSI2_PCLK2)>, <&cpg CPG_MOD SOC_PREFIX(SSI2_PCLK_SFR)>, <&audio_clk1>, <&audio_clk2>; @@ -247,9 +243,8 @@ ssi3: ssi@1004a800 { reg =3D <0 0x1004a800 0 0x400>; interrupts =3D , , - , - ; - interrupt-names =3D "int_req", "dma_rx", "dma_tx", "dma_rt"; + ; + interrupt-names =3D "int_req", "dma_rx", "dma_tx"; clocks =3D <&cpg CPG_MOD SOC_PREFIX(SSI3_PCLK2)>, <&cpg CPG_MOD SOC_PREFIX(SSI3_PCLK_SFR)>, <&audio_clk1>, <&audio_clk2>; --=20 2.25.1 From nobody Thu Sep 11 14:17:25 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 68E87C636D6 for ; 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Fri, 17 Feb 2023 10:52:59 -0800 (PST) From: Prabhakar X-Google-Original-From: Prabhakar To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Jaroslav Kysela , Takashi Iwai Cc: alsa-devel@alsa-project.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Lad Prabhakar Subject: [PATCH 4/4] arm64: dts: renesas: r9a07g043: Update IRQ numbers for SSI channels Date: Fri, 17 Feb 2023 18:52:25 +0000 Message-Id: <20230217185225.43310-5-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230217185225.43310-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20230217185225.43310-1-prabhakar.mahadev-lad.rj@bp.renesas.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Lad Prabhakar From R01UH0968EJ0100 Rev.1.00 HW manual the interrupt numbers for SSI channels have been updated, SPI 329 - SSIF0 is now marked as reserved SPI 333 - SSIF1 is now marked as reserved SPI 335 - SSIF2 is now marked as reserved SPI 336 - SSIF2 is now marked as reserved SPI 341 - SSIF3 is now marked as reserved This patch drops the above IRQs from SoC DTSI. Fixes: 559f2b0708c70 ("arm64: dts: renesas: r9a07g043: Add SSI{1,2,3} nodes= and fillup the SSI0 stub node") Signed-off-by: Lad Prabhakar Reviewed-by: Biju Das Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 19 +++++++------------ 1 file changed, 7 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/d= ts/renesas/r9a07g043.dtsi index c8a83e42c4f3..a9700654b421 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi @@ -80,9 +80,8 @@ ssi0: ssi@10049c00 { reg =3D <0 0x10049c00 0 0x400>; interrupts =3D , , - , - ; - interrupt-names =3D "int_req", "dma_rx", "dma_tx", "dma_rt"; + ; + interrupt-names =3D "int_req", "dma_rx", "dma_tx"; clocks =3D <&cpg CPG_MOD R9A07G043_SSI0_PCLK2>, <&cpg CPG_MOD R9A07G043_SSI0_PCLK_SFR>, <&audio_clk1>, <&audio_clk2>; @@ -101,9 +100,8 @@ ssi1: ssi@1004a000 { reg =3D <0 0x1004a000 0 0x400>; interrupts =3D , , - , - ; - interrupt-names =3D "int_req", "dma_rx", "dma_tx", "dma_rt"; + ; + interrupt-names =3D "int_req", "dma_rx", "dma_tx"; clocks =3D <&cpg CPG_MOD R9A07G043_SSI1_PCLK2>, <&cpg CPG_MOD R9A07G043_SSI1_PCLK_SFR>, <&audio_clk1>, <&audio_clk2>; @@ -121,10 +119,8 @@ ssi2: ssi@1004a400 { "renesas,rz-ssi"; reg =3D <0 0x1004a400 0 0x400>; interrupts =3D , - , - , ; - interrupt-names =3D "int_req", "dma_rx", "dma_tx", "dma_rt"; + interrupt-names =3D "int_req", "dma_rt"; clocks =3D <&cpg CPG_MOD R9A07G043_SSI2_PCLK2>, <&cpg CPG_MOD R9A07G043_SSI2_PCLK_SFR>, <&audio_clk1>, <&audio_clk2>; @@ -143,9 +139,8 @@ ssi3: ssi@1004a800 { reg =3D <0 0x1004a800 0 0x400>; interrupts =3D , , - , - ; - interrupt-names =3D "int_req", "dma_rx", "dma_tx", "dma_rt"; + ; + interrupt-names =3D "int_req", "dma_rx", "dma_tx"; clocks =3D <&cpg CPG_MOD R9A07G043_SSI3_PCLK2>, <&cpg CPG_MOD R9A07G043_SSI3_PCLK_SFR>, <&audio_clk1>, <&audio_clk2>; --=20 2.25.1