From nobody Thu Sep 11 20:29:47 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 39B49C678D5 for ; Tue, 7 Mar 2023 12:51:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229768AbjCGMv5 (ORCPT ); Tue, 7 Mar 2023 07:51:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45982 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229716AbjCGMvs (ORCPT ); Tue, 7 Mar 2023 07:51:48 -0500 Received: from sin.source.kernel.org (sin.source.kernel.org [145.40.73.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EE6807E7B9; Tue, 7 Mar 2023 04:51:45 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id F343CCE1B6B; Tue, 7 Mar 2023 12:51:43 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6B388C4339C; Tue, 7 Mar 2023 12:51:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1678193502; bh=IWd9Oaqk5hzYFUwF9cR13Rf1+gfQ9UgDEiSB8uRtlwg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=KuYImHCaJquf8HqMPScaiJR2lp6W9mEzEi2yRdjmKK5D3XZKvMg6AihfABaeD968M TY09FqIyWmqvkG7NtgrLjWk9SyWH0kaSBGcfBnSthzapM11OAJy6q3AbByI59YUD/0 WOwZkD23mGez0LDxfKB7GjoAksjwCSLB08d3D5JssyHpPNHj/mz0C7zb3fIlb9OPP5 jcxk9CzuHaOmV4js5PlYkFYD45CUOSZhNHeNK9QIBlQCsx2Fy83OrEdzq8hUcXVg3M JWMtnC82WcbVRps6ET9v6+RfYESDJyVG1hudBbMuFiW+r704krFViD1vnEw2rSlzuI pNCFPOYfSn2xA== From: Mark Brown Date: Tue, 07 Mar 2023 12:51:27 +0000 Subject: [PATCH v2 1/2] pinctrl: at91: Make the irqchip immutable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230216-gpio-at91-immutable-v2-1-326ef362dbc7@kernel.org> References: <20230216-gpio-at91-immutable-v2-0-326ef362dbc7@kernel.org> In-Reply-To: <20230216-gpio-at91-immutable-v2-0-326ef362dbc7@kernel.org> To: Ludovic Desroches , Linus Walleij , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea Cc: linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Mark Brown X-Mailer: b4 0.13-dev-bd1bf X-Developer-Signature: v=1; a=openpgp-sha256; l=3089; i=broonie@kernel.org; h=from:subject:message-id; bh=IWd9Oaqk5hzYFUwF9cR13Rf1+gfQ9UgDEiSB8uRtlwg=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBkBzNY63owOkiJaom5NFGp8rCdUFUBiegMB560vrfl bxsbYZOJATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCZAczWAAKCRAk1otyXVSH0DqmB/ 9FfOXcyy58/Rbpojezo69U1IdBDCuGIKXNWUAD8rhQ04A51vGcPJH1uP92wZQRDoAMOGlptJ2N3XoU atoktWYBmuySTr0ytbtCQSSJnt+thvZ8KdKk5KyS/Qbx0F5czs1mvr7dVAMPCTIaP06fr7sTMDx/Ia MnPHKXpJ4Zb8xVQfntaDUq5VKTwo4fQOKkiODY2MN0cv7atX7MtKSYBW+LP3Ek+B6SBHf8o+0SYpSS rdCB350gmNxrNWwFMhbpLt283eqbme3C4DxP6AjJbxvJUgBi/Y0uvBSiue9QqyO04aGkVNikHFbbqU qA2nteO9PusPnDgo8SD3NxLe6umP0Q X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org To help gpiolib not fiddle around with the internals of the irqchip flag the chip as immutable, adding the calls into the gpiolib core required to do so. Signed-off-by: Mark Brown --- drivers/pinctrl/pinctrl-at91.c | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c index 79b7061fc8f3..1e083fc7666b 100644 --- a/drivers/pinctrl/pinctrl-at91.c +++ b/drivers/pinctrl/pinctrl-at91.c @@ -1526,6 +1526,20 @@ static void at91_gpio_dbg_show(struct seq_file *s, s= truct gpio_chip *chip) #define at91_gpio_dbg_show NULL #endif =20 +static int gpio_irq_request_resources(struct irq_data *d) +{ + struct at91_gpio_chip *at91_gpio =3D irq_data_get_irq_chip_data(d); + + return gpiochip_lock_as_irq(&at91_gpio->chip, irqd_to_hwirq(d)); +} + +static void gpio_irq_release_resources(struct irq_data *d) +{ + struct at91_gpio_chip *at91_gpio =3D irq_data_get_irq_chip_data(d); + + gpiochip_unlock_as_irq(&at91_gpio->chip, irqd_to_hwirq(d)); +} + /* Several AIC controller irqs are dispatched through this GPIO handler. * To use any AT91_PIN_* as an externally triggered IRQ, first call * at91_set_gpio_input() then maybe enable its glitch filter. @@ -1545,6 +1559,9 @@ static void gpio_irq_mask(struct irq_data *d) struct at91_gpio_chip *at91_gpio =3D irq_data_get_irq_chip_data(d); void __iomem *pio =3D at91_gpio->regbase; unsigned mask =3D 1 << d->hwirq; + unsigned gpio =3D irqd_to_hwirq(d); + + gpiochip_disable_irq(&at91_gpio->chip, gpio); =20 if (pio) writel_relaxed(mask, pio + PIO_IDR); @@ -1555,6 +1572,9 @@ static void gpio_irq_unmask(struct irq_data *d) struct at91_gpio_chip *at91_gpio =3D irq_data_get_irq_chip_data(d); void __iomem *pio =3D at91_gpio->regbase; unsigned mask =3D 1 << d->hwirq; + unsigned gpio =3D irqd_to_hwirq(d); + + gpiochip_enable_irq(&at91_gpio->chip, gpio); =20 if (pio) writel_relaxed(mask, pio + PIO_IER); @@ -1721,12 +1741,15 @@ static int at91_gpio_of_irq_setup(struct platform_d= evice *pdev, at91_gpio->pioc_hwirq =3D irqd_to_hwirq(d); =20 gpio_irqchip->name =3D "GPIO"; + gpio_irqchip->irq_request_resources =3D gpio_irq_request_resources; + gpio_irqchip->irq_release_resources =3D gpio_irq_release_resources; gpio_irqchip->irq_ack =3D gpio_irq_ack; gpio_irqchip->irq_disable =3D gpio_irq_mask; gpio_irqchip->irq_mask =3D gpio_irq_mask; gpio_irqchip->irq_unmask =3D gpio_irq_unmask; gpio_irqchip->irq_set_wake =3D pm_ptr(gpio_irq_set_wake); gpio_irqchip->irq_set_type =3D at91_gpio->ops->irq_type; + gpio_irqchip->flags =3D IRQCHIP_IMMUTABLE; =20 /* Disable irqs of this PIO controller */ writel_relaxed(~0, at91_gpio->regbase + PIO_IDR); @@ -1737,7 +1760,7 @@ static int at91_gpio_of_irq_setup(struct platform_dev= ice *pdev, * interrupt. */ girq =3D &at91_gpio->chip.irq; - girq->chip =3D gpio_irqchip; + gpio_irq_chip_set_chip(girq, gpio_irqchip); girq->default_type =3D IRQ_TYPE_NONE; girq->handler =3D handle_edge_irq; =20 --=20 2.30.2