From nobody Thu Sep 11 20:29:52 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C0FEC636CC for ; Thu, 16 Feb 2023 09:37:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230007AbjBPJhM (ORCPT ); Thu, 16 Feb 2023 04:37:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48154 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230037AbjBPJhJ (ORCPT ); Thu, 16 Feb 2023 04:37:09 -0500 Received: from mail-lf1-x129.google.com (mail-lf1-x129.google.com [IPv6:2a00:1450:4864:20::129]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 67CEA3B666 for ; Thu, 16 Feb 2023 01:37:07 -0800 (PST) Received: by mail-lf1-x129.google.com with SMTP id j17so2050539lfr.3 for ; Thu, 16 Feb 2023 01:37:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=socMBmV/RtzXdC0lENqhNAKtiRaFWq2x7qFneE75pvo=; b=CIEs55h+qegmVCQQtvSRFL7kkeH+n1eQEXzGWKvslE0c0ZGnl4tZJVn/G/ZveZVNXi G16QjP6aWUW1Fn3Iw6Ldy3JlsMlH1s3slkjVwl7aO+beFJ13JTeYhQzshPByQ9EC35KW 6Me3e0BI5Dcoz4+o1pjiUZ/wnCxlhW4XHe4ngqRrI9t/LzyL/6iy2nm9MLsGl6NiMwzN NAQGLltNargU3RS/cc8YdMWjspyKkY/Xmc5WXHaZZhgoLOMQPvvO0rIS0hqRDAuIcj10 xczHKBRvI9HaL0XTXHiO8l/3qPoahVtdwH0hR/aCGxGR77E+/E5K8T4AsNFxpZD7TsIS bTAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=socMBmV/RtzXdC0lENqhNAKtiRaFWq2x7qFneE75pvo=; b=nmiaqp0FnTpyxkdsjzfAlhCSZnHjS1W0RfakX67/ft9QHDqMClu7tM6+YIeEJHUYoQ fdhXERiSoMVelpKTSGPR5SUteJND7YgA7seDNsfHk3om+FudrlC+MCfUZvRk6HCXRX71 8YIiCO1d9WCY05QGIhAwDQMrdxFH4NE9ETU7umVNSt2l25QQvA1AM2ho69JH1+inBCfW uC160BqyursQ4zakrRpShdP6aE3XtXxYEwPU6/bDSXorSlSFar8mnm9T8Cq8q9WxJEQ4 gBOQEMg7PiZxnpVARSLZAUaefD5we6l/98HTvjT7Gntp/d1JQsFvC5GdFlTrx9XQvtxw Z6Ig== X-Gm-Message-State: AO0yUKXXRGIH24h0/mD85TCGgMWUM8gahDGPx7ndGDm5mWWKo08KQ5CI jtrnNUmasyGrWbjcn8/nKJFppA== X-Google-Smtp-Source: AK7set+ZbKFnwzlE7WSgdc2N9QgzemmI+prUvUkugK9IyS4roaQBmY5qLq4edobITtzsUKzBjELvLw== X-Received: by 2002:ac2:53a8:0:b0:4b5:178f:a14c with SMTP id j8-20020ac253a8000000b004b5178fa14cmr1412575lfh.16.1676540225687; Thu, 16 Feb 2023 01:37:05 -0800 (PST) Received: from [127.0.1.1] ([85.235.12.219]) by smtp.gmail.com with ESMTPSA id r3-20020a19ac43000000b004d8758a452asm229069lfc.288.2023.02.16.01.37.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 01:37:05 -0800 (PST) From: Linus Walleij Date: Thu, 16 Feb 2023 10:37:02 +0100 Subject: [PATCH 01/17] gpio: altera: Convert to immutable irq_chip MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230215-immutable-chips-v1-1-51a8f224a5d0@linaro.org> References: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> In-Reply-To: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> To: Mun Yew Tham , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Alban Bedel , Orson Zhai , Baolin Wang , Chunyan Zhang , Jay Fang , Daniel Palmer , Romain Perier , Grygorii Strashko , Santosh Shilimkar , Kevin Hilman , William Breathitt Gray Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-omap@vger.kernel.org, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the driver to immutable irq-chip with a bit of intuition. Cc: Marc Zyngier Signed-off-by: Linus Walleij Acked-by: Marc Zyngier --- drivers/gpio/gpio-altera.c | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/drivers/gpio/gpio-altera.c b/drivers/gpio/gpio-altera.c index b59fae993626..c1599edb3453 100644 --- a/drivers/gpio/gpio-altera.c +++ b/drivers/gpio/gpio-altera.c @@ -24,14 +24,12 @@ * @interrupt_trigger : specifies the hardware configured IRQ trigger type * (rising, falling, both, high) * @mapped_irq : kernel mapped irq number. -* @irq_chip : IRQ chip configuration */ struct altera_gpio_chip { struct of_mm_gpio_chip mmchip; raw_spinlock_t gpio_lock; int interrupt_trigger; int mapped_irq; - struct irq_chip irq_chip; }; =20 static void altera_gpio_irq_unmask(struct irq_data *d) @@ -43,6 +41,7 @@ static void altera_gpio_irq_unmask(struct irq_data *d) =20 altera_gc =3D gpiochip_get_data(irq_data_get_irq_chip_data(d)); mm_gc =3D &altera_gc->mmchip; + gpiochip_enable_irq(&mm_gc->gc, irqd_to_hwirq(d)); =20 raw_spin_lock_irqsave(&altera_gc->gpio_lock, flags); intmask =3D readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK); @@ -68,6 +67,7 @@ static void altera_gpio_irq_mask(struct irq_data *d) intmask &=3D ~BIT(irqd_to_hwirq(d)); writel(intmask, mm_gc->regs + ALTERA_GPIO_IRQ_MASK); raw_spin_unlock_irqrestore(&altera_gc->gpio_lock, flags); + gpiochip_disable_irq(&mm_gc->gc, irqd_to_hwirq(d)); } =20 /* @@ -233,6 +233,17 @@ static void altera_gpio_irq_leveL_high_handler(struct = irq_desc *desc) chained_irq_exit(chip, desc); } =20 +static const struct irq_chip altera_gpio_irq_chip =3D { + .name =3D "altera-gpio", + .irq_mask =3D altera_gpio_irq_mask, + .irq_unmask =3D altera_gpio_irq_unmask, + .irq_set_type =3D altera_gpio_irq_set_type, + .irq_startup =3D altera_gpio_irq_startup, + .irq_shutdown =3D altera_gpio_irq_mask, + .flags =3D IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, +}; + static int altera_gpio_probe(struct platform_device *pdev) { struct device_node *node =3D pdev->dev.of_node; @@ -278,15 +289,9 @@ static int altera_gpio_probe(struct platform_device *p= dev) } altera_gc->interrupt_trigger =3D reg; =20 - altera_gc->irq_chip.name =3D "altera-gpio"; - altera_gc->irq_chip.irq_mask =3D altera_gpio_irq_mask; - altera_gc->irq_chip.irq_unmask =3D altera_gpio_irq_unmask; - altera_gc->irq_chip.irq_set_type =3D altera_gpio_irq_set_type; - altera_gc->irq_chip.irq_startup =3D altera_gpio_irq_startup; - altera_gc->irq_chip.irq_shutdown =3D altera_gpio_irq_mask; - girq =3D &altera_gc->mmchip.gc.irq; - girq->chip =3D &altera_gc->irq_chip; + gpio_irq_chip_set_chip(girq, &altera_gpio_irq_chip); + if (altera_gc->interrupt_trigger =3D=3D IRQ_TYPE_LEVEL_HIGH) girq->parent_handler =3D altera_gpio_irq_leveL_high_handler; else --=20 2.34.1 From nobody Thu Sep 11 20:29:52 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4228FC636CC for ; Thu, 16 Feb 2023 09:37:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229729AbjBPJhP (ORCPT ); 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Thu, 16 Feb 2023 01:37:06 -0800 (PST) From: Linus Walleij Date: Thu, 16 Feb 2023 10:37:03 +0100 Subject: [PATCH 02/17] gpio: adnp: Convert to immutable irq_chip MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230215-immutable-chips-v1-2-51a8f224a5d0@linaro.org> References: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> In-Reply-To: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> To: Mun Yew Tham , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Alban Bedel , Orson Zhai , Baolin Wang , Chunyan Zhang , Jay Fang , Daniel Palmer , Romain Perier , Grygorii Strashko , Santosh Shilimkar , Kevin Hilman , William Breathitt Gray Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-omap@vger.kernel.org, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the driver to immutable irq-chip with a bit of intuition. Cc: Marc Zyngier Signed-off-by: Linus Walleij Acked-by: Marc Zyngier --- drivers/gpio/gpio-adnp.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-adnp.c b/drivers/gpio/gpio-adnp.c index a6439e3daff0..9b01c391efce 100644 --- a/drivers/gpio/gpio-adnp.c +++ b/drivers/gpio/gpio-adnp.c @@ -307,6 +307,7 @@ static void adnp_irq_mask(struct irq_data *d) unsigned int pos =3D d->hwirq & 7; =20 adnp->irq_enable[reg] &=3D ~BIT(pos); + gpiochip_disable_irq(gc, irqd_to_hwirq(d)); } =20 static void adnp_irq_unmask(struct irq_data *d) @@ -316,6 +317,7 @@ static void adnp_irq_unmask(struct irq_data *d) unsigned int reg =3D d->hwirq >> adnp->reg_shift; unsigned int pos =3D d->hwirq & 7; =20 + gpiochip_enable_irq(gc, irqd_to_hwirq(d)); adnp->irq_enable[reg] |=3D BIT(pos); } =20 @@ -372,13 +374,15 @@ static void adnp_irq_bus_unlock(struct irq_data *d) mutex_unlock(&adnp->irq_lock); } =20 -static struct irq_chip adnp_irq_chip =3D { +static const struct irq_chip adnp_irq_chip =3D { .name =3D "gpio-adnp", .irq_mask =3D adnp_irq_mask, .irq_unmask =3D adnp_irq_unmask, .irq_set_type =3D adnp_irq_set_type, .irq_bus_lock =3D adnp_irq_bus_lock, .irq_bus_sync_unlock =3D adnp_irq_bus_unlock, + .flags =3D IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, }; =20 static int adnp_irq_setup(struct adnp *adnp) @@ -469,7 +473,8 @@ static int adnp_gpio_setup(struct adnp *adnp, unsigned = int num_gpios, return err; =20 girq =3D &chip->irq; - girq->chip =3D &adnp_irq_chip; + gpio_irq_chip_set_chip(girq, &adnp_irq_chip); + /* This will let us handle the parent IRQ in the driver */ girq->parent_handler =3D NULL; girq->num_parents =3D 0; --=20 2.34.1 From nobody Thu Sep 11 20:29:52 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38A98C636CC for ; Thu, 16 Feb 2023 09:37:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230064AbjBPJhX (ORCPT ); Thu, 16 Feb 2023 04:37:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48318 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230054AbjBPJhM (ORCPT ); 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Thu, 16 Feb 2023 01:37:07 -0800 (PST) From: Linus Walleij Date: Thu, 16 Feb 2023 10:37:04 +0100 Subject: [PATCH 03/17] gpio: aspeed: Convert to immutable irq_chip MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230215-immutable-chips-v1-3-51a8f224a5d0@linaro.org> References: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> In-Reply-To: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> To: Mun Yew Tham , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Alban Bedel , Orson Zhai , Baolin Wang , Chunyan Zhang , Jay Fang , Daniel Palmer , Romain Perier , Grygorii Strashko , Santosh Shilimkar , Kevin Hilman , William Breathitt Gray Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-omap@vger.kernel.org, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the driver to immutable irq-chip with a bit of intuition. Cc: Marc Zyngier Signed-off-by: Linus Walleij Acked-by: Marc Zyngier Tested-by: Joel Stanley --- drivers/gpio/gpio-aspeed.c | 44 ++++++++++++++++++++++++++++++++++++++----= -- 1 file changed, 38 insertions(+), 6 deletions(-) diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c index a94da80d3a95..9c4852de2733 100644 --- a/drivers/gpio/gpio-aspeed.c +++ b/drivers/gpio/gpio-aspeed.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include =20 @@ -53,7 +54,7 @@ struct aspeed_gpio_config { */ struct aspeed_gpio { struct gpio_chip chip; - struct irq_chip irqc; + struct device *dev; raw_spinlock_t lock; void __iomem *base; int irq; @@ -566,6 +567,10 @@ static void aspeed_gpio_irq_set_mask(struct irq_data *= d, bool set) =20 addr =3D bank_reg(gpio, bank, reg_irq_enable); =20 + /* Unmasking the IRQ */ + if (set) + gpiochip_enable_irq(&gpio->chip, irqd_to_hwirq(d)); + raw_spin_lock_irqsave(&gpio->lock, flags); copro =3D aspeed_gpio_copro_request(gpio, offset); =20 @@ -579,6 +584,10 @@ static void aspeed_gpio_irq_set_mask(struct irq_data *= d, bool set) if (copro) aspeed_gpio_copro_release(gpio, offset); raw_spin_unlock_irqrestore(&gpio->lock, flags); + + /* Masking the IRQ */ + if (!set) + gpiochip_disable_irq(&gpio->chip, irqd_to_hwirq(d)); } =20 static void aspeed_gpio_irq_mask(struct irq_data *d) @@ -1080,6 +1089,30 @@ int aspeed_gpio_copro_release_gpio(struct gpio_desc = *desc) } EXPORT_SYMBOL_GPL(aspeed_gpio_copro_release_gpio); =20 +static void aspeed_gpio_irq_print_chip(struct irq_data *d, struct seq_file= *p) +{ + const struct aspeed_gpio_bank *bank; + struct aspeed_gpio *gpio; + u32 bit; + int rc, offset; + + rc =3D irqd_to_aspeed_gpio_data(d, &gpio, &bank, &bit, &offset); + if (rc) + return; + + seq_printf(p, dev_name(gpio->dev)); +} + +static const struct irq_chip aspeed_gpio_irq_chip =3D { + .irq_ack =3D aspeed_gpio_irq_ack, + .irq_mask =3D aspeed_gpio_irq_mask, + .irq_unmask =3D aspeed_gpio_irq_unmask, + .irq_set_type =3D aspeed_gpio_set_type, + .irq_print_chip =3D aspeed_gpio_irq_print_chip, + .flags =3D IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, +}; + /* * Any banks not specified in a struct aspeed_bank_props array are assumed= to * have the properties: @@ -1149,6 +1182,8 @@ static int __init aspeed_gpio_probe(struct platform_d= evice *pdev) if (IS_ERR(gpio->base)) return PTR_ERR(gpio->base); =20 + gpio->dev =3D &pdev->dev; + raw_spin_lock_init(&gpio->lock); =20 gpio_id =3D of_match_node(aspeed_gpio_of_table, pdev->dev.of_node); @@ -1208,12 +1243,9 @@ static int __init aspeed_gpio_probe(struct platform_= device *pdev) =20 gpio->irq =3D rc; girq =3D &gpio->chip.irq; - girq->chip =3D &gpio->irqc; + gpio_irq_chip_set_chip(girq, &aspeed_gpio_irq_chip); girq->chip->name =3D dev_name(&pdev->dev); - girq->chip->irq_ack =3D aspeed_gpio_irq_ack; - girq->chip->irq_mask =3D aspeed_gpio_irq_mask; - girq->chip->irq_unmask =3D aspeed_gpio_irq_unmask; - girq->chip->irq_set_type =3D aspeed_gpio_set_type; + girq->parent_handler =3D aspeed_gpio_irq_handler; girq->num_parents =3D 1; girq->parents =3D devm_kcalloc(&pdev->dev, 1, --=20 2.34.1 From nobody Thu Sep 11 20:29:52 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D17F5C636D6 for ; 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Thu, 16 Feb 2023 01:37:08 -0800 (PST) From: Linus Walleij Date: Thu, 16 Feb 2023 10:37:05 +0100 Subject: [PATCH 04/17] gpio: aspeed-sgpio: Convert to immutable irq_chip MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230215-immutable-chips-v1-4-51a8f224a5d0@linaro.org> References: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> In-Reply-To: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> To: Mun Yew Tham , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Alban Bedel , Orson Zhai , Baolin Wang , Chunyan Zhang , Jay Fang , Daniel Palmer , Romain Perier , Grygorii Strashko , Santosh Shilimkar , Kevin Hilman , William Breathitt Gray Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-omap@vger.kernel.org, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the driver to immutable irq-chip with a bit of intuition. Cc: Marc Zyngier Signed-off-by: Linus Walleij Acked-by: Marc Zyngier --- drivers/gpio/gpio-aspeed-sgpio.c | 44 ++++++++++++++++++++++++++++++++----= ---- 1 file changed, 36 insertions(+), 8 deletions(-) diff --git a/drivers/gpio/gpio-aspeed-sgpio.c b/drivers/gpio/gpio-aspeed-sg= pio.c index 454cefbeecf0..3c1c0fc21fc5 100644 --- a/drivers/gpio/gpio-aspeed-sgpio.c +++ b/drivers/gpio/gpio-aspeed-sgpio.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include =20 @@ -29,7 +30,7 @@ struct aspeed_sgpio_pdata { =20 struct aspeed_sgpio { struct gpio_chip chip; - struct irq_chip intc; + struct device *dev; struct clk *pclk; raw_spinlock_t lock; void __iomem *base; @@ -296,6 +297,10 @@ static void aspeed_sgpio_irq_set_mask(struct irq_data = *d, bool set) irqd_to_aspeed_sgpio_data(d, &gpio, &bank, &bit, &offset); addr =3D bank_reg(gpio, bank, reg_irq_enable); =20 + /* Unmasking the IRQ */ + if (set) + gpiochip_enable_irq(&gpio->chip, irqd_to_hwirq(d)); + raw_spin_lock_irqsave(&gpio->lock, flags); =20 reg =3D ioread32(addr); @@ -307,6 +312,12 @@ static void aspeed_sgpio_irq_set_mask(struct irq_data = *d, bool set) iowrite32(reg, addr); =20 raw_spin_unlock_irqrestore(&gpio->lock, flags); + + /* Masking the IRQ */ + if (!set) + gpiochip_disable_irq(&gpio->chip, irqd_to_hwirq(d)); + + } =20 static void aspeed_sgpio_irq_mask(struct irq_data *d) @@ -401,6 +412,27 @@ static void aspeed_sgpio_irq_handler(struct irq_desc *= desc) chained_irq_exit(ic, desc); } =20 +static void aspeed_sgpio_irq_print_chip(struct irq_data *d, struct seq_fil= e *p) +{ + const struct aspeed_sgpio_bank *bank; + struct aspeed_sgpio *gpio; + u32 bit; + int offset; + + irqd_to_aspeed_sgpio_data(d, &gpio, &bank, &bit, &offset); + seq_printf(p, dev_name(gpio->dev)); +} + +static const struct irq_chip aspeed_sgpio_irq_chip =3D { + .irq_ack =3D aspeed_sgpio_irq_ack, + .irq_mask =3D aspeed_sgpio_irq_mask, + .irq_unmask =3D aspeed_sgpio_irq_unmask, + .irq_set_type =3D aspeed_sgpio_set_type, + .irq_print_chip =3D aspeed_sgpio_irq_print_chip, + .flags =3D IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, +}; + static int aspeed_sgpio_setup_irqs(struct aspeed_sgpio *gpio, struct platform_device *pdev) { @@ -423,14 +455,8 @@ static int aspeed_sgpio_setup_irqs(struct aspeed_sgpio= *gpio, iowrite32(0xffffffff, bank_reg(gpio, bank, reg_irq_status)); } =20 - gpio->intc.name =3D dev_name(&pdev->dev); - gpio->intc.irq_ack =3D aspeed_sgpio_irq_ack; - gpio->intc.irq_mask =3D aspeed_sgpio_irq_mask; - gpio->intc.irq_unmask =3D aspeed_sgpio_irq_unmask; - gpio->intc.irq_set_type =3D aspeed_sgpio_set_type; - irq =3D &gpio->chip.irq; - irq->chip =3D &gpio->intc; + gpio_irq_chip_set_chip(irq, &aspeed_sgpio_irq_chip); irq->init_valid_mask =3D aspeed_sgpio_irq_init_valid_mask; irq->handler =3D handle_bad_irq; irq->default_type =3D IRQ_TYPE_NONE; @@ -524,6 +550,8 @@ static int __init aspeed_sgpio_probe(struct platform_de= vice *pdev) if (IS_ERR(gpio->base)) return PTR_ERR(gpio->base); =20 + gpio->dev =3D &pdev->dev; + pdata =3D device_get_match_data(&pdev->dev); if (!pdata) return -EINVAL; --=20 2.34.1 From nobody Thu Sep 11 20:29:52 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76A84C61DA4 for ; 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Thu, 16 Feb 2023 01:37:09 -0800 (PST) From: Linus Walleij Date: Thu, 16 Feb 2023 10:37:06 +0100 Subject: [PATCH 05/17] gpio: ath79: Convert to immutable irq_chip MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230215-immutable-chips-v1-5-51a8f224a5d0@linaro.org> References: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> In-Reply-To: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> To: Mun Yew Tham , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Alban Bedel , Orson Zhai , Baolin Wang , Chunyan Zhang , Jay Fang , Daniel Palmer , Romain Perier , Grygorii Strashko , Santosh Shilimkar , Kevin Hilman , William Breathitt Gray Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-omap@vger.kernel.org, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the driver to immutable irq-chip with a bit of intuition. Cc: Marc Zyngier Signed-off-by: Linus Walleij Acked-by: Marc Zyngier --- drivers/gpio/gpio-ath79.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-ath79.c b/drivers/gpio/gpio-ath79.c index 3958c6d97639..aa0a954b8392 100644 --- a/drivers/gpio/gpio-ath79.c +++ b/drivers/gpio/gpio-ath79.c @@ -71,6 +71,7 @@ static void ath79_gpio_irq_unmask(struct irq_data *data) u32 mask =3D BIT(irqd_to_hwirq(data)); unsigned long flags; =20 + gpiochip_enable_irq(&ctrl->gc, irqd_to_hwirq(data)); raw_spin_lock_irqsave(&ctrl->lock, flags); ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_MASK, mask, mask); raw_spin_unlock_irqrestore(&ctrl->lock, flags); @@ -85,6 +86,7 @@ static void ath79_gpio_irq_mask(struct irq_data *data) raw_spin_lock_irqsave(&ctrl->lock, flags); ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_MASK, mask, 0); raw_spin_unlock_irqrestore(&ctrl->lock, flags); + gpiochip_disable_irq(&ctrl->gc, irqd_to_hwirq(data)); } =20 static void ath79_gpio_irq_enable(struct irq_data *data) @@ -169,13 +171,15 @@ static int ath79_gpio_irq_set_type(struct irq_data *d= ata, return 0; } =20 -static struct irq_chip ath79_gpio_irqchip =3D { +static const struct irq_chip ath79_gpio_irqchip =3D { .name =3D "gpio-ath79", .irq_enable =3D ath79_gpio_irq_enable, .irq_disable =3D ath79_gpio_irq_disable, .irq_mask =3D ath79_gpio_irq_mask, .irq_unmask =3D ath79_gpio_irq_unmask, .irq_set_type =3D ath79_gpio_irq_set_type, + .flags =3D IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, }; =20 static void ath79_gpio_irq_handler(struct irq_desc *desc) @@ -274,7 +278,7 @@ static int ath79_gpio_probe(struct platform_device *pde= v) /* Optional interrupt setup */ if (!np || of_property_read_bool(np, "interrupt-controller")) { girq =3D &ctrl->gc.irq; - girq->chip =3D &ath79_gpio_irqchip; + gpio_irq_chip_set_chip(girq, &ath79_gpio_irqchip); girq->parent_handler =3D ath79_gpio_irq_handler; girq->num_parents =3D 1; girq->parents =3D devm_kcalloc(dev, 1, sizeof(*girq->parents), --=20 2.34.1 From nobody Thu Sep 11 20:29:52 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EF5D9C61DA4 for ; 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Thu, 16 Feb 2023 01:37:11 -0800 (PST) From: Linus Walleij Date: Thu, 16 Feb 2023 10:37:07 +0100 Subject: [PATCH 06/17] gpio: cadence: Convert to immutable irq_chip MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230215-immutable-chips-v1-6-51a8f224a5d0@linaro.org> References: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> In-Reply-To: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> To: Mun Yew Tham , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Alban Bedel , Orson Zhai , Baolin Wang , Chunyan Zhang , Jay Fang , Daniel Palmer , Romain Perier , Grygorii Strashko , Santosh Shilimkar , Kevin Hilman , William Breathitt Gray Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-omap@vger.kernel.org, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the driver to immutable irq-chip with a bit of intuition. Cc: Marc Zyngier Signed-off-by: Linus Walleij Acked-by: Marc Zyngier --- drivers/gpio/gpio-cadence.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-cadence.c b/drivers/gpio/gpio-cadence.c index 137aea49ba02..3720b90cad10 100644 --- a/drivers/gpio/gpio-cadence.c +++ b/drivers/gpio/gpio-cadence.c @@ -70,6 +70,7 @@ static void cdns_gpio_irq_mask(struct irq_data *d) struct cdns_gpio_chip *cgpio =3D gpiochip_get_data(chip); =20 iowrite32(BIT(d->hwirq), cgpio->regs + CDNS_GPIO_IRQ_DIS); + gpiochip_disable_irq(chip, irqd_to_hwirq(d)); } =20 static void cdns_gpio_irq_unmask(struct irq_data *d) @@ -77,6 +78,7 @@ static void cdns_gpio_irq_unmask(struct irq_data *d) struct gpio_chip *chip =3D irq_data_get_irq_chip_data(d); struct cdns_gpio_chip *cgpio =3D gpiochip_get_data(chip); =20 + gpiochip_enable_irq(chip, irqd_to_hwirq(d)); iowrite32(BIT(d->hwirq), cgpio->regs + CDNS_GPIO_IRQ_EN); } =20 @@ -138,11 +140,13 @@ static void cdns_gpio_irq_handler(struct irq_desc *de= sc) chained_irq_exit(irqchip, desc); } =20 -static struct irq_chip cdns_gpio_irqchip =3D { +static const struct irq_chip cdns_gpio_irqchip =3D { .name =3D "cdns-gpio", .irq_mask =3D cdns_gpio_irq_mask, .irq_unmask =3D cdns_gpio_irq_unmask, - .irq_set_type =3D cdns_gpio_irq_set_type + .irq_set_type =3D cdns_gpio_irq_set_type, + .flags =3D IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, }; =20 static int cdns_gpio_probe(struct platform_device *pdev) @@ -222,7 +226,7 @@ static int cdns_gpio_probe(struct platform_device *pdev) struct gpio_irq_chip *girq; =20 girq =3D &cgpio->gc.irq; - girq->chip =3D &cdns_gpio_irqchip; + gpio_irq_chip_set_chip(girq, &cdns_gpio_irqchip); girq->parent_handler =3D cdns_gpio_irq_handler; girq->num_parents =3D 1; girq->parents =3D devm_kcalloc(&pdev->dev, 1, --=20 2.34.1 From nobody Thu Sep 11 20:29:52 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E25B6C636CC for ; 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Thu, 16 Feb 2023 01:37:12 -0800 (PST) From: Linus Walleij Date: Thu, 16 Feb 2023 10:37:08 +0100 Subject: [PATCH 07/17] gpio: eic_sprd: Convert to immutable irq_chip MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230215-immutable-chips-v1-7-51a8f224a5d0@linaro.org> References: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> In-Reply-To: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> To: Mun Yew Tham , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Alban Bedel , Orson Zhai , Baolin Wang , Chunyan Zhang , Jay Fang , Daniel Palmer , Romain Perier , Grygorii Strashko , Santosh Shilimkar , Kevin Hilman , William Breathitt Gray Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-omap@vger.kernel.org, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the driver to immutable irq-chip with a bit of intuition. Cc: Marc Zyngier Signed-off-by: Linus Walleij Acked-by: Marc Zyngier --- drivers/gpio/gpio-eic-sprd.c | 33 ++++++++++++++++++++++++--------- 1 file changed, 24 insertions(+), 9 deletions(-) diff --git a/drivers/gpio/gpio-eic-sprd.c b/drivers/gpio/gpio-eic-sprd.c index 8d722e026e9c..695d74ba55f0 100644 --- a/drivers/gpio/gpio-eic-sprd.c +++ b/drivers/gpio/gpio-eic-sprd.c @@ -11,6 +11,7 @@ #include #include #include +#include #include =20 /* EIC registers definition */ @@ -91,7 +92,7 @@ enum sprd_eic_type { =20 struct sprd_eic { struct gpio_chip chip; - struct irq_chip intc; + struct device *dev; void __iomem *base[SPRD_EIC_MAX_BANK]; enum sprd_eic_type type; spinlock_t lock; @@ -255,6 +256,7 @@ static void sprd_eic_irq_mask(struct irq_data *data) default: dev_err(chip->parent, "Unsupported EIC type.\n"); } + gpiochip_disable_irq(chip, irqd_to_hwirq(data)); } =20 static void sprd_eic_irq_unmask(struct irq_data *data) @@ -263,6 +265,7 @@ static void sprd_eic_irq_unmask(struct irq_data *data) struct sprd_eic *sprd_eic =3D gpiochip_get_data(chip); u32 offset =3D irqd_to_hwirq(data); =20 + gpiochip_enable_irq(chip, irqd_to_hwirq(data)); switch (sprd_eic->type) { case SPRD_EIC_DEBOUNCE: sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IE, 1); @@ -564,6 +567,24 @@ static void sprd_eic_irq_handler(struct irq_desc *desc) chained_irq_exit(ic, desc); } =20 +static void sprd_eic_irq_print_chip(struct irq_data *data, struct seq_file= *p) +{ + struct gpio_chip *chip =3D irq_data_get_irq_chip_data(data); + struct sprd_eic *sprd_eic =3D gpiochip_get_data(chip); + + seq_printf(p, dev_name(sprd_eic->dev)); +} + +static const struct irq_chip sprd_eic_irq_chip =3D { + .irq_ack =3D sprd_eic_irq_ack, + .irq_mask =3D sprd_eic_irq_mask, + .irq_unmask =3D sprd_eic_irq_unmask, + .irq_set_type =3D sprd_eic_irq_set_type, + .irq_print_chip =3D sprd_eic_irq_print_chip, + .flags =3D IRQCHIP_SKIP_SET_WAKE | IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, +}; + static int sprd_eic_probe(struct platform_device *pdev) { const struct sprd_eic_variant_data *pdata; @@ -584,6 +605,7 @@ static int sprd_eic_probe(struct platform_device *pdev) =20 spin_lock_init(&sprd_eic->lock); sprd_eic->type =3D pdata->type; + sprd_eic->dev =3D &pdev->dev; =20 sprd_eic->irq =3D platform_get_irq(pdev, 0); if (sprd_eic->irq < 0) @@ -626,15 +648,8 @@ static int sprd_eic_probe(struct platform_device *pdev) break; } =20 - sprd_eic->intc.name =3D dev_name(&pdev->dev); - sprd_eic->intc.irq_ack =3D sprd_eic_irq_ack; - sprd_eic->intc.irq_mask =3D sprd_eic_irq_mask; - sprd_eic->intc.irq_unmask =3D sprd_eic_irq_unmask; - sprd_eic->intc.irq_set_type =3D sprd_eic_irq_set_type; - sprd_eic->intc.flags =3D IRQCHIP_SKIP_SET_WAKE; - irq =3D &sprd_eic->chip.irq; - irq->chip =3D &sprd_eic->intc; + gpio_irq_chip_set_chip(irq, &sprd_eic_irq_chip); irq->handler =3D handle_bad_irq; irq->default_type =3D IRQ_TYPE_NONE; irq->parent_handler =3D sprd_eic_irq_handler; --=20 2.34.1 From nobody Thu Sep 11 20:29:52 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9E4A2C636CC for ; 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Thu, 16 Feb 2023 01:37:13 -0800 (PST) From: Linus Walleij Date: Thu, 16 Feb 2023 10:37:09 +0100 Subject: [PATCH 08/17] gpio: hisi: Convert to immutable irq_chip MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230215-immutable-chips-v1-8-51a8f224a5d0@linaro.org> References: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> In-Reply-To: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> To: Mun Yew Tham , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Alban Bedel , Orson Zhai , Baolin Wang , Chunyan Zhang , Jay Fang , Daniel Palmer , Romain Perier , Grygorii Strashko , Santosh Shilimkar , Kevin Hilman , William Breathitt Gray Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-omap@vger.kernel.org, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the driver to immutable irq-chip with a bit of intuition. The IRQ chip was unnamed which seems unwise, so we just assign the name "HISI-GPIO". Cc: Marc Zyngier Signed-off-by: Linus Walleij Acked-by: Marc Zyngier --- drivers/gpio/gpio-hisi.c | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/drivers/gpio/gpio-hisi.c b/drivers/gpio/gpio-hisi.c index 55bd69043bf4..29a03de37fd8 100644 --- a/drivers/gpio/gpio-hisi.c +++ b/drivers/gpio/gpio-hisi.c @@ -37,7 +37,6 @@ struct hisi_gpio { struct device *dev; void __iomem *reg_base; unsigned int line_num; - struct irq_chip irq_chip; int irq; }; =20 @@ -100,12 +99,14 @@ static void hisi_gpio_irq_set_mask(struct irq_data *d) struct gpio_chip *chip =3D irq_data_get_irq_chip_data(d); =20 hisi_gpio_write_reg(chip, HISI_GPIO_INTMASK_SET_WX, BIT(irqd_to_hwirq(d))= ); + gpiochip_disable_irq(chip, irqd_to_hwirq(d)); } =20 static void hisi_gpio_irq_clr_mask(struct irq_data *d) { struct gpio_chip *chip =3D irq_data_get_irq_chip_data(d); =20 + gpiochip_enable_irq(chip, irqd_to_hwirq(d)); hisi_gpio_write_reg(chip, HISI_GPIO_INTMASK_CLR_WX, BIT(irqd_to_hwirq(d))= ); } =20 @@ -191,20 +192,24 @@ static void hisi_gpio_irq_handler(struct irq_desc *de= sc) chained_irq_exit(irq_c, desc); } =20 +static const struct irq_chip hisi_gpio_irq_chip =3D { + .name =3D "HISI-GPIO", + .irq_ack =3D hisi_gpio_set_ack, + .irq_mask =3D hisi_gpio_irq_set_mask, + .irq_unmask =3D hisi_gpio_irq_clr_mask, + .irq_set_type =3D hisi_gpio_irq_set_type, + .irq_enable =3D hisi_gpio_irq_enable, + .irq_disable =3D hisi_gpio_irq_disable, + .flags =3D IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, +}; + static void hisi_gpio_init_irq(struct hisi_gpio *hisi_gpio) { struct gpio_chip *chip =3D &hisi_gpio->chip; struct gpio_irq_chip *girq_chip =3D &chip->irq; =20 - /* Set hooks for irq_chip */ - hisi_gpio->irq_chip.irq_ack =3D hisi_gpio_set_ack; - hisi_gpio->irq_chip.irq_mask =3D hisi_gpio_irq_set_mask; - hisi_gpio->irq_chip.irq_unmask =3D hisi_gpio_irq_clr_mask; - hisi_gpio->irq_chip.irq_set_type =3D hisi_gpio_irq_set_type; - hisi_gpio->irq_chip.irq_enable =3D hisi_gpio_irq_enable; - hisi_gpio->irq_chip.irq_disable =3D hisi_gpio_irq_disable; - - girq_chip->chip =3D &hisi_gpio->irq_chip; + gpio_irq_chip_set_chip(girq_chip, &hisi_gpio_irq_chip); girq_chip->default_type =3D IRQ_TYPE_NONE; girq_chip->num_parents =3D 1; girq_chip->parents =3D &hisi_gpio->irq; --=20 2.34.1 From nobody Thu Sep 11 20:29:52 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4830AC61DA4 for ; Thu, 16 Feb 2023 09:37:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229614AbjBPJhv (ORCPT ); Thu, 16 Feb 2023 04:37:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48556 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230107AbjBPJhX (ORCPT ); Thu, 16 Feb 2023 04:37:23 -0500 Received: from mail-lf1-x131.google.com (mail-lf1-x131.google.com [IPv6:2a00:1450:4864:20::131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 91F094DE15 for ; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230215-immutable-chips-v1-9-51a8f224a5d0@linaro.org> References: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> In-Reply-To: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> To: Mun Yew Tham , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Alban Bedel , Orson Zhai , Baolin Wang , Chunyan Zhang , Jay Fang , Daniel Palmer , Romain Perier , Grygorii Strashko , Santosh Shilimkar , Kevin Hilman , William Breathitt Gray Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-omap@vger.kernel.org, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the driver to immutable irq-chip with a bit of intuition. Cc: Marc Zyngier Signed-off-by: Linus Walleij Acked-by: Marc Zyngier --- drivers/gpio/gpio-hlwd.c | 33 +++++++++++++++++++++++++-------- 1 file changed, 25 insertions(+), 8 deletions(-) diff --git a/drivers/gpio/gpio-hlwd.c b/drivers/gpio/gpio-hlwd.c index 4e13e937f832..c208ac1c54a6 100644 --- a/drivers/gpio/gpio-hlwd.c +++ b/drivers/gpio/gpio-hlwd.c @@ -11,6 +11,7 @@ #include #include #include +#include #include =20 /* @@ -48,7 +49,7 @@ =20 struct hlwd_gpio { struct gpio_chip gpioc; - struct irq_chip irqc; + struct device *dev; void __iomem *regs; int irq; u32 edge_emulation; @@ -123,6 +124,7 @@ static void hlwd_gpio_irq_mask(struct irq_data *data) mask &=3D ~BIT(data->hwirq); iowrite32be(mask, hlwd->regs + HW_GPIOB_INTMASK); raw_spin_unlock_irqrestore(&hlwd->gpioc.bgpio_lock, flags); + gpiochip_disable_irq(&hlwd->gpioc, irqd_to_hwirq(data)); } =20 static void hlwd_gpio_irq_unmask(struct irq_data *data) @@ -132,6 +134,7 @@ static void hlwd_gpio_irq_unmask(struct irq_data *data) unsigned long flags; u32 mask; =20 + gpiochip_enable_irq(&hlwd->gpioc, irqd_to_hwirq(data)); raw_spin_lock_irqsave(&hlwd->gpioc.bgpio_lock, flags); mask =3D ioread32be(hlwd->regs + HW_GPIOB_INTMASK); mask |=3D BIT(data->hwirq); @@ -202,6 +205,24 @@ static int hlwd_gpio_irq_set_type(struct irq_data *dat= a, unsigned int flow_type) return 0; } =20 +static void hlwd_gpio_irq_print_chip(struct irq_data *data, struct seq_fil= e *p) +{ + struct hlwd_gpio *hlwd =3D + gpiochip_get_data(irq_data_get_irq_chip_data(data)); + + seq_printf(p, dev_name(hlwd->dev)); +} + +static const struct irq_chip hlwd_gpio_irq_chip =3D { + .irq_mask =3D hlwd_gpio_irq_mask, + .irq_unmask =3D hlwd_gpio_irq_unmask, + .irq_enable =3D hlwd_gpio_irq_enable, + .irq_set_type =3D hlwd_gpio_irq_set_type, + .irq_print_chip =3D hlwd_gpio_irq_print_chip, + .flags =3D IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, +}; + static int hlwd_gpio_probe(struct platform_device *pdev) { struct hlwd_gpio *hlwd; @@ -216,6 +237,8 @@ static int hlwd_gpio_probe(struct platform_device *pdev) if (IS_ERR(hlwd->regs)) return PTR_ERR(hlwd->regs); =20 + hlwd->dev =3D &pdev->dev; + /* * Claim all GPIOs using the OWNER register. This will not work on * systems where the AHBPROT memory firewall hasn't been configured to @@ -259,14 +282,8 @@ static int hlwd_gpio_probe(struct platform_device *pde= v) return hlwd->irq; } =20 - hlwd->irqc.name =3D dev_name(&pdev->dev); - hlwd->irqc.irq_mask =3D hlwd_gpio_irq_mask; - hlwd->irqc.irq_unmask =3D hlwd_gpio_irq_unmask; - hlwd->irqc.irq_enable =3D hlwd_gpio_irq_enable; - hlwd->irqc.irq_set_type =3D hlwd_gpio_irq_set_type; - girq =3D &hlwd->gpioc.irq; - girq->chip =3D &hlwd->irqc; + gpio_irq_chip_set_chip(girq, &hlwd_gpio_irq_chip); girq->parent_handler =3D hlwd_gpio_irqhandler; girq->num_parents =3D 1; girq->parents =3D devm_kcalloc(&pdev->dev, 1, --=20 2.34.1 From nobody Thu Sep 11 20:29:52 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05A11C636D6 for ; Thu, 16 Feb 2023 09:37:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230187AbjBPJhy (ORCPT ); Thu, 16 Feb 2023 04:37:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49056 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230111AbjBPJhY (ORCPT ); Thu, 16 Feb 2023 04:37:24 -0500 Received: from mail-lf1-x133.google.com (mail-lf1-x133.google.com [IPv6:2a00:1450:4864:20::133]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 026214DE28 for ; Thu, 16 Feb 2023 01:37:16 -0800 (PST) Received: by mail-lf1-x133.google.com with SMTP id c20so2024461lfv.6 for ; Thu, 16 Feb 2023 01:37:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=a8DZXGe1xObRdMsVrQnS0lb6atFLew5i7Tuuw+JmgFw=; b=wToZTfduTW2q2j/bGKbgja2LztHwIOlTvQClVG+7cNvEpVrBrdTXDxJ3tqPsww+jAU uFKNuUgQk59p9xMCGS4hUu4Fdd6MZKvHWYPIa0qNjOMGCRBdwNtBYOITKDvhHAgElWY7 OsAu34b1GzQnWgTTZ+jNFlF/b4vZxwTmq9EYK74hhDBVZyhirLKzDGeIP66uzG/msCPG EhqEBh4GTOejc0igvcr/8lok1FfaznsI+Jh+fKN4YUo0LSZuLC+VW2yIKfWcdj5AqvLY YIe1/gi0msoyPZ/Ipp8ej0AR/br+SV8hO42S+eX7KVzs9Q1+mTxdIJWASXjIzYE8hR03 wIrw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=a8DZXGe1xObRdMsVrQnS0lb6atFLew5i7Tuuw+JmgFw=; b=Rj6nf5EMPbkwLsAaPcA9r+uWyxLvBStHEGz9DiKtQT0CfrnCNJXvfa+qyvjTHXMs6m 3Mvz6UX6kh932uQSEgaE3nbdgqbmloZq+94Wb3142bwp7q8FvZ2/cGgac6c3as+szu3J X0ysTz4h2/iMpWcmi2Csb2msr0OXZVUeC2v4dpJVByRQUTPegWbJfUEnn9AhA/ssOWgL GFrMgBGlKYkYiA6mB5q3L/xvz6gaDDNPfr7fJN5VY7u/aIqt7YaY6wfU+xg0Bos5VVXH XZqL47tkDRstaC9jC2D0EQpAPWP3Mp4sEFytSsRs1XYVWn0KrcqLxfdlzRqY3bYASbho Ev2g== X-Gm-Message-State: AO0yUKXxASOx73JmDxRm33WqKhUlQLkl2ocJ+RLYn+kwCg45ZyHq30Gd jTkiWcABZpPvAmMjrUwu/TGMMQ== X-Google-Smtp-Source: AK7set8Z0okFMceuj7JkpWst6furWlPvgO9yX4syLTxbrHFyCV29/k8L68uKNAT/IDo4m+Q4vgpHJA== X-Received: by 2002:ac2:5088:0:b0:4db:80:fba2 with SMTP id f8-20020ac25088000000b004db0080fba2mr1742040lfm.63.1676540236497; Thu, 16 Feb 2023 01:37:16 -0800 (PST) Received: from [127.0.1.1] ([85.235.12.219]) by smtp.gmail.com with ESMTPSA id r3-20020a19ac43000000b004d8758a452asm229069lfc.288.2023.02.16.01.37.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 01:37:15 -0800 (PST) From: Linus Walleij Date: Thu, 16 Feb 2023 10:37:11 +0100 Subject: [PATCH 10/17] gpio: idt3243x: Convert to immutable irq_chip MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230215-immutable-chips-v1-10-51a8f224a5d0@linaro.org> References: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> In-Reply-To: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> To: Mun Yew Tham , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Alban Bedel , Orson Zhai , Baolin Wang , Chunyan Zhang , Jay Fang , Daniel Palmer , Romain Perier , Grygorii Strashko , Santosh Shilimkar , Kevin Hilman , William Breathitt Gray Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-omap@vger.kernel.org, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the driver to immutable irq-chip with a bit of intuition. Cc: Marc Zyngier Signed-off-by: Linus Walleij Acked-by: Marc Zyngier Tested-by: Thomas Bogendoerfer --- drivers/gpio/gpio-idt3243x.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-idt3243x.c b/drivers/gpio/gpio-idt3243x.c index 1cafdf46f875..00f547d26254 100644 --- a/drivers/gpio/gpio-idt3243x.c +++ b/drivers/gpio/gpio-idt3243x.c @@ -92,6 +92,8 @@ static void idt_gpio_mask(struct irq_data *d) writel(ctrl->mask_cache, ctrl->pic + IDT_PIC_IRQ_MASK); =20 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); + + gpiochip_disable_irq(gc, irqd_to_hwirq(d)); } =20 static void idt_gpio_unmask(struct irq_data *d) @@ -100,6 +102,7 @@ static void idt_gpio_unmask(struct irq_data *d) struct idt_gpio_ctrl *ctrl =3D gpiochip_get_data(gc); unsigned long flags; =20 + gpiochip_enable_irq(gc, irqd_to_hwirq(d)); raw_spin_lock_irqsave(&gc->bgpio_lock, flags); =20 ctrl->mask_cache &=3D ~BIT(d->hwirq); @@ -119,12 +122,14 @@ static int idt_gpio_irq_init_hw(struct gpio_chip *gc) return 0; } =20 -static struct irq_chip idt_gpio_irqchip =3D { +static const struct irq_chip idt_gpio_irqchip =3D { .name =3D "IDTGPIO", .irq_mask =3D idt_gpio_mask, .irq_ack =3D idt_gpio_ack, .irq_unmask =3D idt_gpio_unmask, - .irq_set_type =3D idt_gpio_irq_set_type + .irq_set_type =3D idt_gpio_irq_set_type, + .flags =3D IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, }; =20 static int idt_gpio_probe(struct platform_device *pdev) @@ -168,7 +173,7 @@ static int idt_gpio_probe(struct platform_device *pdev) return parent_irq; =20 girq =3D &ctrl->gc.irq; - girq->chip =3D &idt_gpio_irqchip; + gpio_irq_chip_set_chip(girq, &idt_gpio_irqchip); girq->init_hw =3D idt_gpio_irq_init_hw; girq->parent_handler =3D idt_gpio_dispatch; girq->num_parents =3D 1; --=20 2.34.1 From nobody Thu Sep 11 20:29:52 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC261C64EC4 for ; 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Thu, 16 Feb 2023 01:37:17 -0800 (PST) From: Linus Walleij Date: Thu, 16 Feb 2023 10:37:12 +0100 Subject: [PATCH 11/17] gpio: msc313: Convert to immutable irq_chip MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230215-immutable-chips-v1-11-51a8f224a5d0@linaro.org> References: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> In-Reply-To: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> To: Mun Yew Tham , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Alban Bedel , Orson Zhai , Baolin Wang , Chunyan Zhang , Jay Fang , Daniel Palmer , Romain Perier , Grygorii Strashko , Santosh Shilimkar , Kevin Hilman , William Breathitt Gray Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-omap@vger.kernel.org, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the driver to immutable irq-chip with a bit of intuition. This conversion follows the pattern of the gpio-ixp4xx hierarchical GPIO interrupt driver. Cc: Marc Zyngier Signed-off-by: Linus Walleij Acked-by: Marc Zyngier --- drivers/gpio/gpio-msc313.c | 26 ++++++++++++++++++++++---- 1 file changed, 22 insertions(+), 4 deletions(-) diff --git a/drivers/gpio/gpio-msc313.c b/drivers/gpio/gpio-msc313.c index 52d7b8d99170..57a6c43167f7 100644 --- a/drivers/gpio/gpio-msc313.c +++ b/drivers/gpio/gpio-msc313.c @@ -532,17 +532,35 @@ static int msc313_gpio_direction_output(struct gpio_c= hip *chip, unsigned int off return 0; } =20 +static void msc313_gpio_irq_mask(struct irq_data *d) +{ + struct gpio_chip *gc =3D irq_data_get_irq_chip_data(d); + + irq_chip_mask_parent(d); + gpiochip_disable_irq(gc, d->hwirq); +} + +static void msc313_gpio_irq_unmask(struct irq_data *d) +{ + struct gpio_chip *gc =3D irq_data_get_irq_chip_data(d); + + gpiochip_enable_irq(gc, d->hwirq); + irq_chip_unmask_parent(d); +} + /* * The interrupt handling happens in the parent interrupt controller, * we don't do anything here. */ -static struct irq_chip msc313_gpio_irqchip =3D { +static const struct irq_chip msc313_gpio_irqchip =3D { .name =3D "GPIO", .irq_eoi =3D irq_chip_eoi_parent, - .irq_mask =3D irq_chip_mask_parent, - .irq_unmask =3D irq_chip_unmask_parent, + .irq_mask =3D msc313_gpio_irq_mask, + .irq_unmask =3D msc313_gpio_irq_unmask, .irq_set_type =3D irq_chip_set_type_parent, .irq_set_affinity =3D irq_chip_set_affinity_parent, + .flags =3D IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, }; =20 /* @@ -644,7 +662,7 @@ static int msc313_gpio_probe(struct platform_device *pd= ev) gpiochip->names =3D gpio->gpio_data->names; =20 gpioirqchip =3D &gpiochip->irq; - gpioirqchip->chip =3D &msc313_gpio_irqchip; + gpio_irq_chip_set_chip(gpioirqchip, &msc313_gpio_irqchip); gpioirqchip->fwnode =3D of_node_to_fwnode(dev->of_node); gpioirqchip->parent_domain =3D parent_domain; gpioirqchip->child_to_parent_hwirq =3D msc313e_gpio_child_to_parent_hwirq; --=20 2.34.1 From nobody Thu Sep 11 20:29:52 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E0D63C636CC for ; Thu, 16 Feb 2023 09:38:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230109AbjBPJiI (ORCPT ); Thu, 16 Feb 2023 04:38:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48920 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230149AbjBPJhs (ORCPT ); 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Thu, 16 Feb 2023 01:37:18 -0800 (PST) From: Linus Walleij Date: Thu, 16 Feb 2023 10:37:13 +0100 Subject: [PATCH 12/17] gpio: mlxbf2: Convert to immutable irq_chip MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230215-immutable-chips-v1-12-51a8f224a5d0@linaro.org> References: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> In-Reply-To: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> To: Mun Yew Tham , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Alban Bedel , Orson Zhai , Baolin Wang , Chunyan Zhang , Jay Fang , Daniel Palmer , Romain Perier , Grygorii Strashko , Santosh Shilimkar , Kevin Hilman , William Breathitt Gray Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-omap@vger.kernel.org, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the driver to immutable irq-chip with a bit of intuition. Cc: Marc Zyngier Signed-off-by: Linus Walleij Acked-by: Marc Zyngier --- drivers/gpio/gpio-mlxbf2.c | 32 +++++++++++++++++++++++++------- 1 file changed, 25 insertions(+), 7 deletions(-) diff --git a/drivers/gpio/gpio-mlxbf2.c b/drivers/gpio/gpio-mlxbf2.c index 77a41151c921..6abe01bc39c3 100644 --- a/drivers/gpio/gpio-mlxbf2.c +++ b/drivers/gpio/gpio-mlxbf2.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include =20 @@ -65,10 +66,10 @@ struct mlxbf2_gpio_context_save_regs { /* BlueField-2 gpio block context structure. */ struct mlxbf2_gpio_context { struct gpio_chip gc; - struct irq_chip irq_chip; =20 /* YU GPIO blocks address */ void __iomem *gpio_io; + struct device *dev; =20 struct mlxbf2_gpio_context_save_regs *csave_regs; }; @@ -237,6 +238,7 @@ static void mlxbf2_gpio_irq_enable(struct irq_data *irq= d) unsigned long flags; u32 val; =20 + gpiochip_enable_irq(gc, irqd_to_hwirq(irqd)); raw_spin_lock_irqsave(&gs->gc.bgpio_lock, flags); val =3D readl(gs->gpio_io + YU_GPIO_CAUSE_OR_CLRCAUSE); val |=3D BIT(offset); @@ -261,6 +263,7 @@ static void mlxbf2_gpio_irq_disable(struct irq_data *ir= qd) val &=3D ~BIT(offset); writel(val, gs->gpio_io + YU_GPIO_CAUSE_OR_EVTEN0); raw_spin_unlock_irqrestore(&gs->gc.bgpio_lock, flags); + gpiochip_disable_irq(gc, irqd_to_hwirq(irqd)); } =20 static irqreturn_t mlxbf2_gpio_irq_handler(int irq, void *ptr) @@ -322,6 +325,24 @@ mlxbf2_gpio_irq_set_type(struct irq_data *irqd, unsign= ed int type) return 0; } =20 +static void mlxbf2_gpio_irq_print_chip(struct irq_data *irqd, + struct seq_file *p) +{ + struct gpio_chip *gc =3D irq_data_get_irq_chip_data(irqd); + struct mlxbf2_gpio_context *gs =3D gpiochip_get_data(gc); + + seq_printf(p, dev_name(gs->dev)); +} + +static const struct irq_chip mlxbf2_gpio_irq_chip =3D { + .irq_set_type =3D mlxbf2_gpio_irq_set_type, + .irq_enable =3D mlxbf2_gpio_irq_enable, + .irq_disable =3D mlxbf2_gpio_irq_disable, + .irq_print_chip =3D mlxbf2_gpio_irq_print_chip, + .flags =3D IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, +}; + /* BlueField-2 GPIO driver initialization routine. */ static int mlxbf2_gpio_probe(struct platform_device *pdev) @@ -340,6 +361,8 @@ mlxbf2_gpio_probe(struct platform_device *pdev) if (!gs) return -ENOMEM; =20 + gs->dev =3D dev; + /* YU GPIO block address */ gs->gpio_io =3D devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(gs->gpio_io)) @@ -376,13 +399,8 @@ mlxbf2_gpio_probe(struct platform_device *pdev) =20 irq =3D platform_get_irq(pdev, 0); if (irq >=3D 0) { - gs->irq_chip.name =3D name; - gs->irq_chip.irq_set_type =3D mlxbf2_gpio_irq_set_type; - gs->irq_chip.irq_enable =3D mlxbf2_gpio_irq_enable; - gs->irq_chip.irq_disable =3D mlxbf2_gpio_irq_disable; - girq =3D &gs->gc.irq; - girq->chip =3D &gs->irq_chip; + gpio_irq_chip_set_chip(girq, &mlxbf2_gpio_irq_chip); girq->handler =3D handle_simple_irq; girq->default_type =3D IRQ_TYPE_NONE; /* This will let us handle the parent IRQ in the driver */ --=20 2.34.1 From nobody Thu Sep 11 20:29:52 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47DDCC61DA4 for ; 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Thu, 16 Feb 2023 01:37:20 -0800 (PST) From: Linus Walleij Date: Thu, 16 Feb 2023 10:37:14 +0100 Subject: [PATCH 13/17] gpio: max732x: Convert to immutable irq_chip MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230215-immutable-chips-v1-13-51a8f224a5d0@linaro.org> References: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> In-Reply-To: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> To: Mun Yew Tham , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Alban Bedel , Orson Zhai , Baolin Wang , Chunyan Zhang , Jay Fang , Daniel Palmer , Romain Perier , Grygorii Strashko , Santosh Shilimkar , Kevin Hilman , William Breathitt Gray Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-omap@vger.kernel.org, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the driver to immutable irq-chip with a bit of intuition. Cc: Marc Zyngier Signed-off-by: Linus Walleij Acked-by: Marc Zyngier --- drivers/gpio/gpio-max732x.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-max732x.c b/drivers/gpio/gpio-max732x.c index 68e982cdee73..7f2fde191755 100644 --- a/drivers/gpio/gpio-max732x.c +++ b/drivers/gpio/gpio-max732x.c @@ -351,6 +351,7 @@ static void max732x_irq_mask(struct irq_data *d) struct max732x_chip *chip =3D gpiochip_get_data(gc); =20 chip->irq_mask_cur &=3D ~(1 << d->hwirq); + gpiochip_disable_irq(gc, irqd_to_hwirq(d)); } =20 static void max732x_irq_unmask(struct irq_data *d) @@ -358,6 +359,7 @@ static void max732x_irq_unmask(struct irq_data *d) struct gpio_chip *gc =3D irq_data_get_irq_chip_data(d); struct max732x_chip *chip =3D gpiochip_get_data(gc); =20 + gpiochip_enable_irq(gc, irqd_to_hwirq(d)); chip->irq_mask_cur |=3D 1 << d->hwirq; } =20 @@ -429,7 +431,7 @@ static int max732x_irq_set_wake(struct irq_data *data, = unsigned int on) return 0; } =20 -static struct irq_chip max732x_irq_chip =3D { +static const struct irq_chip max732x_irq_chip =3D { .name =3D "max732x", .irq_mask =3D max732x_irq_mask, .irq_unmask =3D max732x_irq_unmask, @@ -437,6 +439,8 @@ static struct irq_chip max732x_irq_chip =3D { .irq_bus_sync_unlock =3D max732x_irq_bus_sync_unlock, .irq_set_type =3D max732x_irq_set_type, .irq_set_wake =3D max732x_irq_set_wake, + .flags =3D IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, }; =20 static uint8_t max732x_irq_pending(struct max732x_chip *chip) @@ -517,7 +521,7 @@ static int max732x_irq_setup(struct max732x_chip *chip, } =20 girq =3D &chip->gpio_chip.irq; - girq->chip =3D &max732x_irq_chip; + gpio_irq_chip_set_chip(girq, &max732x_irq_chip); /* This will let us handle the parent IRQ in the driver */ girq->parent_handler =3D NULL; girq->num_parents =3D 0; --=20 2.34.1 From nobody Thu Sep 11 20:29:52 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE59EC636CC for ; Thu, 16 Feb 2023 09:38:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230182AbjBPJiZ (ORCPT ); Thu, 16 Feb 2023 04:38:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50384 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230172AbjBPJhw (ORCPT ); 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Thu, 16 Feb 2023 01:37:22 -0800 (PST) From: Linus Walleij Date: Thu, 16 Feb 2023 10:37:15 +0100 Subject: [PATCH 14/17] gpio: omap: Drop irq_base MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230215-immutable-chips-v1-14-51a8f224a5d0@linaro.org> References: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> In-Reply-To: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> To: Mun Yew Tham , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Alban Bedel , Orson Zhai , Baolin Wang , Chunyan Zhang , Jay Fang , Daniel Palmer , Romain Perier , Grygorii Strashko , Santosh Shilimkar , Kevin Hilman , William Breathitt Gray Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-omap@vger.kernel.org, Linus Walleij , Janusz Krzysztofik , Arnd Bergmann , Tony Lindgren , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The OMAP1 at one point was using static irqs but that time is gone, OMAP1 uses sparse irqs like all other multiplatform targets so this static allocation of descriptors should just go. Cc: Janusz Krzysztofik Cc: Arnd Bergmann Cc: Tony Lindgren Acked-by: Marc Zyngier Signed-off-by: Linus Walleij Reviewed-by: Tony Lindgren --- drivers/gpio/gpio-omap.c | 15 --------------- 1 file changed, 15 deletions(-) diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 80ddc43fd875..292e62c06008 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -992,7 +992,6 @@ static int omap_gpio_chip_init(struct gpio_bank *bank, = struct irq_chip *irqc, struct gpio_irq_chip *irq; static int gpio; const char *label; - int irq_base =3D 0; int ret; =20 /* @@ -1024,19 +1023,6 @@ static int omap_gpio_chip_init(struct gpio_bank *ban= k, struct irq_chip *irqc, } bank->chip.ngpio =3D bank->width; =20 -#ifdef CONFIG_ARCH_OMAP1 - /* - * REVISIT: Once we have OMAP1 supporting SPARSE_IRQ, we can drop - * irq_alloc_descs() since a base IRQ offset will no longer be needed. - */ - irq_base =3D devm_irq_alloc_descs(bank->chip.parent, - -1, 0, bank->width, 0); - if (irq_base < 0) { - dev_err(bank->chip.parent, "Couldn't allocate IRQ numbers\n"); - return -ENODEV; - } -#endif - /* MPUIO is a bit different, reading IRQ status clears it */ if (bank->is_mpuio && !bank->regs->wkup_en) irqc->irq_set_wake =3D NULL; @@ -1047,7 +1033,6 @@ static int omap_gpio_chip_init(struct gpio_bank *bank= , struct irq_chip *irqc, irq->default_type =3D IRQ_TYPE_NONE; irq->num_parents =3D 1; irq->parents =3D &bank->irq; - irq->first =3D irq_base; =20 ret =3D gpiochip_add_data(&bank->chip, bank); if (ret) --=20 2.34.1 From nobody Thu Sep 11 20:29:52 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 04329C64ED8 for ; Thu, 16 Feb 2023 09:38:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230104AbjBPJii (ORCPT ); Thu, 16 Feb 2023 04:38:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48558 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230199AbjBPJh4 (ORCPT ); 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Thu, 16 Feb 2023 01:37:23 -0800 (PST) From: Linus Walleij Date: Thu, 16 Feb 2023 10:37:16 +0100 Subject: [PATCH 15/17] gpio: omap: Convert to immutable irq_chip MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230215-immutable-chips-v1-15-51a8f224a5d0@linaro.org> References: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> In-Reply-To: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> To: Mun Yew Tham , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Alban Bedel , Orson Zhai , Baolin Wang , Chunyan Zhang , Jay Fang , Daniel Palmer , Romain Perier , Grygorii Strashko , Santosh Shilimkar , Kevin Hilman , William Breathitt Gray Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-omap@vger.kernel.org, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the driver to immutable irq-chip with a bit of intuition. This driver require some special care: .irq_ack() was copied from dummy_irq_chip where it was defined as noop. This only makes sense if using handle_edge_irq() that will unconditionally call .irq_ack() to avoid a crash, but this driver is not ever using handle_edge_irq() so just avoid assigning .irq_ack(). A separate chip had to be created for the non-wakeup instance. Cc: Marc Zyngier Signed-off-by: Linus Walleij Acked-by: Marc Zyngier Reviewed-by: Tony Lindgren Tested-by: Tony Lindgren --- drivers/gpio/gpio-omap.c | 68 ++++++++++++++++++++++++++++++++------------= ---- 1 file changed, 45 insertions(+), 23 deletions(-) diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 292e62c06008..a5ee3ed31533 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -47,6 +48,7 @@ struct gpio_regs { struct gpio_bank { void __iomem *base; const struct omap_gpio_reg_offs *regs; + struct device *dev; =20 int irq; u32 non_wakeup_gpios; @@ -681,6 +683,7 @@ static void omap_gpio_mask_irq(struct irq_data *d) omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); omap_set_gpio_irqenable(bank, offset, 0); raw_spin_unlock_irqrestore(&bank->lock, flags); + gpiochip_disable_irq(&bank->chip, offset); } =20 static void omap_gpio_unmask_irq(struct irq_data *d) @@ -690,6 +693,7 @@ static void omap_gpio_unmask_irq(struct irq_data *d) u32 trigger =3D irqd_get_trigger_type(d); unsigned long flags; =20 + gpiochip_enable_irq(&bank->chip, offset); raw_spin_lock_irqsave(&bank->lock, flags); omap_set_gpio_irqenable(bank, offset, 1); =20 @@ -708,6 +712,40 @@ static void omap_gpio_unmask_irq(struct irq_data *d) raw_spin_unlock_irqrestore(&bank->lock, flags); } =20 +static void omap_gpio_irq_print_chip(struct irq_data *d, struct seq_file *= p) +{ + struct gpio_bank *bank =3D omap_irq_data_get_bank(d); + + seq_printf(p, dev_name(bank->dev)); +} + +static const struct irq_chip omap_gpio_irq_chip =3D { + .irq_startup =3D omap_gpio_irq_startup, + .irq_shutdown =3D omap_gpio_irq_shutdown, + .irq_mask =3D omap_gpio_mask_irq, + .irq_unmask =3D omap_gpio_unmask_irq, + .irq_set_type =3D omap_gpio_irq_type, + .irq_set_wake =3D omap_gpio_wake_enable, + .irq_bus_lock =3D omap_gpio_irq_bus_lock, + .irq_bus_sync_unlock =3D gpio_irq_bus_sync_unlock, + .irq_print_chip =3D omap_gpio_irq_print_chip, + .flags =3D IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, +}; + +static const struct irq_chip omap_gpio_irq_chip_nowake =3D { + .irq_startup =3D omap_gpio_irq_startup, + .irq_shutdown =3D omap_gpio_irq_shutdown, + .irq_mask =3D omap_gpio_mask_irq, + .irq_unmask =3D omap_gpio_unmask_irq, + .irq_set_type =3D omap_gpio_irq_type, + .irq_bus_lock =3D omap_gpio_irq_bus_lock, + .irq_bus_sync_unlock =3D gpio_irq_bus_sync_unlock, + .irq_print_chip =3D omap_gpio_irq_print_chip, + .flags =3D IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, +}; + /*---------------------------------------------------------------------*/ =20 static int omap_mpuio_suspend_noirq(struct device *dev) @@ -986,8 +1024,7 @@ static void omap_gpio_mod_init(struct gpio_bank *bank) writel_relaxed(0, base + bank->regs->ctrl); } =20 -static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *ir= qc, - struct device *pm_dev) +static int omap_gpio_chip_init(struct gpio_bank *bank, struct device *pm_d= ev) { struct gpio_irq_chip *irq; static int gpio; @@ -1023,12 +1060,12 @@ static int omap_gpio_chip_init(struct gpio_bank *ba= nk, struct irq_chip *irqc, } bank->chip.ngpio =3D bank->width; =20 + irq =3D &bank->chip.irq; /* MPUIO is a bit different, reading IRQ status clears it */ if (bank->is_mpuio && !bank->regs->wkup_en) - irqc->irq_set_wake =3D NULL; - - irq =3D &bank->chip.irq; - irq->chip =3D irqc; + gpio_irq_chip_set_chip(irq, &omap_gpio_irq_chip_nowake); + else + gpio_irq_chip_set_chip(irq, &omap_gpio_irq_chip); irq->handler =3D handle_bad_irq; irq->default_type =3D IRQ_TYPE_NONE; irq->num_parents =3D 1; @@ -1361,7 +1398,6 @@ static int omap_gpio_probe(struct platform_device *pd= ev) struct device_node *node =3D dev->of_node; const struct omap_gpio_platform_data *pdata; struct gpio_bank *bank; - struct irq_chip *irqc; int ret; =20 pdata =3D device_get_match_data(dev); @@ -1374,21 +1410,7 @@ static int omap_gpio_probe(struct platform_device *p= dev) if (!bank) return -ENOMEM; =20 - irqc =3D devm_kzalloc(dev, sizeof(*irqc), GFP_KERNEL); - if (!irqc) - return -ENOMEM; - - irqc->irq_startup =3D omap_gpio_irq_startup, - irqc->irq_shutdown =3D omap_gpio_irq_shutdown, - irqc->irq_ack =3D dummy_irq_chip.irq_ack, - irqc->irq_mask =3D omap_gpio_mask_irq, - irqc->irq_unmask =3D omap_gpio_unmask_irq, - irqc->irq_set_type =3D omap_gpio_irq_type, - irqc->irq_set_wake =3D omap_gpio_wake_enable, - irqc->irq_bus_lock =3D omap_gpio_irq_bus_lock, - irqc->irq_bus_sync_unlock =3D gpio_irq_bus_sync_unlock, - irqc->name =3D dev_name(&pdev->dev); - irqc->flags =3D IRQCHIP_MASK_ON_SUSPEND; + bank->dev =3D dev; =20 bank->irq =3D platform_get_irq(pdev, 0); if (bank->irq <=3D 0) { @@ -1452,7 +1474,7 @@ static int omap_gpio_probe(struct platform_device *pd= ev) =20 omap_gpio_mod_init(bank); =20 - ret =3D omap_gpio_chip_init(bank, irqc, dev); + ret =3D omap_gpio_chip_init(bank, dev); if (ret) { pm_runtime_put_sync(dev); pm_runtime_disable(dev); --=20 2.34.1 From nobody Thu Sep 11 20:29:52 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 112F9C64EC4 for ; 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Thu, 16 Feb 2023 01:37:25 -0800 (PST) From: Linus Walleij Date: Thu, 16 Feb 2023 10:37:17 +0100 Subject: [PATCH 16/17] gpio: pci-idio-16: Convert to immutable irq_chip MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230215-immutable-chips-v1-16-51a8f224a5d0@linaro.org> References: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> In-Reply-To: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> To: Mun Yew Tham , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Alban Bedel , Orson Zhai , Baolin Wang , Chunyan Zhang , Jay Fang , Daniel Palmer , Romain Perier , Grygorii Strashko , Santosh Shilimkar , Kevin Hilman , William Breathitt Gray Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-omap@vger.kernel.org, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the driver to immutable irq-chip with a bit of intuition. Cc: Marc Zyngier Signed-off-by: Linus Walleij Acked-by: Marc Zyngier Acked-by: William Breathitt Gray --- drivers/gpio/gpio-pci-idio-16.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-pci-idio-16.c b/drivers/gpio/gpio-pci-idio-1= 6.c index a86ce748384b..6726c32e31e6 100644 --- a/drivers/gpio/gpio-pci-idio-16.c +++ b/drivers/gpio/gpio-pci-idio-16.c @@ -107,6 +107,8 @@ static void idio_16_irq_mask(struct irq_data *data) =20 raw_spin_unlock_irqrestore(&idio16gpio->lock, flags); } + + gpiochip_disable_irq(chip, irqd_to_hwirq(data)); } =20 static void idio_16_irq_unmask(struct irq_data *data) @@ -117,6 +119,8 @@ static void idio_16_irq_unmask(struct irq_data *data) const unsigned long prev_irq_mask =3D idio16gpio->irq_mask; unsigned long flags; =20 + gpiochip_enable_irq(chip, irqd_to_hwirq(data)); + idio16gpio->irq_mask |=3D mask; =20 if (!prev_irq_mask) { @@ -138,12 +142,14 @@ static int idio_16_irq_set_type(struct irq_data *data= , unsigned int flow_type) return 0; } =20 -static struct irq_chip idio_16_irqchip =3D { +static const struct irq_chip idio_16_irqchip =3D { .name =3D "pci-idio-16", .irq_ack =3D idio_16_irq_ack, .irq_mask =3D idio_16_irq_mask, .irq_unmask =3D idio_16_irq_unmask, - .irq_set_type =3D idio_16_irq_set_type + .irq_set_type =3D idio_16_irq_set_type, + .flags =3D IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, }; =20 static irqreturn_t idio_16_irq_handler(int irq, void *dev_id) @@ -242,7 +248,7 @@ static int idio_16_probe(struct pci_dev *pdev, const st= ruct pci_device_id *id) idio_16_state_init(&idio16gpio->state); =20 girq =3D &idio16gpio->chip.irq; - girq->chip =3D &idio_16_irqchip; + gpio_irq_chip_set_chip(girq, &idio_16_irqchip); /* This will let us handle the parent IRQ in the driver */ girq->parent_handler =3D NULL; girq->num_parents =3D 0; --=20 2.34.1 From nobody Thu Sep 11 20:29:52 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3FC98C61DA4 for ; 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Thu, 16 Feb 2023 01:37:26 -0800 (PST) From: Linus Walleij Date: Thu, 16 Feb 2023 10:37:18 +0100 Subject: [PATCH 17/17] gpio: pcie-idio-24: Convert to immutable irq_chip MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230215-immutable-chips-v1-17-51a8f224a5d0@linaro.org> References: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> In-Reply-To: <20230215-immutable-chips-v1-0-51a8f224a5d0@linaro.org> To: Mun Yew Tham , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Alban Bedel , Orson Zhai , Baolin Wang , Chunyan Zhang , Jay Fang , Daniel Palmer , Romain Perier , Grygorii Strashko , Santosh Shilimkar , Kevin Hilman , William Breathitt Gray Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-omap@vger.kernel.org, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the driver to immutable irq-chip with a bit of intuition. Cc: Marc Zyngier Signed-off-by: Linus Walleij Acked-by: Marc Zyngier Acked-by: William Breathitt Gray --- drivers/gpio/gpio-pcie-idio-24.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-pcie-idio-24.c b/drivers/gpio/gpio-pcie-idio= -24.c index 8a9b98fa418f..ac42150f4009 100644 --- a/drivers/gpio/gpio-pcie-idio-24.c +++ b/drivers/gpio/gpio-pcie-idio-24.c @@ -396,6 +396,8 @@ static void idio_24_irq_mask(struct irq_data *data) } =20 raw_spin_unlock_irqrestore(&idio24gpio->lock, flags); + + gpiochip_disable_irq(chip, irqd_to_hwirq(data)); } =20 static void idio_24_irq_unmask(struct irq_data *data) @@ -408,6 +410,8 @@ static void idio_24_irq_unmask(struct irq_data *data) const unsigned long bank_offset =3D bit_offset / 8; unsigned char cos_enable_state; =20 + gpiochip_enable_irq(chip, irqd_to_hwirq(data)); + raw_spin_lock_irqsave(&idio24gpio->lock, flags); =20 prev_irq_mask =3D idio24gpio->irq_mask >> bank_offset * 8; @@ -437,12 +441,14 @@ static int idio_24_irq_set_type(struct irq_data *data= , unsigned int flow_type) return 0; } =20 -static struct irq_chip idio_24_irqchip =3D { +static const struct irq_chip idio_24_irqchip =3D { .name =3D "pcie-idio-24", .irq_ack =3D idio_24_irq_ack, .irq_mask =3D idio_24_irq_mask, .irq_unmask =3D idio_24_irq_unmask, - .irq_set_type =3D idio_24_irq_set_type + .irq_set_type =3D idio_24_irq_set_type, + .flags =3D IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, }; =20 static irqreturn_t idio_24_irq_handler(int irq, void *dev_id) @@ -535,7 +541,7 @@ static int idio_24_probe(struct pci_dev *pdev, const st= ruct pci_device_id *id) idio24gpio->chip.set_multiple =3D idio_24_gpio_set_multiple; =20 girq =3D &idio24gpio->chip.irq; - girq->chip =3D &idio_24_irqchip; + gpio_irq_chip_set_chip(girq, &idio_24_irqchip); /* This will let us handle the parent IRQ in the driver */ girq->parent_handler =3D NULL; girq->num_parents =3D 0; --=20 2.34.1