From nobody Fri Sep 12 02:46:09 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D286CC64ED8 for ; Tue, 14 Feb 2023 15:57:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233273AbjBNP5a (ORCPT ); Tue, 14 Feb 2023 10:57:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39482 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232832AbjBNP50 (ORCPT ); Tue, 14 Feb 2023 10:57:26 -0500 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [IPv6:2a00:1450:4864:20::331]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9CD2625968 for ; Tue, 14 Feb 2023 07:57:21 -0800 (PST) Received: by mail-wm1-x331.google.com with SMTP id f47-20020a05600c492f00b003dc584a7b7eso13997122wmp.3 for ; Tue, 14 Feb 2023 07:57:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=KBKUFOg3aIZtzc5AANsCexRTxeA9fGhbkcwkIm+GvMw=; b=GzjrxgIcUlnIS+xbxRnaKHygDy3cpWQiWUzEnCGZ+NcM1GKjUMEF9Q60NWwZNTgDQU YI16PQ/4fM5ciNCDkTWV1SPuEsksqdO8qpNnrX7pMDz/KVVzpm/ubNyDEClIOjlBVBlc nB2YP57Obvy6HlrcAHm0/O5TLXyYRJ6RRmA8atymsIdbG0ivvAf87kALKhsuyqOuw40H AfiKpfEcpFX7C+4nwEkkEjk8XGHVnRiuDMUVe61bnDow1hUX7Fi2q+Ej4HcCd6NeSe2/ P6UA2I6N5/xawTR/NOlGRT7bQrdDAuciID7mDcmbCuGftsn3by+QtsVIClP86IwgPKXS aX8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=KBKUFOg3aIZtzc5AANsCexRTxeA9fGhbkcwkIm+GvMw=; b=sAYS46D7kL8dStbi1RCeTqZYs5L/cRyNuigfgFCf8+Sx66gffjRP57YxH0jmwSVSAn rzH07H6FtfvfVN0NJ2hXrM/quNHpNmFJRIxrnm2r75cAlzHHYLiRcIVQdxavAv5c5RPd hlBdX7L50mLCoMVFFtOsTHD812Zl0E0slyFotUG/OWRkiAtexNFTpeD1VoAtjX9tKuwe gTs/0gKJAHkK4InOvZjBmr0jfN90Z4oXaOKyYCjnD/GsjONcQZuSpGdiDDH/K/s8AoZN BIy4plQmagHGYZUyeW64MFmx1iO34XI0FyeyrMyp7H36TP3Cg3fiCkIc6O+FugrUhjkb FTAA== X-Gm-Message-State: AO0yUKWApDPsHZheT+3v0aVNBwkpizuBJRcHOmQUENjG7v+qiFXFrfgM ShV7ywp/+Hdoto738/pPrUT2dw== X-Google-Smtp-Source: AK7set8DqzIZvpNNbo4TuYiHcIs46x6Az2E8t7623RvDlEIhPG0Cnz3LzIAJlgwYz+8a4U4eNccGpQ== X-Received: by 2002:a1c:cc07:0:b0:3dc:55e6:fffd with SMTP id h7-20020a1ccc07000000b003dc55e6fffdmr2373232wmb.15.1676390238815; Tue, 14 Feb 2023 07:57:18 -0800 (PST) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:6e4b:bef:7edd:1af1]) by smtp.gmail.com with ESMTPSA id x2-20020a1c7c02000000b003df30c94850sm20451924wmc.25.2023.02.14.07.57.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Feb 2023 07:57:18 -0800 (PST) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH 1/3] arm64: dts: qcom: sa8775p: add the i2c node for sa8775p-ride Date: Tue, 14 Feb 2023 16:57:13 +0100 Message-Id: <20230214155715.451130-2-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230214155715.451130-1-brgl@bgdev.pl> References: <20230214155715.451130-1-brgl@bgdev.pl> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Bartosz Golaszewski Add the i2c node for the interface exposed on the sa8775p-ride board. Signed-off-by: Bartosz Golaszewski --- arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 19 +++++++++++++ arch/arm64/boot/dts/qcom/sa8775p.dtsi | 34 +++++++++++++++++++++++ 2 files changed, 53 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dt= s/qcom/sa8775p-ride.dts index 3adf7349f4e5..5fdce8279537 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts @@ -13,6 +13,7 @@ / { =20 aliases { serial0 =3D &uart10; + i2c18 =3D &i2c18; }; =20 chosen { @@ -20,10 +21,21 @@ chosen { }; }; =20 +&i2c18 { + clock-frequency =3D <400000>; + pinctrl-0 =3D <&qup_i2c18_default>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + &qupv3_id_1 { status =3D "okay"; }; =20 +&qupv3_id_2 { + status =3D "okay"; +}; + &sleep_clk { clock-frequency =3D <32764>; }; @@ -33,6 +45,13 @@ qup_uart10_default: qup-uart10-state { pins =3D "gpio46", "gpio47"; function =3D "qup1_se3"; }; + + qup_i2c18_default: qup-i2c18-state { + pins =3D "gpio95", "gpio96"; + function =3D "qup2_se4"; + drive-strength =3D <2>; + bias-pull-up; + }; }; =20 &uart10 { diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qc= om/sa8775p.dtsi index 565c1376073e..82582825f92a 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -491,6 +491,40 @@ &clk_virt SLAVE_QUP_CORE_1 0>, }; }; =20 + qupv3_id_2: geniqup@8c0000 { + compatible =3D "qcom,geni-se-qup"; + reg =3D <0x0 0x8c0000 0x0 0x6000>; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + clock-names =3D "m-ahb", "s-ahb"; + clocks =3D <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>, + <&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>; + iommus =3D <&apps_smmu 0x5a3 0x0>; + status =3D "disabled"; + + i2c18: i2c@890000 { + compatible =3D "qcom,geni-i2c"; + reg =3D <0x0 0x890000 0x0 0x4000>; + #address-cells =3D <1>; + #size-cells =3D <0>; + interrupts =3D ; + clock-names =3D "se"; + clocks =3D <&gcc GCC_QUPV3_WRAP2_S4_CLK>; + interconnects =3D <&clk_virt MASTER_QUP_CORE_2 0 + &clk_virt SLAVE_QUP_CORE_2 0>, + <&gem_noc MASTER_APPSS_PROC 0 + &config_noc SLAVE_QUP_2 0>, + <&aggre2_noc MASTER_QUP_2 0 + &mc_virt SLAVE_EBI1 0>; + interconnect-names =3D "qup-core", + "qup-config", + "qup-memory"; + power-domains =3D <&rpmhpd SA8775P_CX>; + status =3D "disabled"; + }; + }; + intc: interrupt-controller@17a00000 { compatible =3D "arm,gic-v3"; reg =3D <0x0 0x17a00000 0x0 0x10000>, /* GICD */ --=20 2.37.2