From nobody Sat Sep 21 04:37:57 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D190CC61DA4 for ; Tue, 14 Feb 2023 10:56:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232085AbjBNK4b (ORCPT ); Tue, 14 Feb 2023 05:56:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36216 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229713AbjBNK42 (ORCPT ); Tue, 14 Feb 2023 05:56:28 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6E36259F6 for ; Tue, 14 Feb 2023 02:56:27 -0800 (PST) X-UUID: 3895816eac5611eda06fc9ecc4dadd91-20230214 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=kV0J1/FM+1iF9G81TOXk0JsrKpONZFmg5K8V55ImZCc=; b=RepwRWiBWI6i45+6C6PeDRP2m9i89Gvrf4GAjBk7ITvuyiHJhnn7uo/GX2L+EtjH3dkjXElft8jVadvf0YaoO80vR7HBUheCOuue6MoqIJB10eqA9apn3dTofTzgcvmwGnW8LOdcSJjFHzVVg2+snTWLhH5xotb4J+7AqtTc1RY=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.19,REQID:18e0cb29-2856-447f-b843-7efa5073caf2,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:100,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:100 X-CID-INFO: VERSION:1.1.19,REQID:18e0cb29-2856-447f-b843-7efa5073caf2,IP:0,URL :0,TC:0,Content:0,EDM:0,RT:0,SF:100,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTIO N:quarantine,TS:100 X-CID-META: VersionHash:885ddb2,CLOUDID:5cbb69b0-beed-4dfc-bd9c-e1b22fa6ccc4,B ulkID:23021418562454WU8JHL,BulkQuantity:0,Recheck:0,SF:38|29|28|17|19|48,T C:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 ,OSI:0,OSA:0,AV:0 X-CID-BVR: 0,NGT X-UUID: 3895816eac5611eda06fc9ecc4dadd91-20230214 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1501535501; Tue, 14 Feb 2023 18:56:23 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Tue, 14 Feb 2023 18:56:22 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 14 Feb 2023 18:56:22 +0800 From: To: Daniel Lezcano , Thomas Gleixner , Matthias Brugger , AngeloGioacchino Del Regno , "Maciej W . Rozycki" , John Stultz , "Krzysztof Kozlowski" CC: , , , , Chun-Hung Wu , , , Subject: [PATCH v2 1/4] time/sched_clock: Export sched_clock_register() Date: Tue, 14 Feb 2023 18:53:11 +0800 Message-ID: <20230214105412.5856-2-walter.chang@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230214105412.5856-1-walter.chang@mediatek.com> References: <20230214105412.5856-1-walter.chang@mediatek.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Chun-Hung Wu clocksource driver may use sched_clock_register() to resigter itself as a sched_clock source. Export it to support building such driver as module, like timer-mediatek.c Signed-off-by: Chun-Hung Wu --- kernel/time/sched_clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/kernel/time/sched_clock.c b/kernel/time/sched_clock.c index 8464c5acc913..8e49e87d1221 100644 --- a/kernel/time/sched_clock.c +++ b/kernel/time/sched_clock.c @@ -150,8 +150,7 @@ static enum hrtimer_restart sched_clock_poll(struct hrt= imer *hrt) return HRTIMER_RESTART; } =20 -void __init -sched_clock_register(u64 (*read)(void), int bits, unsigned long rate) +void sched_clock_register(u64 (*read)(void), int bits, unsigned long rate) { u64 res, wrap, new_mask, new_epoch, cyc, ns; u32 new_mult, new_shift; @@ -223,6 +222,7 @@ sched_clock_register(u64 (*read)(void), int bits, unsig= ned long rate) =20 pr_debug("Registered %pS as sched_clock source\n", read); } +EXPORT_SYMBOL_GPL(sched_clock_register); =20 void __init generic_sched_clock_init(void) { --=20 2.18.0