From nobody Fri Sep 12 18:14:34 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B4E2C05027 for ; Wed, 8 Feb 2023 16:02:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231429AbjBHQC6 (ORCPT ); Wed, 8 Feb 2023 11:02:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47160 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230443AbjBHQCv (ORCPT ); Wed, 8 Feb 2023 11:02:51 -0500 Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::224]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D92EF4B763; Wed, 8 Feb 2023 08:02:45 -0800 (PST) Received: (Authenticated sender: clement.leger@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id A80B4E0002; Wed, 8 Feb 2023 16:02:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1675872164; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yID+HSZHZsFysNyH5E4J8FFNrJg4SULKzIRkEIsJkjo=; b=IzAjIoojZ8Kk65VKkK92EG1YmUuAoJMLiOF/V4dkjRD/g6rtOC6giExPvRH/gYD5NM9cCq moR5jkkl8yoG9waJK5IY8Pf+hEdN8ZiIMI9ufxQZdYZwS+dqdPDuFo3GqrXgewIlHe3PQ3 eO2IlXr3FVCyxYmtQk1Z3hsMILdkLodzVFHVobUlFF5P5kppKWy5jUjLIXtOybbKuAAyp4 dmVmbZurNyVXtrC0uh+69vvbnagV0UCCC/iStz6EXcAeUKY9/KLbc6VocCEuqKItosoQfm 3h28i+eKfnxkIsNFaM+/ltEpWwYqu/g7qyd4OdyB6YC0MW6VLpmc4DjvCceJCA== From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= To: Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= , Thomas Petazzoni , Herve Codina , =?UTF-8?q?Miqu=C3=A8l=20Raynal?= , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Arun Ramadoss , linux-renesas-soc@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/3] net: dsa: rzn1-a5psw: use a5psw_reg_rmw() to modify flooding resolution Date: Wed, 8 Feb 2023 17:04:51 +0100 Message-Id: <20230208160453.325783-2-clement.leger@bootlin.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230208160453.325783-1-clement.leger@bootlin.com> References: <20230208160453.325783-1-clement.leger@bootlin.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org .port_bridge_flags will be added and allows to modify the flood mask independently for each port. Keeping the existing bridged_ports write in a5psw_flooding_set_resolution() would potentially messed up this. Use a read-modify-write to set that value and move bridged_ports handling in bridge_port_join/leave. Signed-off-by: Cl=C3=A9ment L=C3=A9ger --- drivers/net/dsa/rzn1_a5psw.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/net/dsa/rzn1_a5psw.c b/drivers/net/dsa/rzn1_a5psw.c index 919027cf2012..8b7d4a371f8b 100644 --- a/drivers/net/dsa/rzn1_a5psw.c +++ b/drivers/net/dsa/rzn1_a5psw.c @@ -299,13 +299,9 @@ static void a5psw_flooding_set_resolution(struct a5psw= *a5psw, int port, A5PSW_MCAST_DEF_MASK}; int i; =20 - if (set) - a5psw->bridged_ports |=3D BIT(port); - else - a5psw->bridged_ports &=3D ~BIT(port); - for (i =3D 0; i < ARRAY_SIZE(offsets); i++) - a5psw_reg_writel(a5psw, offsets[i], a5psw->bridged_ports); + a5psw_reg_rmw(a5psw, offsets[i], BIT(port), + set ? BIT(port) : 0); } =20 static int a5psw_port_bridge_join(struct dsa_switch *ds, int port, @@ -326,6 +322,8 @@ static int a5psw_port_bridge_join(struct dsa_switch *ds= , int port, a5psw_flooding_set_resolution(a5psw, port, true); a5psw_port_mgmtfwd_set(a5psw, port, false); =20 + a5psw->bridged_ports |=3D BIT(port); + return 0; } =20 @@ -334,6 +332,8 @@ static void a5psw_port_bridge_leave(struct dsa_switch *= ds, int port, { struct a5psw *a5psw =3D ds->priv; =20 + a5psw->bridged_ports &=3D ~BIT(port); + a5psw_flooding_set_resolution(a5psw, port, false); a5psw_port_mgmtfwd_set(a5psw, port, true); =20 --=20 2.39.0