From nobody Sat Sep 21 05:33:42 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 016ADC636CC for ; Wed, 8 Feb 2023 10:46:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230012AbjBHKp6 (ORCPT ); Wed, 8 Feb 2023 05:45:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55690 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230010AbjBHKpy (ORCPT ); Wed, 8 Feb 2023 05:45:54 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6353847EFC; Wed, 8 Feb 2023 02:45:37 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 724466602091; Wed, 8 Feb 2023 10:45:35 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675853136; bh=DG0Bfe4ArjgFwtknCIsWC7PDxg3CMEPnouLpXP/YXz4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mbSIEeCx3m5ABKgI70bBZlZl72M3m+skFht303Hzt8fhtoCvG9St6GkUQpii7FiVr kBqJ1MkVDcoiZqE5iBf1rV9QCMXuA1r12odYfNycoB0KzRtt1byoEaEPV9AHwu8ZdU Kco5xghQWkzMyG0c4ZBLzZWELpCObGNygTH93Wdnseeuru6frEFZLEgeBAFdYBA6no OmW33r7rjrKw0mKEopkp19ulQQmjUBnIiOGolUcPeqKDoYDFLbBgksMDuUlB4uG7T1 qwS29jePIo4NTFRXPqcbx2UVIJyx973ZDn4BdRRAT+UJVlhq7pBo/ZkJBWSIfNc/Kl 7sbf726tnsoFw== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH 01/16] arm64: dts: mediatek: mt8183-kukui: Couple VGPU and VSRAM_GPU regulators Date: Wed, 8 Feb 2023 11:45:12 +0100 Message-Id: <20230208104527.118929-2-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> References: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add coupling for these regulators, as they have a strict voltage output relation to satisfy in order to ensure GPU stable operation. Signed-off-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/bo= ot/dts/mediatek/mt8183-kukui.dtsi index fbe14b13051a..de9778c85b94 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi @@ -294,7 +294,6 @@ dsi_out: endpoint { =20 &gpu { mali-supply =3D <&mt6358_vgpu_reg>; - sram-supply =3D <&mt6358_vsram_gpu_reg>; }; =20 &i2c0 { @@ -401,6 +400,11 @@ &mt6358codec { Avdd-supply =3D <&mt6358_vaud28_reg>; }; =20 +&mt6358_vgpu_reg { + regulator-coupled-with =3D <&mt6358_vsram_gpu_reg>; + regulator-coupled-max-spread =3D <100000>; +}; + &mt6358_vsim1_reg { regulator-min-microvolt =3D <2700000>; regulator-max-microvolt =3D <2700000>; @@ -411,6 +415,11 @@ &mt6358_vsim2_reg { regulator-max-microvolt =3D <2700000>; }; =20 +&mt6358_vsram_gpu_reg { + regulator-coupled-with =3D <&mt6358_vgpu_reg>; + regulator-coupled-max-spread =3D <100000>; +}; + &pio { aud_pins_default: audiopins { pins_bus { --=20 2.39.1 From nobody Sat Sep 21 05:33:42 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 786D6C636CC for ; Wed, 8 Feb 2023 10:46:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230255AbjBHKqC (ORCPT ); Wed, 8 Feb 2023 05:46:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55732 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230061AbjBHKpz (ORCPT ); Wed, 8 Feb 2023 05:45:55 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 027A43CE33; Wed, 8 Feb 2023 02:45:37 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 2FE266602096; Wed, 8 Feb 2023 10:45:36 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675853136; bh=LMUmM4vzAct44Jl/7e6cb9I2iurl6RcV+++kY88mRLk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dS9ePikT1qyVvkG1GPge4M8E6i6rRCXNQ8xnDipYzQ3mFWJHfaUeRYlLvsRu9uvRL 7UfMdgplKCZa7TfcqhmC3s40g2D/O2djH0Rk7pmJqx42mLSQ4vsGXbBT23Qq+RYnmO OBRTp/N4QHtg1GRWYRRTWyFLB4V3FPWWwp8h2DRF6nW6oSEUPH10KDz1OjQO6Q0Kie bXM28Iq1BAxvuR78j+ifj519bnQzpKkRTezycr0BGiDDLEhejcHrdH09rJvvnu4CfC A3qrtZXoCHsHXSs/AW0WgTsuMlRWrnNEDUzlvRXZt2iQ7968w0L/Hwic5J9I+5XRP8 e8ofEfmf8vBvg== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH 02/16] arm64: dts: mediatek: mt8183-kukui: Override vgpu/vsram_gpu constraints Date: Wed, 8 Feb 2023 11:45:13 +0100 Message-Id: <20230208104527.118929-3-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> References: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Override the PMIC-default voltage constraints for VGPU and VSRAM_GPU with the platform specific vmin/vmax for the highest possible SoC binning. Signed-off-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/bo= ot/dts/mediatek/mt8183-kukui.dtsi index de9778c85b94..63952c1251df 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi @@ -401,6 +401,9 @@ &mt6358codec { }; =20 &mt6358_vgpu_reg { + regulator-min-microvolt =3D <625000>; + regulator-max-microvolt =3D <900000>; + regulator-coupled-with =3D <&mt6358_vsram_gpu_reg>; regulator-coupled-max-spread =3D <100000>; }; @@ -416,6 +419,9 @@ &mt6358_vsim2_reg { }; =20 &mt6358_vsram_gpu_reg { + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <1000000>; + regulator-coupled-with =3D <&mt6358_vgpu_reg>; regulator-coupled-max-spread =3D <100000>; }; --=20 2.39.1 From nobody Sat Sep 21 05:33:42 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A678EC636CC for ; Wed, 8 Feb 2023 10:46:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230011AbjBHKqE (ORCPT ); Wed, 8 Feb 2023 05:46:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55778 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230075AbjBHKp5 (ORCPT ); Wed, 8 Feb 2023 05:45:57 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A6D0C485A9; Wed, 8 Feb 2023 02:45:38 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id E13106602099; Wed, 8 Feb 2023 10:45:36 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675853137; bh=y3W7yP7Ac6BhD3Nqa1Z2d+TnyQQzObAMhPLknN7rkrU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=aOGw/bcKnIux+v+A+Cs6S3Xqa5lc03FKe1QneTEgdyafIwHuJkEBG1OkepL+hTMdq CiM4GlzC1SxeXHL/8NwLryTxXO9swe9R9kMVn0ZK/GqzsZ1zUDW3TFc9gQRD1QBEX9 S/Em/M3bv3qe/1zWnJaYp+r42OvCxPW1/p0jFxwEj1kQqsev8WjVLpzKHgmFszWhRY kfjzrk9McI1O/b3bwfYgm67GSYgwBiA4bj+aPNtrHvZo8NEKo9su9zqfcVDGun+Hfb PcwvKHuIBeEB+QhnG4y9uV1ALB1Iwp8T0Pig5xtop2hjVhsBwbj6DzRzf9WUsOte66 cwAQkKHsuCRUA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH 03/16] arm64: dts: mediatek: mt8183: Remove second opp-microvolt entries from gpu table Date: Wed, 8 Feb 2023 11:45:14 +0100 Message-Id: <20230208104527.118929-4-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> References: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This was done to keep a strict relation between VSRAM and VGPU, but it never worked: now we're doing it transparently with the new mediatek-regulator-coupler driver. Signed-off-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 32 ++++++++++++------------ 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts= /mediatek/mt8183.dtsi index 3d1d7870a5f1..e01b96adef02 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -563,82 +563,82 @@ gpu_opp_table: opp-table-0 { =20 opp-300000000 { opp-hz =3D /bits/ 64 <300000000>; - opp-microvolt =3D <625000>, <850000>; + opp-microvolt =3D <625000>; }; =20 opp-320000000 { opp-hz =3D /bits/ 64 <320000000>; - opp-microvolt =3D <631250>, <850000>; + opp-microvolt =3D <631250>; }; =20 opp-340000000 { opp-hz =3D /bits/ 64 <340000000>; - opp-microvolt =3D <637500>, <850000>; + opp-microvolt =3D <637500>; }; =20 opp-360000000 { opp-hz =3D /bits/ 64 <360000000>; - opp-microvolt =3D <643750>, <850000>; + opp-microvolt =3D <643750>; }; =20 opp-380000000 { opp-hz =3D /bits/ 64 <380000000>; - opp-microvolt =3D <650000>, <850000>; + opp-microvolt =3D <650000>; }; =20 opp-400000000 { opp-hz =3D /bits/ 64 <400000000>; - opp-microvolt =3D <656250>, <850000>; + opp-microvolt =3D <656250>; }; =20 opp-420000000 { opp-hz =3D /bits/ 64 <420000000>; - opp-microvolt =3D <662500>, <850000>; + opp-microvolt =3D <662500>; }; =20 opp-460000000 { opp-hz =3D /bits/ 64 <460000000>; - opp-microvolt =3D <675000>, <850000>; + opp-microvolt =3D <675000>; }; =20 opp-500000000 { opp-hz =3D /bits/ 64 <500000000>; - opp-microvolt =3D <687500>, <850000>; + opp-microvolt =3D <687500>; }; =20 opp-540000000 { opp-hz =3D /bits/ 64 <540000000>; - opp-microvolt =3D <700000>, <850000>; + opp-microvolt =3D <700000>; }; =20 opp-580000000 { opp-hz =3D /bits/ 64 <580000000>; - opp-microvolt =3D <712500>, <850000>; + opp-microvolt =3D <712500>; }; =20 opp-620000000 { opp-hz =3D /bits/ 64 <620000000>; - opp-microvolt =3D <725000>, <850000>; + opp-microvolt =3D <725000>; }; =20 opp-653000000 { opp-hz =3D /bits/ 64 <653000000>; - opp-microvolt =3D <743750>, <850000>; + opp-microvolt =3D <743750>; }; =20 opp-698000000 { opp-hz =3D /bits/ 64 <698000000>; - opp-microvolt =3D <768750>, <868750>; + opp-microvolt =3D <768750>; }; =20 opp-743000000 { opp-hz =3D /bits/ 64 <743000000>; - opp-microvolt =3D <793750>, <893750>; + opp-microvolt =3D <793750>; }; =20 opp-800000000 { opp-hz =3D /bits/ 64 <800000000>; - opp-microvolt =3D <825000>, <925000>; + opp-microvolt =3D <825000>; }; }; =20 --=20 2.39.1 From nobody Sat Sep 21 05:33:42 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1F8D2C05027 for ; Wed, 8 Feb 2023 10:46:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230359AbjBHKqH (ORCPT ); Wed, 8 Feb 2023 05:46:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55708 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230099AbjBHKp6 (ORCPT ); Wed, 8 Feb 2023 05:45:58 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 71D40474F8; Wed, 8 Feb 2023 02:45:39 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 9EEA3660209A; Wed, 8 Feb 2023 10:45:37 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675853138; bh=q6sTRzzpp6l1Y7FFoNdLPC+xxTx63E74abBtY/8WPTY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Jx8JW+uKpa4vJ4cTBiKbg9MOdA1JWYQtQ4xajYxH7ddT1fiVIpZwavll8AzKGxjSb ApatJ7ZzvrOWRaKal/1gJkIJTrxoIxQCDwsmWt9wvr2JpfVrK9s2nhof7GUbBbDae+ 3GeCn1eHCFvQe2mksa0/3dGZen4u+GIf5CXVRA0ul51VCJCAqLbqv55kYDhWeO+Puw L4/362ubdORsOjUsmWvH9ZSl0ZaRaBHmLUhe+oiRdoTktkWbVpi7Akrj4602x9Er7K sgtkJJerSWGYhpTnKoyaYE3z6wQtWEIeIQIoyu3B2SbMP8uzHj1XCPfiQUfrPSjDcn B6XbAOk4nabcQ== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH 04/16] arm64: dts: mt8183-pumpkin: Couple VGPU and VSRAM_GPU regulators Date: Wed, 8 Feb 2023 11:45:15 +0100 Message-Id: <20230208104527.118929-5-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> References: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add coupling for these regulators, as they have a strict voltage output relation to satisfy in order to ensure GPU stable operation. Signed-off-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts b/arch/arm64/b= oot/dts/mediatek/mt8183-pumpkin.dts index a1d01639df30..c228f04d086b 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts +++ b/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts @@ -71,7 +71,6 @@ &auxadc { =20 &gpu { mali-supply =3D <&mt6358_vgpu_reg>; - sram-supply =3D <&mt6358_vsram_gpu_reg>; }; =20 &i2c0 { @@ -176,6 +175,16 @@ &mmc1 { non-removable; }; =20 +&mt6358_vgpu_reg { + regulator-coupled-with =3D <&mt6358_vsram_gpu_reg>; + regulator-coupled-max-spread =3D <100000>; +}; + +&mt6358_vsram_gpu_reg { + regulator-coupled-with =3D <&mt6358_vgpu_reg>; + regulator-coupled-max-spread =3D <100000>; +}; + &pio { i2c_pins_0: i2c0 { pins_i2c{ --=20 2.39.1 From nobody Sat Sep 21 05:33:42 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C3FEFC636D7 for ; Wed, 8 Feb 2023 10:46:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230428AbjBHKqO (ORCPT ); Wed, 8 Feb 2023 05:46:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55976 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230318AbjBHKqG (ORCPT ); Wed, 8 Feb 2023 05:46:06 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 13DBC46732; Wed, 8 Feb 2023 02:45:52 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 5DEA6660209C; Wed, 8 Feb 2023 10:45:38 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675853138; bh=nu5FYZsnPFAVWmbSA0uh1P/PeQOm2sp/3Qs74+sQfWA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=h9gt4jp+/P+cNY6TiGYL98byS0kBziBTO+TSLm56g3gN6mkoMw3xRPyqfe7CLbn2M +9z+EzK2m8fkqQFzO4iHdSvNMQo+GBS2PNvE8ijh0CJ8GTUxw7sr7JY5lSLvpJLGVn 62R5YoZtXD4TiFnWOLEq2cAQ3tN+Tr81JkKWBP3EOEsqJcd7gwF8Nole8+BEl759xI uTaIgnUlpuuw7++AP9RjozzwWESQ6zJc9cy07Ynba9zorI1UEH+lYuY9QRJa+7xury AGuQH7IvahFqbOERi0Prj//CYQA0WFHsW8iqWfeuX+MG6uUHsii1Do6yD1F1fgZvoN ubnrmMFHK9nnA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH 05/16] arm64: dts: mediatek: mt8183-evb: Couple VGPU and VSRAM_GPU regulators Date: Wed, 8 Feb 2023 11:45:16 +0100 Message-Id: <20230208104527.118929-6-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> References: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add coupling for these regulators, as they have a strict voltage output relation to satisfy in order to ensure GPU stable operation. Signed-off-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/= dts/mediatek/mt8183-evb.dts index 52dc4a50e34d..fd327437e932 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts @@ -52,7 +52,6 @@ &auxadc { =20 &gpu { mali-supply =3D <&mt6358_vgpu_reg>; - sram-supply =3D <&mt6358_vsram_gpu_reg>; }; =20 &i2c0 { @@ -138,6 +137,16 @@ &mmc1 { non-removable; }; =20 +&mt6358_vgpu_reg { + regulator-coupled-with =3D <&mt6358_vsram_gpu_reg>; + regulator-coupled-max-spread =3D <100000>; +}; + +&mt6358_vsram_gpu_reg { + regulator-coupled-with =3D <&mt6358_vgpu_reg>; + regulator-coupled-max-spread =3D <100000>; +}; + &pio { i2c_pins_0: i2c0{ pins_i2c{ --=20 2.39.1 From nobody Sat Sep 21 05:33:42 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BEE7CC64EC6 for ; Wed, 8 Feb 2023 10:46:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230504AbjBHKqQ (ORCPT ); Wed, 8 Feb 2023 05:46:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55970 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230312AbjBHKqG (ORCPT ); Wed, 8 Feb 2023 05:46:06 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0ADE3A247; Wed, 8 Feb 2023 02:45:52 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 1DBC3660209D; Wed, 8 Feb 2023 10:45:39 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675853139; bh=Kyw2J37yTMs+/IFvIgq6RScB8xGutn0waYPGo+ad3gc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mdMKI0XCYWOhNvof5hBIFwXJUvk9MzRLZC/RzM0UbxJPth8f1ceEu1P/rrMv08dvj QTLnGz61+Am649UnQQRL3z1vgKDccBjKXs7LAAp4w1d4Ce2tcuVGhR020aOrnxrtQG v4d1qeAH+K6Vb/5nva8X3T2cKgac829z6pm5exAcnpAMdf0D1Ew7Hi+WRxe2T3nVGj SBvnyJLqFK57rRmYDIOCVOCsiJXxtdFQwjJJdL2hjja8hjFvalj+vXzEkG9HMc1jzA 0YC+E0QBzQvRFqts1r6QTnLR2hGBXSp6bFt6NGzlKFuY3QICLo2YtMe95bs09Hwphc Xj6yRdkExi5oQ== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH 06/16] arm64: dts: mediatek: mt8183: Use mediatek,mt8183b-mali as GPU compatible Date: Wed, 8 Feb 2023 11:45:17 +0100 Message-Id: <20230208104527.118929-7-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> References: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Use the new GPU related compatible to finally enable GPU DVFS on the MT8183 SoC. Signed-off-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts= /mediatek/mt8183.dtsi index e01b96adef02..5169779d01df 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -1752,7 +1752,7 @@ mfgcfg: syscon@13000000 { }; =20 gpu: gpu@13040000 { - compatible =3D "mediatek,mt8183-mali", "arm,mali-bifrost"; + compatible =3D "mediatek,mt8183b-mali", "arm,mali-bifrost"; reg =3D <0 0x13040000 0 0x4000>; interrupts =3D , --=20 2.39.1 From nobody Sat Sep 21 05:33:42 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 164BBC636D7 for ; Wed, 8 Feb 2023 10:46:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231194AbjBHKqX (ORCPT ); Wed, 8 Feb 2023 05:46:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55852 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230360AbjBHKqI (ORCPT ); Wed, 8 Feb 2023 05:46:08 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B609148A09; Wed, 8 Feb 2023 02:45:55 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id D895C660209E; Wed, 8 Feb 2023 10:45:39 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675853140; bh=2mLbG6KQbvIfjCRIOof5GfUz/nYzigC0owDNFw1Joqc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ghwVyJ7PXqPayD5Gg4nM8GNqZcEmjQlqM6njyuiDmsl+buoN+QGRwFTHl+eEo0IfF iPSfssj8YORj5JrwhR1A+xcy8lnT9yHeu1l543VLJkpcOaBEmqX4PyRP6VCyLB/aQt lSTAj1m/AQaMaRmTLkfZyFx7LiSMvbBXGj9OqLvyi3OK3eWuDQhelrBLpkapa2mnyV Gx5OeKd14y4tMFy8uq0KEWXUeHhrcVoYfaf7jX6BmW9Wy4q5oGBfBRUAIyz9V9js4k cxs93kjoX1zj3Lcy4GMDLagLxx70YKXxVO4X5lR31Q+zHeWTkccg4PBo5Hk+obBDhd tDjPM3fjs46bA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org, Alyssa Rosenzweig , =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= Subject: [PATCH 07/16] arm64: dts: mediatek: mt8192: Add GPU nodes Date: Wed, 8 Feb 2023 11:45:18 +0100 Message-Id: <20230208104527.118929-8-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> References: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Alyssa Rosenzweig The MediaTek MT8192 includes a Mali-G57 GPU supported in Panfrost. Add the GPU node to the device tree to enable 3D acceleration. The GPU node is disabled by default. It should be enabled by board with its power supplies correctly assigned. Signed-off-by: Alyssa Rosenzweig [nfraprado: removed sram supply, tweaked opp node name, adjusted commit mes= sage] Signed-off-by: N=C3=ADcolas F. R. A. Prado [wenst@: disable GPU by default; adjusted prefix; split out board change] Signed-off-by: Chen-Yu Tsai Signed-off-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 109 +++++++++++++++++++++++ 1 file changed, 109 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts= /mediatek/mt8192.dtsi index 87b91c8feaf9..a60120088d45 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -312,6 +312,91 @@ timer: timer { clock-frequency =3D <13000000>; }; =20 + gpu_opp_table: opp-table-0 { + compatible =3D "operating-points-v2"; + opp-shared; + + opp-358000000 { + opp-hz =3D /bits/ 64 <358000000>; + opp-microvolt =3D <606250>; + }; + + opp-399000000 { + opp-hz =3D /bits/ 64 <399000000>; + opp-microvolt =3D <618750>; + }; + + opp-440000000 { + opp-hz =3D /bits/ 64 <440000000>; + opp-microvolt =3D <631250>; + }; + + opp-482000000 { + opp-hz =3D /bits/ 64 <482000000>; + opp-microvolt =3D <643750>; + }; + + opp-523000000 { + opp-hz =3D /bits/ 64 <523000000>; + opp-microvolt =3D <656250>; + }; + + opp-564000000 { + opp-hz =3D /bits/ 64 <564000000>; + opp-microvolt =3D <668750>; + }; + + opp-605000000 { + opp-hz =3D /bits/ 64 <605000000>; + opp-microvolt =3D <681250>; + }; + + opp-647000000 { + opp-hz =3D /bits/ 64 <647000000>; + opp-microvolt =3D <693750>; + }; + + opp-688000000 { + opp-hz =3D /bits/ 64 <688000000>; + opp-microvolt =3D <706250>; + }; + + opp-724000000 { + opp-hz =3D /bits/ 64 <724000000>; + opp-microvolt =3D <725000>; + }; + + opp-748000000 { + opp-hz =3D /bits/ 64 <748000000>; + opp-microvolt =3D <737500>; + }; + + opp-772000000 { + opp-hz =3D /bits/ 64 <772000000>; + opp-microvolt =3D <750000>; + }; + + opp-795000000 { + opp-hz =3D /bits/ 64 <795000000>; + opp-microvolt =3D <762500>; + }; + + opp-819000000 { + opp-hz =3D /bits/ 64 <819000000>; + opp-microvolt =3D <775000>; + }; + + opp-843000000 { + opp-hz =3D /bits/ 64 <843000000>; + opp-microvolt =3D <787500>; + }; + + opp-866000000 { + opp-hz =3D /bits/ 64 <866000000>; + opp-microvolt =3D <800000>; + }; + }; + soc { #address-cells =3D <2>; #size-cells =3D <2>; @@ -1266,6 +1351,30 @@ mmc1: mmc@11f70000 { status =3D "disabled"; }; =20 + gpu: gpu@13000000 { + compatible =3D "mediatek,mt8192-mali", "arm,mali-valhall-jm"; + reg =3D <0 0x13000000 0 0x4000>; + interrupts =3D + , + , + ; + interrupt-names =3D "job", "mmu", "gpu"; + + clocks =3D <&apmixedsys CLK_APMIXED_MFGPLL>; + + power-domains =3D + <&spm MT8192_POWER_DOMAIN_MFG2>, + <&spm MT8192_POWER_DOMAIN_MFG3>, + <&spm MT8192_POWER_DOMAIN_MFG4>, + <&spm MT8192_POWER_DOMAIN_MFG5>, + <&spm MT8192_POWER_DOMAIN_MFG6>; + power-domain-names =3D "core0", "core1", "core2", "core3", "core4"; + + operating-points-v2 =3D <&gpu_opp_table>; + + status =3D "disabled"; + }; + mfgcfg: clock-controller@13fbf000 { compatible =3D "mediatek,mt8192-mfgcfg"; reg =3D <0 0x13fbf000 0 0x1000>; --=20 2.39.1 From nobody Sat Sep 21 05:33:42 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 97000C636CC for ; Wed, 8 Feb 2023 10:46:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231152AbjBHKqT (ORCPT ); Wed, 8 Feb 2023 05:46:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55998 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230345AbjBHKqG (ORCPT ); Wed, 8 Feb 2023 05:46:06 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BBE3448A0B; Wed, 8 Feb 2023 02:45:55 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id AC95E660209F; Wed, 8 Feb 2023 10:45:40 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675853141; bh=q3Ks3xCpv4XCuWtELbScLLMj0j/dhmkTbq/7OVCjIrs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZT3rh5G0RfvzFBq9vd7yUtHUlSJcPrjYnTbkD9tETEFa98yYaCN963PCGEzRPisRd qtFOy8Zyh3LHdlC98Fil1HNByz+xrMisDcR2eBYBa99gpcbD24g0lYaz8JKYHVmjV4 CJHaaBih2yN1aBUnLxnVIRSXIGw1nKraC0Y1vTBKHWarN9LNSVUeRr3jOixGGiTjlE VClmgVIxAsCVVeIbmUI5Ey6Hl38aOn6CubwBmZDdD6uErwM1yKCW8GesYk2q781Q5J Q1tA4X0AestvbWrdOyOVAxey9u1xX+sqa3pOuJtEJ6xna//2S0jRkeLn5iekomNZaR o45wXr2tEXVqQ== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH 08/16] arm64: dts: mediatek: mt8192: Add mfg_ref_sel clock to MFG0 domain Date: Wed, 8 Feb 2023 11:45:19 +0100 Message-Id: <20230208104527.118929-9-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> References: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The mfg_ref_sel clock is a mux used to switch between different "safe" (and slower) clock sources for the GPU: this is used during MFGPLL reconfiguration and eventually during idling at very low frequencies. This clock getting turned off means that the GPU will occasionally be unclocked, producing obvious consequences such as system crash or unpredictable behavior: assigning it to the top level MFG power domain will make sure that this stays on at all times during any operation on the MFG domain (only GPU-related transactions). Signed-off-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts= /mediatek/mt8192.dtsi index a60120088d45..5b4bf2d1d584 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -499,8 +499,9 @@ power-domain@MT8192_POWER_DOMAIN_CONN { =20 power-domain@MT8192_POWER_DOMAIN_MFG0 { reg =3D ; - clocks =3D <&topckgen CLK_TOP_MFG_PLL_SEL>; - clock-names =3D "mfg"; + clocks =3D <&topckgen CLK_TOP_MFG_PLL_SEL>, + <&topckgen CLK_TOP_MFG_REF_SEL>; + clock-names =3D "mfg", "alt"; #address-cells =3D <1>; #size-cells =3D <0>; #power-domain-cells =3D <1>; --=20 2.39.1 From nobody Sat Sep 21 05:33:42 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88628C636CC for ; Wed, 8 Feb 2023 10:46:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230092AbjBHKq1 (ORCPT ); Wed, 8 Feb 2023 05:46:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56050 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230288AbjBHKqI (ORCPT ); Wed, 8 Feb 2023 05:46:08 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2DC6D48589; Wed, 8 Feb 2023 02:45:57 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 6B7DF66020A0; Wed, 8 Feb 2023 10:45:41 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675853142; bh=u0Pl3e8Q1adBrESztf0nJ79U8olUhF8Hseg+uDrkvz8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gJbiNx2w+9W0vdSRsH/nNLzcE56hq++p1rEPdXlQ40vl85KsBXBaQOZFkA1+zOxk7 3uYDU+tbwTlBBQHkwGWADTfzOwS794LidNOTmI5twLrnT+bwMOBYlNpJwyd4rv4aLK 4Pys5HFHdqBlhf+iciA6iyRWEe5pNaLL6493uvyDfIo6rtla8v2jidblP/SbhrsRBY v4SCMyc80luapuJXqTL9y/2ZPQbnu9YQjXyJ5MtDR7Ft9ohyoDsNQq98HLOoVugIcc GR8lFfx7bTvth9tzjhAbDvvAHMiLp+fuwBYe6n2h7b8AOMrGXD48NcMgXFF9PD/vmr ZK5KdrUqJ6SvA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= Subject: [PATCH 09/16] arm64: dts: mediatek: mt8192-asurada: Add MFG0 domain supply Date: Wed, 8 Feb 2023 11:45:20 +0100 Message-Id: <20230208104527.118929-10-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> References: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: N=C3=ADcolas F. R. A. Prado The mfg0 power domain encompasses the whole GPU and its surrounding glue logic. This power domain has a separate power rail. Add its power supply for Asurada. Signed-off-by: N=C3=ADcolas F. R. A. Prado [wenst@chromium.org: fix subject prefix and add commit message] Signed-off-by: Chen-Yu Tsai [Angelo: Reordered commits to address DVFS stability issues] Signed-off-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 4 ++++ arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index 9f12257ab4e7..ec013d5ef157 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -380,6 +380,10 @@ &i2c7 { pinctrl-0 =3D <&i2c7_pins>; }; =20 +&mfg0 { + domain-supply =3D <&mt6315_7_vbuck1>; +}; + &mipi_tx0 { status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts= /mediatek/mt8192.dtsi index 5b4bf2d1d584..686d5cc22d6a 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -497,7 +497,7 @@ power-domain@MT8192_POWER_DOMAIN_CONN { #power-domain-cells =3D <0>; }; =20 - power-domain@MT8192_POWER_DOMAIN_MFG0 { + mfg0: power-domain@MT8192_POWER_DOMAIN_MFG0 { reg =3D ; clocks =3D <&topckgen CLK_TOP_MFG_PLL_SEL>, <&topckgen CLK_TOP_MFG_REF_SEL>; --=20 2.39.1 From nobody Sat Sep 21 05:33:42 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DCABCC05027 for ; Wed, 8 Feb 2023 10:46:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231301AbjBHKqa (ORCPT ); Wed, 8 Feb 2023 05:46:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55790 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230364AbjBHKqI (ORCPT ); Wed, 8 Feb 2023 05:46:08 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 330094859B; Wed, 8 Feb 2023 02:45:57 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 3503D66020A1; Wed, 8 Feb 2023 10:45:42 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675853142; bh=mhl1CTumhgyodipibc6iIlxxn58Kbt1J0bEZfVVQx2o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Gx6Z6j9Vfk/zIYcAIhInBZGNpZPDvNfKcky8BLgzdwjh4x2v9swakwpPrNLA1ojth BKDp98gIkUWVNpg1u6yTXyrOZB+gr30ypXvEJe3GWyGQiwsRaFmAlpgcBpWllhbpVH KkbAbzPVJmvIqrv1xlcj1bfvRbs6VQNMR2FBYqFmk+5AR4hFf4Rd+CIp2Y+qELGoKQ tfo6AzaHL+v4L/pgw5PD5FAj0CoxH2QfP/CJ7Xe6JAnAWDrcpwFKTin2zDT3CwaxDB JE8Ac505C52JsXxcfw9cj01yMxmTBYD/F2Y0/v0b4FQs+20XdkI2AuP+mG8IVYLXxR lgchIfi7VohaQ== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH 10/16] arm64: dts: mediatek: mt8192-asurada: Assign sram supply to MFG1 pd Date: Wed, 8 Feb 2023 11:45:21 +0100 Message-Id: <20230208104527.118929-11-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> References: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add a phandle to the MT8192_POWER_DOMAIN_MFG1 power domain and assign the GPU VSRAM supply to this in mt8192-asurada: this allows to keep the sram powered up while the GPU is used. Signed-off-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 4 ++++ arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index ec013d5ef157..df477eb89f21 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -384,6 +384,10 @@ &mfg0 { domain-supply =3D <&mt6315_7_vbuck1>; }; =20 +&mfg1 { + domain-supply =3D <&mt6359_vsram_others_ldo_reg>; +}; + &mipi_tx0 { status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts= /mediatek/mt8192.dtsi index 686d5cc22d6a..e7669cd80040 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -506,7 +506,7 @@ mfg0: power-domain@MT8192_POWER_DOMAIN_MFG0 { #size-cells =3D <0>; #power-domain-cells =3D <1>; =20 - power-domain@MT8192_POWER_DOMAIN_MFG1 { + mfg1: power-domain@MT8192_POWER_DOMAIN_MFG1 { reg =3D ; mediatek,infracfg =3D <&infracfg>; #address-cells =3D <1>; --=20 2.39.1 From nobody Sat Sep 21 05:33:42 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26876C636D3 for ; Wed, 8 Feb 2023 10:46:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231365AbjBHKqh (ORCPT ); Wed, 8 Feb 2023 05:46:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55850 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230075AbjBHKqL (ORCPT ); Wed, 8 Feb 2023 05:46:11 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7883D47EFC; Wed, 8 Feb 2023 02:45:58 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id E9A4566020A2; Wed, 8 Feb 2023 10:45:42 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675853143; bh=iOLDoRtCa+fRE160zIHQzs9EtumGO/iTit/r4VP3orI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DUwMsMKeBnkAav17FUHf070DjbWbUvnbQK2zXeB0quAirxgyhrCXfNhnJA2+nlWou RCH1vRgz5w7TkmrXdvEURpgCpXVqYakGDBXNa5TtQ7J356A0xVBy7p4GQNhlbqBNTB MvlFmJmq9oOgD4t0z15WzEtLyv4WymzHHUH8nLgYFFmFbn7yp9d/Oi6y/RAEhtI3JC v4G+u3U++yCdDiUrFFe2q6p3HJ75dvK2rh76EoeEjxj61kSDplAAF89PdP24jVQ0b0 O0cINeO2e8Oj8DGFAYcxgEQEK/2zo5utojprbwHQy3ThzJ57a/O0K1jxZRUgAz53K9 hMb/Y+K7+uBxA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH 11/16] arm64: dts: mediatek: mt8192-asurada: Couple VGPU and VSRAM_OTHER regulators Date: Wed, 8 Feb 2023 11:45:22 +0100 Message-Id: <20230208104527.118929-12-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> References: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add coupling for these regulators, as VSRAM_OTHER is used to power the GPU SRAM, and they have a strict voltage output relation to satisfy in order to ensure GPU stable operation. Signed-off-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index df477eb89f21..c8b6e1a9605b 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -447,6 +447,13 @@ &mt6359_vrf12_ldo_reg { regulator-always-on; }; =20 +&mt6359_vsram_others_ldo_reg { + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <850000>; + regulator-coupled-with =3D <&mt6315_7_vbuck1>; + regulator-coupled-max-spread =3D <10000>; +}; + &mt6359_vufs_ldo_reg { regulator-always-on; }; @@ -1411,6 +1418,8 @@ mt6315_7_vbuck1: vbuck1 { regulator-max-microvolt =3D <1193750>; regulator-enable-ramp-delay =3D <256>; regulator-allowed-modes =3D <0 1 2>; + regulator-coupled-with =3D <&mt6359_vsram_others_ldo_reg>; + regulator-coupled-max-spread =3D <10000>; }; }; }; --=20 2.39.1 From nobody Sat Sep 21 05:33:42 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E97DEC05027 for ; Wed, 8 Feb 2023 10:46:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231326AbjBHKqe (ORCPT ); Wed, 8 Feb 2023 05:46:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55778 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230062AbjBHKqJ (ORCPT ); Wed, 8 Feb 2023 05:46:09 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6AF8A47EEB; Wed, 8 Feb 2023 02:45:58 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id A65D566020A3; Wed, 8 Feb 2023 10:45:43 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675853144; bh=quJa/fW2LVMTtC5MQkjKN9wJG9aVtfzfxHeqN/YECfI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kc0e79TS9SeIszeVKiY/2le7uAj/md+QgGVW/xAB4n8GXJLPTmogz/ufCKh/yovLw GXp70b6CVLRKg0lyipJBPcYwPsKHVZvWZTpDdyenvDMcuIar+PZsFwuGmfFbtrcI24 Xs51hNzTdiUdt9cySgEhHEC9ofLAagfooQ1wYea76YUOohenQv9KPLW5EBhve/SO9E lAPbVYAt6OK9bW36Jsnvw74t1BU0hJ2Foh7C51fQQ0erKG+wTQZcwPRGpf95eZyIEW +noHDqzjp8UKcFUiPp1g6YghCjNyAZz2MZTEJRCFI08NAfr1yGnNqjFCHd2gz/bPKU U/yfp0rP7c22w== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org, Alyssa Rosenzweig Subject: [PATCH 12/16] arm64: dts: mediatek: mt8192-asurada: Enable GPU Date: Wed, 8 Feb 2023 11:45:23 +0100 Message-Id: <20230208104527.118929-13-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> References: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Alyssa Rosenzweig Enable the GPU with its power supplies described. Signed-off-by: Alyssa Rosenzweig [wenst@: patch split out from MT8192 GPU node patch] Signed-off-by: Chen-Yu Tsai [Angelo: Minor commit title fix] Signed-off-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index c8b6e1a9605b..067685191ba6 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -275,6 +275,11 @@ &dsi_out { remote-endpoint =3D <&anx7625_in>; }; =20 +&gpu { + mali-supply =3D <&mt6315_7_vbuck1>; + status =3D "okay"; +}; + &i2c0 { status =3D "okay"; =20 --=20 2.39.1 From nobody Sat Sep 21 05:33:42 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6CB0C05027 for ; Wed, 8 Feb 2023 10:46:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231394AbjBHKqj (ORCPT ); Wed, 8 Feb 2023 05:46:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56132 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230377AbjBHKqL (ORCPT ); Wed, 8 Feb 2023 05:46:11 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 76C3147EF4; Wed, 8 Feb 2023 02:45:58 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 6A7C566020A4; Wed, 8 Feb 2023 10:45:44 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675853144; bh=jfBlI6E0bJoeexQtOH/Sz6zM280GKkmPVg2i18O6Y/M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fULRBv9/4obvasWi26fgO8uKYQcq8euIPm6ZgnVEgBfSnxFrsJDAtKDa1qNcuwZ6j BS8C9VC8KNitWVUtzwFl8ZsTJLgbIWOamvrJ3Oxs8uKJiyXQ1igDTkz9q4AkJQfI0G gUZZCnMrmjs896g/zslMGMOFU5Ub9BHn4FZSyRPREh/tnUMGWCHNN+Uovw1y4qjxs9 SwKjhuN4U0NrhLSXyp8JdCV18UmIYKrT17E3rnsju9RYV5g8Ld+mjqBiWR1XrW+QmA zmDmzx42xGRb9RYA6Hs6eHABSgYP453JTzW29FYOOnnxe+c5JOVQiEe322LeTCT6ny VEHCBJ6j5itmA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH 13/16] arm64: dts: mediatek: mt8195: Add mfg_core_tmp clock to MFG1 domain Date: Wed, 8 Feb 2023 11:45:24 +0100 Message-Id: <20230208104527.118929-14-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> References: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Similarly to what can be seen in MT8192, on MT8195 the mfg_core_tmp clock is a mux used to switch between different "safe" (and slower) clock sources for the GPU: this is used during MFGPLL reconfiguration and eventually during idling at very low frequencies. This clock getting turned off means that the GPU will occasionally be unclocked, producing obvious consequences such as system crash or unpredictable behavior: assigning it to the top level MFG power domain will make sure that this stays on at all times during any operation on the MFG domain (only GPU-related transactions). Signed-off-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts= /mediatek/mt8195.dtsi index 8f1264d5290b..d116830d6af3 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -446,8 +446,9 @@ mfg0: power-domain@MT8195_POWER_DOMAIN_MFG0 { =20 power-domain@MT8195_POWER_DOMAIN_MFG1 { reg =3D ; - clocks =3D <&apmixedsys CLK_APMIXED_MFGPLL>; - clock-names =3D "mfg"; + clocks =3D <&apmixedsys CLK_APMIXED_MFGPLL>, + <&topckgen CLK_TOP_MFG_CORE_TMP>; + clock-names =3D "mfg", "alt"; mediatek,infracfg =3D <&infracfg_ao>; #address-cells =3D <1>; #size-cells =3D <0>; --=20 2.39.1 From nobody Sat Sep 21 05:33:42 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B3B9C636CC for ; Wed, 8 Feb 2023 10:46:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231435AbjBHKqs (ORCPT ); Wed, 8 Feb 2023 05:46:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55784 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230379AbjBHKqL (ORCPT ); Wed, 8 Feb 2023 05:46:11 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 823BD48582; Wed, 8 Feb 2023 02:45:58 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 242A466020A5; Wed, 8 Feb 2023 10:45:45 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675853145; bh=yPSKyJGV4CfVeowUyIzcXpvx5mprmmPaai8S5MuPor0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LtG+ghYhmc28RUZCRYXKl1brgqZYlaUCk2nf3HrPkIBtZj5EIdQQ1daKJe8zF3f8O Y2Vodp5wkYjDPXrOQFQkwZl/Vif3rcwaYTXSP/+9nnNvs1UP6B2B92J+yQe9XNFiFb L9lIyO9kpBY8W7H++oVv88w1kzzkoMgkFHgyk0gTKU2bOQlehYlh65Af1QIOfwBw2S q15f0V+FZjFm+nineuEXV6miBylBVtxbyNtcP+DTTrlNeoz99Pnry6/4NL9GOzBohF 77qM1sEGttLO/ULPIuj2fe02Pr6vt14xfgd+6qtQ/9dlRV+9EEBCnC5wk0v4KrzBVn 8obTfoYY6jKeA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH 14/16] arm64: dts: mt8195: Add panfrost node for Mali-G57 Valhall Natt GPU Date: Wed, 8 Feb 2023 11:45:25 +0100 Message-Id: <20230208104527.118929-15-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> References: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add GPU support through panfrost for the Mali-G57 GPU on MT8195 with its OPP table but keep it in disabled state. This is expected to be enabled only on boards which make use of the GPU. Signed-off-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 90 ++++++++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts= /mediatek/mt8195.dtsi index d116830d6af3..0e4ee7713c30 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -333,6 +333,76 @@ performance: performance-controller@11bc10 { #performance-domain-cells =3D <1>; }; =20 + gpu_opp_table: opp-table-gpu { + compatible =3D "operating-points-v2"; + opp-shared; + + opp-390000000 { + opp-hz =3D /bits/ 64 <390000000>; + opp-microvolt =3D <625000>; + }; + opp-410000000 { + opp-hz =3D /bits/ 64 <410000000>; + opp-microvolt =3D <631250>; + }; + opp-431000000 { + opp-hz =3D /bits/ 64 <431000000>; + opp-microvolt =3D <631250>; + }; + opp-473000000 { + opp-hz =3D /bits/ 64 <473000000>; + opp-microvolt =3D <637500>; + }; + opp-515000000 { + opp-hz =3D /bits/ 64 <515000000>; + opp-microvolt =3D <637500>; + }; + opp-556000000 { + opp-hz =3D /bits/ 64 <556000000>; + opp-microvolt =3D <643750>; + }; + opp-598000000 { + opp-hz =3D /bits/ 64 <598000000>; + opp-microvolt =3D <650000>; + }; + opp-640000000 { + opp-hz =3D /bits/ 64 <640000000>; + opp-microvolt =3D <650000>; + }; + opp-670000000 { + opp-hz =3D /bits/ 64 <670000000>; + opp-microvolt =3D <662500>; + }; + opp-700000000 { + opp-hz =3D /bits/ 64 <700000000>; + opp-microvolt =3D <675000>; + }; + opp-730000000 { + opp-hz =3D /bits/ 64 <730000000>; + opp-microvolt =3D <687500>; + }; + opp-760000000 { + opp-hz =3D /bits/ 64 <760000000>; + opp-microvolt =3D <700000>; + }; + opp-790000000 { + opp-hz =3D /bits/ 64 <790000000>; + opp-microvolt =3D <712500>; + }; + opp-820000000 { + opp-hz =3D /bits/ 64 <820000000>; + opp-microvolt =3D <725000>; + }; + opp-850000000 { + opp-hz =3D /bits/ 64 <850000000>; + opp-microvolt =3D <737500>; + }; + opp-880000000 { + opp-hz =3D /bits/ 64 <880000000>; + opp-microvolt =3D <750000>; + }; + }; + pmu-a55 { compatible =3D "arm,cortex-a55-pmu"; interrupt-parent =3D <&gic>; @@ -1790,6 +1860,26 @@ ufsphy: ufs-phy@11fa0000 { status =3D "disabled"; }; =20 + gpu: gpu@13000000 { + compatible =3D "mediatek,mt8195-mali", "mediatek,mt8192-mali", + "arm,mali-valhall-jm"; + reg =3D <0 0x13000000 0 0x4000>; + + clocks =3D <&mfgcfg CLK_MFG_BG3D>; + interrupts =3D , + , + ; + interrupt-names =3D "job", "mmu", "gpu"; + operating-points-v2 =3D <&gpu_opp_table>; + power-domains =3D <&spm MT8195_POWER_DOMAIN_MFG2>, + <&spm MT8195_POWER_DOMAIN_MFG3>, + <&spm MT8195_POWER_DOMAIN_MFG4>, + <&spm MT8195_POWER_DOMAIN_MFG5>, + <&spm MT8195_POWER_DOMAIN_MFG6>; + power-domain-names =3D "core0", "core1", "core2", "core3", "core4"; + status =3D "disabled"; + }; + mfgcfg: clock-controller@13fbf000 { compatible =3D "mediatek,mt8195-mfgcfg"; reg =3D <0 0x13fbf000 0 0x1000>; --=20 2.39.1 From nobody Sat Sep 21 05:33:42 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0F678C05027 for ; Wed, 8 Feb 2023 10:46:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231483AbjBHKq6 (ORCPT ); Wed, 8 Feb 2023 05:46:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55852 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230433AbjBHKqO (ORCPT ); Wed, 8 Feb 2023 05:46:14 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 755B1485A9; Wed, 8 Feb 2023 02:46:07 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id D682766020A6; Wed, 8 Feb 2023 10:45:45 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675853146; bh=Mqy0LgOrBL26ZfucrNTJt9JsISYGYClqtHybCr31CoI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AUjBo8hyLbjv5WQUTkYxYo5hESE6F8+22wnGjjCI3xKDFuQxIV3ZfVgiKCdpF/jUI R2de2m9z+Ab2XnjLG1yn/kuuJcGeCzNgceH6vOwVCAqhOQAhJJLuhmndj+tKZo9S4h e1s3AY//QlYxfG2FBb9iJkkxwD2se5WCCS77jZSwgCFRmqCx8xjmWZ0YVBQJtdC3vA 5XfiLiGOQeQmHhBORsO5x6SNwzudYjS3x3OgZ2CUx5XN+Tc/faqUe6kN/5oAO0nPfQ 9AgtMGf9RZg97bMvVYPvtXyJUA7MuZClvdjMCAtTI/jTTTB17yCBGZeHwRs7fSwHu1 pvCCASccPyfNw== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH 15/16] arm64: dts: mediatek: mt8195-cherry: Enable Mali-G57 GPU Date: Wed, 8 Feb 2023 11:45:26 +0100 Message-Id: <20230208104527.118929-16-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> References: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Enable the Mali-G57 found on this platform with the open-source Panfrost driver. Signed-off-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8195-cherry.dtsi index 56749cfe7c33..24669093fbed 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -238,6 +238,11 @@ dptx_out: endpoint { }; }; =20 +&gpu { + status =3D "okay"; + mali-supply =3D <&mt6315_7_vbuck1>; +}; + &i2c0 { status =3D "okay"; =20 --=20 2.39.1 From nobody Sat Sep 21 05:33:42 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 50AC0C05027 for ; Wed, 8 Feb 2023 10:47:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231569AbjBHKrI (ORCPT ); Wed, 8 Feb 2023 05:47:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56050 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230443AbjBHKqP (ORCPT ); Wed, 8 Feb 2023 05:46:15 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 755104859E; Wed, 8 Feb 2023 02:46:07 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 9F4F666020A7; Wed, 8 Feb 2023 10:45:46 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675853147; bh=FI2us/UkIVoCg8nkyQH1lEg3BYTtgiInz0G8Rg/jppM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DwE2tl5bEhuYJKAWWPEtwFalmIDORfepgLB6vFQw60cM5JBtVOl+INfpFQrhy+Oos It6T7jC0N1TQqG2yr6gDOoDCUrFWRCp/ycVXcNjeWlNPQHIOznhuWKKd5XcmN9TOKe DYTavQPV6Yn4pzEKZV0A8/NseCaRYjLbePGHKPOjjcbQOZgXqx8RHrZUKagX4H0gqk fCu5fd7YRq8KyHmQOzQM0wSrfbg1Y6nAify0aOMpXsHy8i35MezakEj6FSnaDQQ+x0 mDbN2wxH5AtlLLUyH2YmF7DrLGHj/IXCjf+gjnPyOVo5NN/fK1ScGhRYoZczpCw6ly Y4USfjC2smH8g== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH 16/16] arm64: dts: mediatek: mt8186: Add GPU node Date: Wed, 8 Feb 2023 11:45:27 +0100 Message-Id: <20230208104527.118929-17-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> References: <20230208104527.118929-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add a GPU node for MT8186 SoC but keep it disabled. Signed-off-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8186.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts= /mediatek/mt8186.dtsi index a0d3e1f731bd..f095e5b77937 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -1075,6 +1075,24 @@ mfgsys: clock-controller@13000000 { #clock-cells =3D <1>; }; =20 + gpu: gpu@13040000 { + compatible =3D "mediatek,mt8186-mali", "mediatek,mt8183b-mali", + "arm,mali-bifrost"; + reg =3D <0 0x13040000 0 0x4000>; + + clocks =3D <&mfgsys CLK_MFG_BG3D>; + interrupts =3D , + , + ; + interrupt-names =3D "job", "mmu", "gpu"; + power-domains =3D <&spm MT8186_POWER_DOMAIN_MFG1>, + <&spm MT8186_POWER_DOMAIN_MFG2>, + <&spm MT8186_POWER_DOMAIN_MFG3>; + power-domain-names =3D "core0", "core1", "core2"; + #cooling-cells =3D <2>; + status =3D "disabled"; + }; + mmsys: syscon@14000000 { compatible =3D "mediatek,mt8186-mmsys", "syscon"; reg =3D <0 0x14000000 0 0x1000>; --=20 2.39.1