From nobody Sat Sep 21 06:38:34 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6809FC636D3 for ; Wed, 8 Feb 2023 09:09:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231142AbjBHJJU (ORCPT ); Wed, 8 Feb 2023 04:09:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54548 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230196AbjBHJJN (ORCPT ); Wed, 8 Feb 2023 04:09:13 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 98F07458B6; Wed, 8 Feb 2023 01:09:06 -0800 (PST) X-UUID: 38bb8f64a79011eda06fc9ecc4dadd91-20230208 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=pAjHxEsnyEoI0bt0L75RtJVBnjmbipaXcQ/p3RqlNjU=; b=J3B/IXY/Kyokhu3UYgwV04gAXL12q8+8+sb25o2eFoP1rwzhodD2ucdjuwKXF6wEMv7zNCCEGVrPnK0sz4OaE6nV7blOsnWJcoNgx6n3ZDqj6nVnSvGQnXm6cXmXcTR+Fy+NuXO1CpCQtCEqwhdykMk6gyGFBSGG0EgfhbOeUdo=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.19,REQID:31101b8b-1297-4c3f-b74a-ec9a3c03988a,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:95 X-CID-INFO: VERSION:1.1.19,REQID:31101b8b-1297-4c3f-b74a-ec9a3c03988a,IP:0,URL :0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTION :quarantine,TS:95 X-CID-META: VersionHash:885ddb2,CLOUDID:d772aa56-dd49-462e-a4be-2143a3ddc739,B ulkID:230208170859LHFGQPQS,BulkQuantity:0,Recheck:0,SF:38|29|28|17|19|48,T C:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 ,OSI:0,OSA:0,AV:0 X-CID-BVR: 0 X-UUID: 38bb8f64a79011eda06fc9ecc4dadd91-20230208 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1389152652; Wed, 08 Feb 2023 17:08:58 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Wed, 8 Feb 2023 17:08:57 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Wed, 8 Feb 2023 17:08:57 +0800 From: Moudy Ho To: Mauro Carvalho Chehab , Matthias Brugger , Hans Verkuil , "Ping-Hsun Wu" CC: , , , , , Moudy Ho Subject: [PATCH v6 02/12] media: platform: mtk-mdp3: add files for chip configuration Date: Wed, 8 Feb 2023 17:08:45 +0800 Message-ID: <20230208090855.18934-3-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230208090855.18934-1-moudy.ho@mediatek.com> References: <20230208090855.18934-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In order to be compatible with more MDP3 chip settings in further, integrate and separate chip-related configurations into specific files. Signed-off-by: Moudy Ho --- drivers/media/platform/mediatek/mdp3/Makefile | 2 +- .../platform/mediatek/mdp3/mdp_cfg_data.c | 38 +++++++++++++++++++ .../platform/mediatek/mdp3/mtk-mdp3-cfg.h | 12 ++++++ .../platform/mediatek/mdp3/mtk-mdp3-core.c | 33 +--------------- 4 files changed, 53 insertions(+), 32 deletions(-) create mode 100644 drivers/media/platform/mediatek/mdp3/mdp_cfg_data.c create mode 100644 drivers/media/platform/mediatek/mdp3/mtk-mdp3-cfg.h diff --git a/drivers/media/platform/mediatek/mdp3/Makefile b/drivers/media/= platform/mediatek/mdp3/Makefile index 63e6c87e480b..2ee24195a2dd 100644 --- a/drivers/media/platform/mediatek/mdp3/Makefile +++ b/drivers/media/platform/mediatek/mdp3/Makefile @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only -mtk-mdp3-y +=3D mtk-mdp3-core.o mtk-mdp3-vpu.o mtk-mdp3-regs.o +mtk-mdp3-y +=3D mdp_cfg_data.o mtk-mdp3-core.o mtk-mdp3-vpu.o mtk-mdp3-reg= s.o mtk-mdp3-y +=3D mtk-mdp3-m2m.o mtk-mdp3-y +=3D mtk-mdp3-comp.o mtk-mdp3-cmdq.o =20 diff --git a/drivers/media/platform/mediatek/mdp3/mdp_cfg_data.c b/drivers/= media/platform/mediatek/mdp3/mdp_cfg_data.c new file mode 100644 index 000000000000..837b8202dcc7 --- /dev/null +++ b/drivers/media/platform/mediatek/mdp3/mdp_cfg_data.c @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2023 MediaTek Inc. + * Author: Ping-Hsun Wu + */ + +#include "mtk-mdp3-core.h" + +static const struct of_device_id mt8183_mdp_probe_infra[MDP_INFRA_MAX] =3D= { + [MDP_INFRA_MMSYS] =3D { .compatible =3D "mediatek,mt8183-mmsys" }, + [MDP_INFRA_MUTEX] =3D { .compatible =3D "mediatek,mt8183-disp-mutex" }, + [MDP_INFRA_SCP] =3D { .compatible =3D "mediatek,mt8183-scp" } +}; + +static const struct mdp_platform_config mt8183_plat_cfg =3D { + .rdma_support_10bit =3D true, + .rdma_rsz1_sram_sharing =3D true, + .rdma_upsample_repeat_only =3D true, + .rsz_disable_dcm_small_sample =3D false, + .wrot_filter_constraint =3D false, +}; + +static const u32 mt8183_mutex_idx[MDP_MAX_COMP_COUNT] =3D { + [MDP_COMP_RDMA0] =3D MUTEX_MOD_IDX_MDP_RDMA0, + [MDP_COMP_RSZ0] =3D MUTEX_MOD_IDX_MDP_RSZ0, + [MDP_COMP_RSZ1] =3D MUTEX_MOD_IDX_MDP_RSZ1, + [MDP_COMP_TDSHP0] =3D MUTEX_MOD_IDX_MDP_TDSHP0, + [MDP_COMP_WROT0] =3D MUTEX_MOD_IDX_MDP_WROT0, + [MDP_COMP_WDMA] =3D MUTEX_MOD_IDX_MDP_WDMA, + [MDP_COMP_AAL0] =3D MUTEX_MOD_IDX_MDP_AAL0, + [MDP_COMP_CCORR0] =3D MUTEX_MOD_IDX_MDP_CCORR0, +}; + +const struct mtk_mdp_driver_data mt8183_mdp_driver_data =3D { + .mdp_probe_infra =3D mt8183_mdp_probe_infra, + .mdp_cfg =3D &mt8183_plat_cfg, + .mdp_mutex_table_idx =3D mt8183_mutex_idx, +}; diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-cfg.h b/drivers/= media/platform/mediatek/mdp3/mtk-mdp3-cfg.h new file mode 100644 index 000000000000..e0a698cba6ff --- /dev/null +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-cfg.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2023 MediaTek Inc. + * Author: Ping-Hsun Wu + */ + +#ifndef __MTK_MDP3_CFG_H__ +#define __MTK_MDP3_CFG_H__ + +extern const struct mtk_mdp_driver_data mt8183_mdp_driver_data; + +#endif /* __MTK_MDP3_CFG_H__ */ diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c b/drivers= /media/platform/mediatek/mdp3/mtk-mdp3-core.c index 2d1f6ae9f080..207b54f84fc0 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c @@ -12,40 +12,11 @@ #include #include #include + #include "mtk-mdp3-core.h" +#include "mtk-mdp3-cfg.h" #include "mtk-mdp3-m2m.h" =20 -static const struct mdp_platform_config mt8183_plat_cfg =3D { - .rdma_support_10bit =3D true, - .rdma_rsz1_sram_sharing =3D true, - .rdma_upsample_repeat_only =3D true, - .rsz_disable_dcm_small_sample =3D false, - .wrot_filter_constraint =3D false, -}; - -static const struct of_device_id mt8183_mdp_probe_infra[MDP_INFRA_MAX] =3D= { - [MDP_INFRA_MMSYS] =3D { .compatible =3D "mediatek,mt8183-mmsys" }, - [MDP_INFRA_MUTEX] =3D { .compatible =3D "mediatek,mt8183-disp-mutex" }, - [MDP_INFRA_SCP] =3D { .compatible =3D "mediatek,mt8183-scp" } -}; - -static const u32 mt8183_mutex_idx[MDP_MAX_COMP_COUNT] =3D { - [MDP_COMP_RDMA0] =3D MUTEX_MOD_IDX_MDP_RDMA0, - [MDP_COMP_RSZ0] =3D MUTEX_MOD_IDX_MDP_RSZ0, - [MDP_COMP_RSZ1] =3D MUTEX_MOD_IDX_MDP_RSZ1, - [MDP_COMP_TDSHP0] =3D MUTEX_MOD_IDX_MDP_TDSHP0, - [MDP_COMP_WROT0] =3D MUTEX_MOD_IDX_MDP_WROT0, - [MDP_COMP_WDMA] =3D MUTEX_MOD_IDX_MDP_WDMA, - [MDP_COMP_AAL0] =3D MUTEX_MOD_IDX_MDP_AAL0, - [MDP_COMP_CCORR0] =3D MUTEX_MOD_IDX_MDP_CCORR0, -}; - -static const struct mtk_mdp_driver_data mt8183_mdp_driver_data =3D { - .mdp_probe_infra =3D mt8183_mdp_probe_infra, - .mdp_cfg =3D &mt8183_plat_cfg, - .mdp_mutex_table_idx =3D mt8183_mutex_idx, -}; - static const struct of_device_id mdp_of_ids[] =3D { { .compatible =3D "mediatek,mt8183-mdp3-rdma", .data =3D &mt8183_mdp_driver_data, --=20 2.18.0