From nobody Thu Nov 14 07:12:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DAFE0C64EC4 for ; Tue, 7 Feb 2023 13:11:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232450AbjBGNLR (ORCPT ); Tue, 7 Feb 2023 08:11:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60148 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232441AbjBGNKl (ORCPT ); Tue, 7 Feb 2023 08:10:41 -0500 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [IPv6:2a00:1450:4864:20::331]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A240B303E4 for ; Tue, 7 Feb 2023 05:10:18 -0800 (PST) Received: by mail-wm1-x331.google.com with SMTP id n28-20020a05600c3b9c00b003ddca7a2bcbso11409280wms.3 for ; Tue, 07 Feb 2023 05:10:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=F2FxFIuFS/8D2OioON2ALOE9HyJa5XT3DomtjkJOvW8=; b=FRekK/MZYQb9ROVrWixBdRpCNg9ZkWgH5cgXuoraaBhZEshm2dfWAZ4zlIHMJsDB7I Jk9pigODPTcAXuJgtDRGGF3/f+5WCr9Eq3wBnXtYl+V92d88yAtKOvHYOwoRUv4lO9+O KtJFakRStSeunB84OnXoaIvTn+mY1oKTH1Y5uw48uH/kJ2ygM3SckKxZ8ENIqqAFoEhz HlV0V+nVc1rleD2rUr81R7sbaoVZs9/bLpGSwpQrXZcg4tyIg5O7OwA+etSXXHVPhdVt o8jNQnWEwfCygtpRaIZRXbfEzuRZQZii6CkRDlPQldXj5KZ5LR7MbB/7hUqRHvX80hWX YUkg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=F2FxFIuFS/8D2OioON2ALOE9HyJa5XT3DomtjkJOvW8=; b=re2PrhwxdFlsuPvzRLScl1mKxStcDUzmbYuNbJycLDXXHYaaGMSALkCN4VCYN39vqf gUqzwMhUSExEMzITSs+kyZRdeQYRQCIy/RNC83aq0KW9rZjR7Aim2XRumvs1PzWuVc89 KFZG/FuXyJrftOmLgYrC/tCw8wq2DcdoASY0DUVU15kXM9JR4THs80EJZqu+DEHEXHfm MlSH70vBfbh+gl6zP5pStmJaY5y6Z2aDDOaV7bksx8v3p0vUm2isA0NXwxj9DhnZWftq 8EXMZw+YzoFkndxgIPujEysCgt/tHw0r0ttBW3xEgDVlttjeO//RO5URaEZ4eA3coalc Idng== X-Gm-Message-State: AO0yUKVWkwLwsSHB+l+Vi/PTIoNed6b+mLuLZg+KTaD+z7pLLZqWKOh2 4xiZTAAmuiA/t7mHHbm7d6XH0A== X-Google-Smtp-Source: AK7set/RMK477DelBkWkMVMOtzYjlOrZRlpa/s35N/1+Npyz6cmVKjEWL7cp5vuNJmaiLbzGBXrvGw== X-Received: by 2002:a05:600c:1c96:b0:3df:9858:c032 with SMTP id k22-20020a05600c1c9600b003df9858c032mr13746065wms.7.1675775412407; Tue, 07 Feb 2023 05:10:12 -0800 (PST) Received: from t480-bl003.civfrance.com (58.188.158.77.rev.sfr.net. [77.158.188.58]) by smtp.gmail.com with ESMTPSA id g24-20020a7bc4d8000000b003df30c94850sm17987385wmk.25.2023.02.07.05.10.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Feb 2023 05:10:11 -0800 (PST) From: bchihi@baylibre.com To: daniel.lezcano@linaro.org, angelogioacchino.delregno@collabora.com, rafael@kernel.org, amitk@kernel.org, rui.zhang@intel.com, matthias.bgg@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, rdunlap@infradead.org, ye.xingchen@zte.com.cn, p.zabel@pengutronix.de Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, khilman@baylibre.com, james.lo@mediatek.com, rex-bc.chen@mediatek.com Subject: [PATCH v13 5/6] arm64: dts: mediatek: mt8195: Add thermal zones and thermal nodes Date: Tue, 7 Feb 2023 14:09:57 +0100 Message-Id: <20230207130958.608305-6-bchihi@baylibre.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230207130958.608305-1-bchihi@baylibre.com> References: <20230207130958.608305-1-bchihi@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Balsam CHIHI Add thermal zones and thermal nodes for the mt8195. Signed-off-by: Balsam CHIHI Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 129 +++++++++++++++++++++++ 1 file changed, 129 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts= /mediatek/mt8195.dtsi index 09df105f4606..c7e958f8f1b5 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -14,6 +14,7 @@ #include #include #include +#include =20 / { compatible =3D "mediatek,mt8195"; @@ -954,6 +955,17 @@ spi0: spi@1100a000 { status =3D "disabled"; }; =20 + lvts_ap: thermal-sensor@1100b000 { + compatible =3D "mediatek,mt8195-lvts-ap"; + reg =3D <0 0x1100b000 0 0x1000>; + interrupts =3D ; + clocks =3D <&infracfg_ao CLK_INFRA_AO_THERM>; + resets =3D <&infracfg_ao MT8195_INFRA_RST0_THERM_CTRL_SWRST>; + nvmem-cells =3D <&lvts_efuse_data1 &lvts_efuse_data2>; + nvmem-cell-names =3D "lvts-calib-data-1", "lvts-calib-data-2"; + #thermal-sensor-cells =3D <1>; + }; + spi1: spi@11010000 { compatible =3D "mediatek,mt8195-spi", "mediatek,mt6765-spi"; @@ -1114,6 +1126,17 @@ mmc2: mmc@11250000 { status =3D "disabled"; }; =20 + lvts_mcu: thermal-sensor@11278000 { + compatible =3D "mediatek,mt8195-lvts-mcu"; + reg =3D <0 0x11278000 0 0x1000>; + interrupts =3D ; + clocks =3D <&infracfg_ao CLK_INFRA_AO_THERM>; + resets =3D <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>; + nvmem-cells =3D <&lvts_efuse_data1 &lvts_efuse_data2>; + nvmem-cell-names =3D "lvts-calib-data-1", "lvts-calib-data-2"; + #thermal-sensor-cells =3D <1>; + }; + xhci1: usb@11290000 { compatible =3D "mediatek,mt8195-xhci", "mediatek,mtk-xhci"; @@ -2387,4 +2410,110 @@ dp_tx: dp-tx@1c600000 { status =3D "disabled"; }; }; + + thermal_zones: thermal-zones { + cpu0-thermal { + polling-delay =3D <0>; + polling-delay-passive =3D <0>; + thermal-sensors =3D <&lvts_mcu MT8195_MCU_LITTLE_CPU0>; + trips { + cpu0_crit: trip-crit { + temperature =3D <100000>; + hysteresis =3D <2000>; + type =3D "critical"; + }; + }; + }; + + cpu1-thermal { + polling-delay =3D <0>; + polling-delay-passive =3D <0>; + thermal-sensors =3D <&lvts_mcu MT8195_MCU_LITTLE_CPU1>; + trips { + cpu1_crit: trip-crit { + temperature =3D <100000>; + hysteresis =3D <2000>; + type =3D "critical"; + }; + }; + }; + + cpu2-thermal { + polling-delay =3D <0>; + polling-delay-passive =3D <0>; + thermal-sensors =3D <&lvts_mcu MT8195_MCU_LITTLE_CPU2>; + trips { + cpu2_crit: trip-crit { + temperature =3D <100000>; + hysteresis =3D <2000>; + type =3D "critical"; + }; + }; + }; + + cpu3-thermal { + polling-delay =3D <0>; + polling-delay-passive =3D <0>; + thermal-sensors =3D <&lvts_mcu MT8195_MCU_LITTLE_CPU3>; + trips { + cpu3_crit: trip-crit { + temperature =3D <100000>; + hysteresis =3D <2000>; + type =3D "critical"; + }; + }; + }; + + cpu4-thermal { + polling-delay =3D <0>; + polling-delay-passive =3D <0>; + thermal-sensors =3D <&lvts_mcu MT8195_MCU_BIG_CPU0>; + trips { + cpu4_crit: trip-crit { + temperature =3D <100000>; + hysteresis =3D <2000>; + type =3D "critical"; + }; + }; + }; + + cpu5-thermal { + polling-delay =3D <0>; + polling-delay-passive =3D <0>; + thermal-sensors =3D <&lvts_mcu MT8195_MCU_BIG_CPU1>; + trips { + cpu5_crit: trip-crit { + temperature =3D <100000>; + hysteresis =3D <2000>; + type =3D "critical"; + }; + }; + }; + + cpu6-thermal { + polling-delay =3D <0>; + polling-delay-passive =3D <0>; + thermal-sensors =3D <&lvts_mcu MT8195_MCU_BIG_CPU2>; + trips { + cpu6_crit: trip-crit { + temperature =3D <100000>; + hysteresis =3D <2000>; + type =3D "critical"; + }; + }; + }; + + cpu7-thermal { + polling-delay =3D <0>; + polling-delay-passive =3D <0>; + thermal-sensors =3D <&lvts_mcu MT8195_MCU_BIG_CPU3>; + trips { + cpu7_crit: trip-crit { + temperature =3D <100000>; + hysteresis =3D <2000>; + type =3D "critical"; + }; + }; + }; + }; }; --=20 2.34.1