From nobody Mon Feb 9 13:57:19 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B9879C636D3 for ; Mon, 6 Feb 2023 21:26:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230127AbjBFV06 (ORCPT ); Mon, 6 Feb 2023 16:26:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42638 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230264AbjBFV0p (ORCPT ); Mon, 6 Feb 2023 16:26:45 -0500 Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [IPv6:2a00:1450:4864:20::436]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A274B2ED42 for ; Mon, 6 Feb 2023 13:26:34 -0800 (PST) Received: by mail-wr1-x436.google.com with SMTP id ba1so7683895wrb.5 for ; Mon, 06 Feb 2023 13:26:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=X/fStvwYHQIixNJ32WnY5uSuhJXMazA9QZS2xgOLLN4=; b=fHHHWEGCLNG70h4VPdVz0CWqGmwybrfaDU3DKvXZb4OhFFSlTjtmopXl7Jy3ocs3Ti 6UV4gVUtKiJbCSxvvMVfghAKZBqGfFRtZ/eNmOapAmwbycvsic5YXcarHDYO5nm3uTyx KgZTSrYwdQm4FzfnrQaUsqE4j685JbsUUz0T7JosbrZgvpe6/IZg8RUtelDGtlfuS3s+ LcpNa18EXac4klKlMobrHfd6ByCH35FqRc8XrRSkvf1mMiWqgjYreg/e6yyGJcAcztlF 2p8ivz9fRxv9Upi+kxfK4z2ZtoedJ3jyxa/WOQfHrovwOSQpyNLep1jREZQAXo54cgYX u4fg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=X/fStvwYHQIixNJ32WnY5uSuhJXMazA9QZS2xgOLLN4=; b=py5ZiYfFiWEroUglzYcSbG+rJfgTy0XEpeHImFW1r+5oM/ZMszkdI9T0S0WNSfYnJm lyHB/i6OPxBOgkWqms/E/wN4xA5E/w5np4oXjrD+efzhfmhCpIMnMhBBkQq3wTX0mq11 4mxnIyz9pLGvaC2U8pwCnMmIwQWJ/lN+C4rUlt103wSOsfoMbVmjRrRF1h+GNAKO9yMe uPi5og8YSapugaV3FTgLeXXUWqtRf7IK+I9ambi80uOYSnkdkgq0e+wLleGgpzWZ2x/4 pPu/+nZq5m2VNwdbIzrl3qwCQ6stvu4mBNp5SsKYTpKE+doe04p290pscbgaFA1JLmYZ LBtg== X-Gm-Message-State: AO0yUKV+W8jMNGAdKQ76opS5Olav+HoSRO1wGuSvrLFQkWkiIxlaYFnb rDxna48RDW/lijbY57ytDsNbSw== X-Google-Smtp-Source: AK7set9uyrwL4qWINdvMg+unCNQPZr/7R4gNWlZtoozM+QBMrCMde4T8c+YaZjmkVQ4nCPIjp8wekg== X-Received: by 2002:adf:f007:0:b0:2b6:7876:3cd4 with SMTP id j7-20020adff007000000b002b678763cd4mr295246wro.16.1675718794171; Mon, 06 Feb 2023 13:26:34 -0800 (PST) Received: from hackbox.lan ([94.52.112.99]) by smtp.gmail.com with ESMTPSA id j11-20020a5d604b000000b002b57bae7174sm9783341wrt.5.2023.02.06.13.26.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Feb 2023 13:26:33 -0800 (PST) From: Abel Vesa To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Krzysztof Kozlowski , Lorenzo Pieralisi , "vkoul@kernel.org" , Kishon Vijay Abraham I , Manivannan Sadhasivam , Johan Hovold Cc: linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, Linux Kernel Mailing List Subject: [PATCH v8 07/11] phy: qcom-qmp: qserdes-lane-shared: Add v6 register offsets Date: Mon, 6 Feb 2023 23:26:15 +0200 Message-Id: <20230206212619.3218741-8-abel.vesa@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230206212619.3218741-1-abel.vesa@linaro.org> References: <20230206212619.3218741-1-abel.vesa@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The new SM8550 SoC bumps up the HW version of QMP phy to v6.20 for PCIE g4x2. Add the new lane shared PCIE specific offsets in a dedicated header file. Signed-off-by: Abel Vesa --- The v7 of this patch is: https://lore.kernel.org/all/20230203081807.2248625-8-abel.vesa@linaro.org/ Changes since v7: * none Changes since v6: * none Changes since v5: * none Changes since v4: * none Changes since v3: * none Changes since v2: * none Changes since v1: * split all the offsets into separate patches, like Vinod suggested .../phy-qcom-qmp-qserdes-ln-shrd-v6.h | 32 +++++++++++++++++++ drivers/phy/qualcomm/phy-qcom-qmp.h | 1 + 2 files changed, 33 insertions(+) create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-qserdes-ln-shrd-v6.h diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-ln-shrd-v6.h b/drive= rs/phy/qualcomm/phy-qcom-qmp-qserdes-ln-shrd-v6.h new file mode 100644 index 000000000000..86d7d796d5d7 --- /dev/null +++ b/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-ln-shrd-v6.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2023, Linaro Limited + */ + +#ifndef QCOM_PHY_QMP_QSERDES_LN_SHRD_V6_H_ +#define QCOM_PHY_QMP_QSERDES_LN_SHRD_V6_H_ + +#define QSERDES_V6_LN_SHRD_RXCLK_DIV2_CTRL 0xa0 +#define QSERDES_V6_LN_SHRD_RX_Q_EN_RATES 0xb0 +#define QSERDES_V6_LN_SHRD_DFE_DAC_ENABLE1 0xb4 +#define QSERDES_V6_LN_SHRD_TX_ADAPT_POST_THRESH1 0xc4 +#define QSERDES_V6_LN_SHRD_TX_ADAPT_POST_THRESH2 0xc8 +#define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B0 0xd4 +#define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B1 0xd8 +#define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B2 0xdc +#define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B3 0xe0 +#define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B4 0xe4 +#define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B5 0xe8 +#define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B6 0xec +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH1_RATE210 0xf0 +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH1_RATE3 0xf4 +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH2_RATE210 0xf8 +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH2_RATE3 0xfc +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH3_RATE210 0x100 +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH3_RATE3 0x104 +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH4_RATE3 0x10c +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH5_RATE3 0x114 +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH6_RATE3 0x11c +#define QSERDES_V6_LN_SHRD_RX_SUMMER_CAL_SPD_MODE 0x128 + +#endif diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.h b/drivers/phy/qualcomm/phy= -qcom-qmp.h index e5974e6caf51..148663ee713a 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp.h @@ -24,6 +24,7 @@ #include "phy-qcom-qmp-qserdes-com-v6.h" #include "phy-qcom-qmp-qserdes-txrx-v6.h" #include "phy-qcom-qmp-qserdes-txrx-v6_20.h" +#include "phy-qcom-qmp-qserdes-ln-shrd-v6.h" =20 #include "phy-qcom-qmp-qserdes-pll.h" =20 --=20 2.34.1