From nobody Wed Sep 10 12:31:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 42446C61DA4 for ; Thu, 9 Mar 2023 09:19:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230328AbjCIJTi (ORCPT ); Thu, 9 Mar 2023 04:19:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48512 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230380AbjCIJTK (ORCPT ); Thu, 9 Mar 2023 04:19:10 -0500 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [IPv6:2a00:1450:4864:20::333]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0415077CB9 for ; Thu, 9 Mar 2023 01:19:09 -0800 (PST) Received: by mail-wm1-x333.google.com with SMTP id c18so657046wmr.3 for ; Thu, 09 Mar 2023 01:19:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678353547; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=lNhlbMbKgFTzrVzq3NUmZwvGkXxo0e1dgBOAWpNOK4c=; b=bMeuVF3/cA8AFOVA4Uv94GFrNM8aIMYQCCHVoq+hi10advbVH8JpbPSmKgx1RHq/E7 NMnZDQ0s/dwz5GfY8yzJf5QlhoV8Ixzzxz2ddGkgl38sfDURPl8SiwKCedUaXvCC250U 1rrhYNmtOMBklZDnZuadG+2iOB5qsACoajayZF3uPodKHrnvu6QD16Kpi6fQF1NIum1G hw5P1pNgPAv8ekBqVSagPdaQBWw0l4QX/kWkziGhSddceVYeikpQ5nflkPfK36Dsirnv rH6gedFnMkrM6xbldGJW5bBHxXtOC3bm4oMkjUyBPEDxnk7CCKrfw+MdpeWt/5ci/sS/ NaTA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678353547; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lNhlbMbKgFTzrVzq3NUmZwvGkXxo0e1dgBOAWpNOK4c=; b=ltX+nXgP4X+9mBUV7xr2x/SI6OylyU1SX01zkYjL35ZfWYhpaXZRy6wVdRC0d0uI4Q EN1CVJTdqI6L7xTTUN9htycJKdX6dJsfcIYgjLyIs6MSI4pf587KPUl5ReyK1m/bUhRk VVJJv8HqHNmBWl+8HiobV2Rk4r9J2dz2og9tWawG4GIOux4YwLTOdE221W4EthuEF245 zWePQkJQyZJVpWMAcroq0pn6s4yfwKRRoFgPPGj7RjS3qJg31fOXAK9IzB0HAfIPKwSN MPrDqlY7RKf0PgyipMytzeYuk0SiMqt5LEwsnbOO0edv2wWeUY4GvevdgkCnKfQ2ts82 8C2g== X-Gm-Message-State: AO0yUKXx3IYcbq93+cnTQdALdlT9njgLbC/PQCQW1UBzAXA6asHnVEfZ 1+jczhn8XbikNYvymgVj4U7bjlskRPZVA7YUCtu9eg== X-Google-Smtp-Source: AK7set9bboHEOoohMjRpfREFPvW8sWGOPvQier9qfLffyD14JqJa7mQuG0F4Nvc/mEywZNxUhwEUDw== X-Received: by 2002:a05:600c:3c95:b0:3eb:a4e:a2b2 with SMTP id bg21-20020a05600c3c9500b003eb0a4ea2b2mr18831478wmb.4.1678353547477; Thu, 09 Mar 2023 01:19:07 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id o8-20020a05600c4fc800b003ebfc075eaasm2177066wmq.16.2023.03.09.01.19.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Mar 2023 01:19:07 -0800 (PST) From: Neil Armstrong Date: Thu, 09 Mar 2023 10:19:03 +0100 Subject: [PATCH v4 4/5] arm64: dts: qcom: sm8450: switch to usb3/dp combo phy MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230206-topic-sm8450-upstream-dp-controller-v4-4-dca33f531e0d@linaro.org> References: <20230206-topic-sm8450-upstream-dp-controller-v4-0-dca33f531e0d@linaro.org> In-Reply-To: <20230206-topic-sm8450-upstream-dp-controller-v4-0-dca33f531e0d@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Kuogee Hsieh , Andy Gross , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The QMP PHY is a USB3/DP combo phy, switch to the newly documented bindings and register the clocks to the GCC and DISPCC controllers. Reviewed-by: Dmitry Baryshkov Signed-off-by: Neil Armstrong Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 42 +++++++++++++-------------------= ---- 1 file changed, 15 insertions(+), 27 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qco= m/sm8450.dtsi index 1a744a33bcf4..6caa2c8efb46 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -748,7 +749,7 @@ gcc: clock-controller@100000 { <&ufs_mem_phy_lanes 0>, <&ufs_mem_phy_lanes 1>, <&ufs_mem_phy_lanes 2>, - <0>; + <&usb_1_qmpphy QMP_USB43DP_USB3_PIPE_CLK>; clock-names =3D "bi_tcxo", "sleep_clk", "pcie_0_pipe_clk", @@ -2034,37 +2035,24 @@ usb_1_hsphy: phy@88e3000 { resets =3D <&gcc GCC_QUSB2PHY_PRIM_BCR>; }; =20 - usb_1_qmpphy: phy-wrapper@88e9000 { - compatible =3D "qcom,sm8450-qmp-usb3-phy"; - reg =3D <0 0x088e9000 0 0x200>, - <0 0x088e8000 0 0x20>; - status =3D "disabled"; - #address-cells =3D <2>; - #size-cells =3D <2>; - ranges; + usb_1_qmpphy: phy@88e8000 { + compatible =3D "qcom,sm8450-qmp-usb3-dp-phy"; + reg =3D <0 0x088e8000 0 0x4000>; =20 clocks =3D <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, <&rpmhcc RPMH_CXO_CLK>, - <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; - clock-names =3D "aux", "ref_clk_src", "com_aux"; + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + clock-names =3D "aux", "ref", "com_aux", "usb3_pipe"; =20 resets =3D <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, <&gcc GCC_USB3_PHY_PRIM_BCR>; reset-names =3D "phy", "common"; =20 - usb_1_ssphy: phy@88e9200 { - reg =3D <0 0x088e9200 0 0x200>, - <0 0x088e9400 0 0x200>, - <0 0x088e9c00 0 0x400>, - <0 0x088e9600 0 0x200>, - <0 0x088e9800 0 0x200>, - <0 0x088e9a00 0 0x100>; - #phy-cells =3D <0>; - #clock-cells =3D <0>; - clocks =3D <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; - clock-names =3D "pipe0"; - clock-output-names =3D "usb3_phy_pipe_clk_src"; - }; + #clock-cells =3D <1>; + #phy-cells =3D <1>; + + status =3D "disabled"; }; =20 remoteproc_slpi: remoteproc@2400000 { @@ -2972,8 +2960,8 @@ dispcc: clock-controller@af00000 { <&mdss_dsi0_phy 1>, <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>, - <0>, /* dp0 */ - <0>, + <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>, <0>, /* dp1 */ <0>, <0>, /* dp2 */ @@ -4153,7 +4141,7 @@ usb_1_dwc3: usb@a600000 { iommus =3D <&apps_smmu 0x0 0x0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; - phys =3D <&usb_1_hsphy>, <&usb_1_ssphy>; + phys =3D <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names =3D "usb2-phy", "usb3-phy"; }; }; --=20 2.34.1