From nobody Wed Sep 10 12:31:01 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4B57C6FD1C for ; Thu, 9 Mar 2023 09:19:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230281AbjCIJT0 (ORCPT ); Thu, 9 Mar 2023 04:19:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48508 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230050AbjCIJTK (ORCPT ); Thu, 9 Mar 2023 04:19:10 -0500 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [IPv6:2a00:1450:4864:20::32d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 27D2A769DF for ; Thu, 9 Mar 2023 01:19:08 -0800 (PST) Received: by mail-wm1-x32d.google.com with SMTP id l7-20020a05600c1d0700b003eb5e6d906bso740420wms.5 for ; Thu, 09 Mar 2023 01:19:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678353546; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=t0rhejUmHnka59HIO/Fizz1UCZhnVyRwPZNMVfdzEUc=; b=wAMR8q2hasTeX3KabMFQ9zDIzhG/p4aala4GlFlRMGdWE9tcqErqLXXjTrzAGevleS 1Wcq4bxP4ZrWTpwqn8+Lt1kzh6IOQpVrB357AvfOlg/512BeLmH5uN4LhCFz/HhfBo1B +PiARqJnYu/s6OD/rWGM5jUQfg1438MWobj7iT2GX1sq5+IuhTxqnV5zvJIIv/wyb7PK cNFJep3F6xARrC9IlIg+cPfl1nDQlF6lMvyqXfsP3cZ/ALFSkLkCCEqfP2CWm8LH65bh 9zmLBPWTPLC2KioQL+Mfw7pqUebBpOQeZ6GWqF+J0k7Qiclmf1y4zWa8slEM3YDo/xs1 biYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678353546; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=t0rhejUmHnka59HIO/Fizz1UCZhnVyRwPZNMVfdzEUc=; b=1x5W8sqj6Rp3uO85NdCIbcKDEapFMf5/hISiDB2M/OOVbIPL3RtqoX4/ERn6i3JslR F8frMx0ZVCYHQkU+UvF0Du84xXxkk8pZLBEp8AdlgL6lWxl7oyy8whiTL20wJnRyYxWO O1TMSJpda0RdsGOVzZlijVRk9pKRjbDzXQeRZRu+cCJ1T9jLBMEmBgiAbW3NHrE4jwmM sF+htrV1ojTf0D7T6cMPmJkEO5qSJjTtkdEGRhiK2hH+q9i2QN5FWThrJivuhVPVtMAn ZnlpTMM+n7DF+lUuAuJ7gzytbJuTI5TQcy9a8w/ED6uZkko1s/G0D+JQQ+tvkTdK2KEY 8H0Q== X-Gm-Message-State: AO0yUKVlbKS+RIIWnlXU88vtDNirGQS59clbLkLmvyLS68kbjIzGoI2Y xNIakniC8iPqedy2Uu2cBRYb/A== X-Google-Smtp-Source: AK7set9hBRFOyLkPqrrFMtl1XWpCSZMUUOwa64gJ1fIcgrHPgrXR9i0OUlZfO1XYBTdmD02SAfjsyQ== X-Received: by 2002:a05:600c:c0d:b0:3df:f124:f997 with SMTP id fm13-20020a05600c0c0d00b003dff124f997mr18147200wmb.19.1678353546477; Thu, 09 Mar 2023 01:19:06 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id o8-20020a05600c4fc800b003ebfc075eaasm2177066wmq.16.2023.03.09.01.19.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Mar 2023 01:19:06 -0800 (PST) From: Neil Armstrong Date: Thu, 09 Mar 2023 10:19:02 +0100 Subject: [PATCH v4 3/5] arm64: dts: qcom: sm8350: add dp controller MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230206-topic-sm8450-upstream-dp-controller-v4-3-dca33f531e0d@linaro.org> References: <20230206-topic-sm8450-upstream-dp-controller-v4-0-dca33f531e0d@linaro.org> In-Reply-To: <20230206-topic-sm8450-upstream-dp-controller-v4-0-dca33f531e0d@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Kuogee Hsieh , Andy Gross , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the Display Port controller subnode to the MDSS node. Tested-by: Dmitry Baryshkov #SM8350-HDK Reviewed-by: Dmitry Baryshkov Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 79 ++++++++++++++++++++++++++++++++= ++++ 1 file changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qco= m/sm8350.dtsi index 94e85313f15d..7c5adb732662 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -2405,6 +2405,85 @@ dpu_intf2_out: endpoint { remote-endpoint =3D <&mdss_dsi1_in>; }; }; + + port@2 { + reg =3D <2>; + dpu_intf0_out: endpoint { + remote-endpoint =3D <&mdss_dp_in>; + }; + }; + }; + }; + + mdss_dp: displayport-controller@ae90000 { + compatible =3D "qcom,sm8350-dp"; + reg =3D <0 0xae90000 0 0x200>, + <0 0xae90200 0 0x200>, + <0 0xae90400 0 0x600>, + <0 0xae91000 0 0x400>, + <0 0xae91400 0 0x400>; + interrupt-parent =3D <&mdss>; + interrupts =3D <12>; + clocks =3D <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&dispcc DISP_CC_MDSS_DP_AUX_CLK>, + <&dispcc DISP_CC_MDSS_DP_LINK_CLK>, + <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>, + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>; + clock-names =3D "core_iface", + "core_aux", + "ctrl_link", + "ctrl_link_iface", + "stream_pixel"; + + assigned-clocks =3D <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>, + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>; + assigned-clock-parents =3D <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>; + + phys =3D <&usb_1_qmpphy QMP_USB43DP_DP_PHY>; + phy-names =3D "dp"; + + #sound-dai-cells =3D <0>; + + operating-points-v2 =3D <&dp_opp_table>; + power-domains =3D <&rpmhpd SM8350_MMCX>; + + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + mdss_dp_in: endpoint { + remote-endpoint =3D <&dpu_intf0_out>; + }; + }; + }; + + dp_opp_table: opp-table { + compatible =3D "operating-points-v2"; + + opp-160000000 { + opp-hz =3D /bits/ 64 <160000000>; + required-opps =3D <&rpmhpd_opp_low_svs>; + }; + + opp-270000000 { + opp-hz =3D /bits/ 64 <270000000>; + required-opps =3D <&rpmhpd_opp_svs>; + }; + + opp-540000000 { + opp-hz =3D /bits/ 64 <540000000>; + required-opps =3D <&rpmhpd_opp_svs_l1>; + }; + + opp-810000000 { + opp-hz =3D /bits/ 64 <810000000>; + required-opps =3D <&rpmhpd_opp_nom>; + }; }; }; =20 --=20 2.34.1