From nobody Wed Sep 10 07:37:01 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7800DC61DA4 for ; Thu, 9 Mar 2023 09:19:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230522AbjCIJTS (ORCPT ); Thu, 9 Mar 2023 04:19:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48458 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230085AbjCIJTI (ORCPT ); Thu, 9 Mar 2023 04:19:08 -0500 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [IPv6:2a00:1450:4864:20::32e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F11226B300 for ; Thu, 9 Mar 2023 01:19:05 -0800 (PST) Received: by mail-wm1-x32e.google.com with SMTP id m25-20020a7bcb99000000b003e7842b75f2so744484wmi.3 for ; Thu, 09 Mar 2023 01:19:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678353544; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=PBcGm9IzqWfmksEDhkD68OpL5s1KaoBkDeTtWamSELM=; b=lRJV1vGvT2v+KwmS6EdWHltspQE51HUVFTaEa/Jlk6Er8WvwcLPr2aV0htuhi919P/ bIj1ck1/BwNY4nkfiS4DIcfLCkJYOkf5zwQAdUsE7F/IyYKwtgtQ59pLBpcONBBYrAo4 uQUOU3tqSfYqdp1MCQHcQbBU+GCPFcgdYq22u99DZv9p3NZdIQ9Eljdz32eh2YxLoNB1 pRQliFzO+jwpAF2bpxjXM0xVkEQulSVESjBCVx8wQsZEd2HvDX+Vl/YeBBCQY5g3u4P9 3/PcgaubSwTExm/8L8btXrqPQix0tla6OKY3ygTH8/GNRJYNDboFnj/UJhQ/DVc7X0oz tkgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678353544; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PBcGm9IzqWfmksEDhkD68OpL5s1KaoBkDeTtWamSELM=; b=xnyr4ZaaYo7K0YIbI9Q+OZ0vh9Y8haykc0hzcjB5qkeOD/HgqZenhkPEdX9ruhlnxJ vZbobSTMVx0T96wOerk8UajU43XYqswIP/84PFvcV8KmQtK6+X9xqTcF3+Fn24O3PFKl 3GfWIOOiFabt9H8Bd1QYDHc2yWDua2sS5Jg4ki6dLC7d4z0+7iSG2H/RgxJAIs0bcjg/ CSb4U7iwW+WY2liKQVFCqyDmHmx9zIbSy85E7Y6Sb8sTpmoKWpGM8sk/Vle1w+LCCC5e hgcdNspqqnhh/N3hSoTnDFndIUYo3fj3JwaRIHFuk3YVDgIWx5eM8/O3JG4vcAFbZ4Dt lAYA== X-Gm-Message-State: AO0yUKUcvcq/OmwrfnwIir0fElfsnWMXVkjNnmFwrQmHxiCA+hVyyas+ dK1XfPZv3dQExM8/JPXQJT7LHg== X-Google-Smtp-Source: AK7set9dRRR+gtTk41EMbIG56sxDpbwryXnhbCaZpdKrzlOBOqNEIw9pqbn9129F2BxRwsaMlD8IRw== X-Received: by 2002:a05:600c:1d94:b0:3eb:9693:3857 with SMTP id p20-20020a05600c1d9400b003eb96933857mr14932657wms.5.1678353544446; Thu, 09 Mar 2023 01:19:04 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id o8-20020a05600c4fc800b003ebfc075eaasm2177066wmq.16.2023.03.09.01.19.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Mar 2023 01:19:04 -0800 (PST) From: Neil Armstrong Date: Thu, 09 Mar 2023 10:19:00 +0100 Subject: [PATCH v4 1/5] dt-bindings: display: msm: dp-controller: document SM8450 compatible MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230206-topic-sm8450-upstream-dp-controller-v4-1-dca33f531e0d@linaro.org> References: <20230206-topic-sm8450-upstream-dp-controller-v4-0-dca33f531e0d@linaro.org> In-Reply-To: <20230206-topic-sm8450-upstream-dp-controller-v4-0-dca33f531e0d@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Kuogee Hsieh , Andy Gross , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong , Krzysztof Kozlowski X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The SM8450 & SM350 shares the same DT TX IP version, use the SM8350 compatible as fallback for SM8450. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Neil Armstrong --- .../bindings/display/msm/dp-controller.yaml | 25 +++++++++++++-----= ---- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.ya= ml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index 0e8d8df686dc..f0c2237d5f82 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -15,16 +15,21 @@ description: | =20 properties: compatible: - enum: - - qcom,sc7180-dp - - qcom,sc7280-dp - - qcom,sc7280-edp - - qcom,sc8180x-dp - - qcom,sc8180x-edp - - qcom,sc8280xp-dp - - qcom,sc8280xp-edp - - qcom,sdm845-dp - - qcom,sm8350-dp + oneOf: + - enum: + - qcom,sc7180-dp + - qcom,sc7280-dp + - qcom,sc7280-edp + - qcom,sc8180x-dp + - qcom,sc8180x-edp + - qcom,sc8280xp-dp + - qcom,sc8280xp-edp + - qcom,sdm845-dp + - qcom,sm8350-dp + - items: + - enum: + - qcom,sm8450-dp + - const: qcom,sm8350-dp =20 reg: minItems: 4 --=20 2.34.1 From nobody Wed Sep 10 07:37:01 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6C1EDC64EC4 for ; Thu, 9 Mar 2023 09:19:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231187AbjCIJTW (ORCPT ); Thu, 9 Mar 2023 04:19:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48512 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230147AbjCIJTI (ORCPT ); Thu, 9 Mar 2023 04:19:08 -0500 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [IPv6:2a00:1450:4864:20::336]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 00C777040A for ; Thu, 9 Mar 2023 01:19:06 -0800 (PST) Received: by mail-wm1-x336.google.com with SMTP id p16so652337wmq.5 for ; Thu, 09 Mar 2023 01:19:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678353545; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=/7jpL0kEa2Xj9fgDjL9lk8w/ZKjsnSCff3rLd2RtI5s=; b=XFiK9XmseBCx9iz7hQkOfi3NUHWC7Y2lO5mFBkUcRPM/zktk2AEALkqm8yQ4K/jru6 W3ZVnm3/MWbsgq8YnFkk4pOn74SgMWyxZ7aURoUFA1Q6hU56p/Urwv6QrLR7PZCk4Sxc xghAlPewPgg3aIH5stsO/xMJCw1jRLqXfwaySeMKN5gMeA3odsIJZTqhA22ZqpgsPtQ/ Nm3xaBmLk3bLO6f6vUlaK/6M8jHwZEGwPTXO1UBEsbNElbGZbQGz8foxWVPVCJZfwunS XRPCIfnQXjIh+nxoetXNdkU4DFBwk8ot7AeP1VHGTl0lh39CtTPp71NlRR0FJMs13CUH 3aMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678353545; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/7jpL0kEa2Xj9fgDjL9lk8w/ZKjsnSCff3rLd2RtI5s=; b=DXTiQqsoTA1S0+Cr9S2JxP3Dl8uzePX1+rIE/10JDSrQs3WQUia11WbqH0DByhv0MP Sum2CIMGwbbps3PyNKF+fOjRfoKqJUpOmpI0ujTDjowxDKoYA71P+W3BlxspPpEVmD1H Bcrj4QEpwoAR1nVJMXI7K7xN1bF/BRRlHfZDYai5oYCUi4sQ9E7MKIgA6VjdHre6qIdU kir/FsOELaAqcJJ8GKHF+81Dmnw+oU1QJVH6yqwDxsxRspYMFXf01Z5hejyfr9aoI7H2 S5lgtxTEV+G4JejtO9X4KvJUSKHR9KkgEb0+aYZb3Qjpl4//28rBx7f3mpXc8ntTXlJR idWg== X-Gm-Message-State: AO0yUKVhPyKgCf0BHQPlsQkjWA6CO9C1F814vNyGkPQHAjxPQFg1eSwV rT9WYP9gHMvwb1SjXf2/lykDfw== X-Google-Smtp-Source: AK7set/Pe/hr2TFSmQRJ+jx2J1jrarLIVFqC3pHqO1ZY17ll/42X35m1KrA+sweHMZtlsT4vhORv3Q== X-Received: by 2002:a05:600c:1907:b0:3dd:af7a:53db with SMTP id j7-20020a05600c190700b003ddaf7a53dbmr18895979wmq.11.1678353545476; Thu, 09 Mar 2023 01:19:05 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id o8-20020a05600c4fc800b003ebfc075eaasm2177066wmq.16.2023.03.09.01.19.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Mar 2023 01:19:05 -0800 (PST) From: Neil Armstrong Date: Thu, 09 Mar 2023 10:19:01 +0100 Subject: [PATCH v4 2/5] arm64: dts: qcom: sm8350: switch to combo usb3/dp phy MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230206-topic-sm8450-upstream-dp-controller-v4-2-dca33f531e0d@linaro.org> References: <20230206-topic-sm8450-upstream-dp-controller-v4-0-dca33f531e0d@linaro.org> In-Reply-To: <20230206-topic-sm8450-upstream-dp-controller-v4-0-dca33f531e0d@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Kuogee Hsieh , Andy Gross , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The first QMP PHY is an USB3/DP combo phy, switch to the newly documented bindings and register the clocks to the GCC and DISPCC controllers. Reviewed-by: Dmitry Baryshkov Tested-by: Dmitry Baryshkov #SM8350-HDK Signed-off-by: Neil Armstrong Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 42 +++++++++++++-------------------= ---- 1 file changed, 15 insertions(+), 27 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qco= m/sm8350.dtsi index 1c97e28da6ad..94e85313f15d 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -653,7 +654,7 @@ gcc: clock-controller@100000 { <&ufs_mem_phy_lanes 0>, <&ufs_mem_phy_lanes 1>, <&ufs_mem_phy_lanes 2>, - <0>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PIPE_CLK>, <0>; }; =20 @@ -2125,37 +2126,24 @@ usb_2_hsphy: phy@88e4000 { resets =3D <&gcc GCC_QUSB2PHY_SEC_BCR>; }; =20 - usb_1_qmpphy: phy-wrapper@88e9000 { - compatible =3D "qcom,sm8350-qmp-usb3-phy"; - reg =3D <0 0x088e9000 0 0x200>, - <0 0x088e8000 0 0x20>; - status =3D "disabled"; - #address-cells =3D <2>; - #size-cells =3D <2>; - ranges; + usb_1_qmpphy: phy@88e9000 { + compatible =3D "qcom,sm8350-qmp-usb3-dp-phy"; + reg =3D <0 0x088e8000 0 0x3000>; =20 clocks =3D <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, <&rpmhcc RPMH_CXO_CLK>, - <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; - clock-names =3D "aux", "ref_clk_src", "com_aux"; + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + clock-names =3D "aux", "ref", "com_aux", "usb3_pipe"; =20 resets =3D <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, <&gcc GCC_USB3_PHY_PRIM_BCR>; reset-names =3D "phy", "common"; =20 - usb_1_ssphy: phy@88e9200 { - reg =3D <0 0x088e9200 0 0x200>, - <0 0x088e9400 0 0x200>, - <0 0x088e9c00 0 0x400>, - <0 0x088e9600 0 0x200>, - <0 0x088e9800 0 0x200>, - <0 0x088e9a00 0 0x100>; - #phy-cells =3D <0>; - #clock-cells =3D <0>; - clocks =3D <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; - clock-names =3D "pipe0"; - clock-output-names =3D "usb3_phy_pipe_clk_src"; - }; + #clock-cells =3D <1>; + #phy-cells =3D <1>; + + status =3D "disabled"; }; =20 usb_2_qmpphy: phy-wrapper@88eb000 { @@ -2258,7 +2246,7 @@ usb_1_dwc3: usb@a600000 { iommus =3D <&apps_smmu 0x0 0x0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; - phys =3D <&usb_1_hsphy>, <&usb_1_ssphy>; + phys =3D <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names =3D "usb2-phy", "usb3-phy"; }; }; @@ -2623,8 +2611,8 @@ dispcc: clock-controller@af00000 { clocks =3D <&rpmhcc RPMH_CXO_CLK>, <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>, <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>, - <0>, - <0>; + <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>; clock-names =3D "bi_tcxo", "dsi0_phy_pll_out_byteclk", "dsi0_phy_pll_out_dsiclk", --=20 2.34.1 From nobody Wed Sep 10 07:37:01 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4B57C6FD1C for ; Thu, 9 Mar 2023 09:19:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230281AbjCIJT0 (ORCPT ); Thu, 9 Mar 2023 04:19:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48508 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230050AbjCIJTK (ORCPT ); Thu, 9 Mar 2023 04:19:10 -0500 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [IPv6:2a00:1450:4864:20::32d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 27D2A769DF for ; Thu, 9 Mar 2023 01:19:08 -0800 (PST) Received: by mail-wm1-x32d.google.com with SMTP id l7-20020a05600c1d0700b003eb5e6d906bso740420wms.5 for ; Thu, 09 Mar 2023 01:19:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678353546; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=t0rhejUmHnka59HIO/Fizz1UCZhnVyRwPZNMVfdzEUc=; b=wAMR8q2hasTeX3KabMFQ9zDIzhG/p4aala4GlFlRMGdWE9tcqErqLXXjTrzAGevleS 1Wcq4bxP4ZrWTpwqn8+Lt1kzh6IOQpVrB357AvfOlg/512BeLmH5uN4LhCFz/HhfBo1B +PiARqJnYu/s6OD/rWGM5jUQfg1438MWobj7iT2GX1sq5+IuhTxqnV5zvJIIv/wyb7PK cNFJep3F6xARrC9IlIg+cPfl1nDQlF6lMvyqXfsP3cZ/ALFSkLkCCEqfP2CWm8LH65bh 9zmLBPWTPLC2KioQL+Mfw7pqUebBpOQeZ6GWqF+J0k7Qiclmf1y4zWa8slEM3YDo/xs1 biYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678353546; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=t0rhejUmHnka59HIO/Fizz1UCZhnVyRwPZNMVfdzEUc=; b=1x5W8sqj6Rp3uO85NdCIbcKDEapFMf5/hISiDB2M/OOVbIPL3RtqoX4/ERn6i3JslR F8frMx0ZVCYHQkU+UvF0Du84xXxkk8pZLBEp8AdlgL6lWxl7oyy8whiTL20wJnRyYxWO O1TMSJpda0RdsGOVzZlijVRk9pKRjbDzXQeRZRu+cCJ1T9jLBMEmBgiAbW3NHrE4jwmM sF+htrV1ojTf0D7T6cMPmJkEO5qSJjTtkdEGRhiK2hH+q9i2QN5FWThrJivuhVPVtMAn ZnlpTMM+n7DF+lUuAuJ7gzytbJuTI5TQcy9a8w/ED6uZkko1s/G0D+JQQ+tvkTdK2KEY 8H0Q== X-Gm-Message-State: AO0yUKVlbKS+RIIWnlXU88vtDNirGQS59clbLkLmvyLS68kbjIzGoI2Y xNIakniC8iPqedy2Uu2cBRYb/A== X-Google-Smtp-Source: AK7set9hBRFOyLkPqrrFMtl1XWpCSZMUUOwa64gJ1fIcgrHPgrXR9i0OUlZfO1XYBTdmD02SAfjsyQ== X-Received: by 2002:a05:600c:c0d:b0:3df:f124:f997 with SMTP id fm13-20020a05600c0c0d00b003dff124f997mr18147200wmb.19.1678353546477; Thu, 09 Mar 2023 01:19:06 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id o8-20020a05600c4fc800b003ebfc075eaasm2177066wmq.16.2023.03.09.01.19.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Mar 2023 01:19:06 -0800 (PST) From: Neil Armstrong Date: Thu, 09 Mar 2023 10:19:02 +0100 Subject: [PATCH v4 3/5] arm64: dts: qcom: sm8350: add dp controller MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230206-topic-sm8450-upstream-dp-controller-v4-3-dca33f531e0d@linaro.org> References: <20230206-topic-sm8450-upstream-dp-controller-v4-0-dca33f531e0d@linaro.org> In-Reply-To: <20230206-topic-sm8450-upstream-dp-controller-v4-0-dca33f531e0d@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Kuogee Hsieh , Andy Gross , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the Display Port controller subnode to the MDSS node. Tested-by: Dmitry Baryshkov #SM8350-HDK Reviewed-by: Dmitry Baryshkov Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 79 ++++++++++++++++++++++++++++++++= ++++ 1 file changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qco= m/sm8350.dtsi index 94e85313f15d..7c5adb732662 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -2405,6 +2405,85 @@ dpu_intf2_out: endpoint { remote-endpoint =3D <&mdss_dsi1_in>; }; }; + + port@2 { + reg =3D <2>; + dpu_intf0_out: endpoint { + remote-endpoint =3D <&mdss_dp_in>; + }; + }; + }; + }; + + mdss_dp: displayport-controller@ae90000 { + compatible =3D "qcom,sm8350-dp"; + reg =3D <0 0xae90000 0 0x200>, + <0 0xae90200 0 0x200>, + <0 0xae90400 0 0x600>, + <0 0xae91000 0 0x400>, + <0 0xae91400 0 0x400>; + interrupt-parent =3D <&mdss>; + interrupts =3D <12>; + clocks =3D <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&dispcc DISP_CC_MDSS_DP_AUX_CLK>, + <&dispcc DISP_CC_MDSS_DP_LINK_CLK>, + <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>, + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>; + clock-names =3D "core_iface", + "core_aux", + "ctrl_link", + "ctrl_link_iface", + "stream_pixel"; + + assigned-clocks =3D <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>, + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>; + assigned-clock-parents =3D <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>; + + phys =3D <&usb_1_qmpphy QMP_USB43DP_DP_PHY>; + phy-names =3D "dp"; + + #sound-dai-cells =3D <0>; + + operating-points-v2 =3D <&dp_opp_table>; + power-domains =3D <&rpmhpd SM8350_MMCX>; + + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + mdss_dp_in: endpoint { + remote-endpoint =3D <&dpu_intf0_out>; + }; + }; + }; + + dp_opp_table: opp-table { + compatible =3D "operating-points-v2"; + + opp-160000000 { + opp-hz =3D /bits/ 64 <160000000>; + required-opps =3D <&rpmhpd_opp_low_svs>; + }; + + opp-270000000 { + opp-hz =3D /bits/ 64 <270000000>; + required-opps =3D <&rpmhpd_opp_svs>; + }; + + opp-540000000 { + opp-hz =3D /bits/ 64 <540000000>; + required-opps =3D <&rpmhpd_opp_svs_l1>; + }; + + opp-810000000 { + opp-hz =3D /bits/ 64 <810000000>; + required-opps =3D <&rpmhpd_opp_nom>; + }; }; }; =20 --=20 2.34.1 From nobody Wed Sep 10 07:37:01 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 42446C61DA4 for ; Thu, 9 Mar 2023 09:19:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230328AbjCIJTi (ORCPT ); Thu, 9 Mar 2023 04:19:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48512 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230380AbjCIJTK (ORCPT ); Thu, 9 Mar 2023 04:19:10 -0500 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [IPv6:2a00:1450:4864:20::333]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0415077CB9 for ; Thu, 9 Mar 2023 01:19:09 -0800 (PST) Received: by mail-wm1-x333.google.com with SMTP id c18so657046wmr.3 for ; Thu, 09 Mar 2023 01:19:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678353547; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=lNhlbMbKgFTzrVzq3NUmZwvGkXxo0e1dgBOAWpNOK4c=; b=bMeuVF3/cA8AFOVA4Uv94GFrNM8aIMYQCCHVoq+hi10advbVH8JpbPSmKgx1RHq/E7 NMnZDQ0s/dwz5GfY8yzJf5QlhoV8Ixzzxz2ddGkgl38sfDURPl8SiwKCedUaXvCC250U 1rrhYNmtOMBklZDnZuadG+2iOB5qsACoajayZF3uPodKHrnvu6QD16Kpi6fQF1NIum1G hw5P1pNgPAv8ekBqVSagPdaQBWw0l4QX/kWkziGhSddceVYeikpQ5nflkPfK36Dsirnv rH6gedFnMkrM6xbldGJW5bBHxXtOC3bm4oMkjUyBPEDxnk7CCKrfw+MdpeWt/5ci/sS/ NaTA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678353547; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lNhlbMbKgFTzrVzq3NUmZwvGkXxo0e1dgBOAWpNOK4c=; b=ltX+nXgP4X+9mBUV7xr2x/SI6OylyU1SX01zkYjL35ZfWYhpaXZRy6wVdRC0d0uI4Q EN1CVJTdqI6L7xTTUN9htycJKdX6dJsfcIYgjLyIs6MSI4pf587KPUl5ReyK1m/bUhRk VVJJv8HqHNmBWl+8HiobV2Rk4r9J2dz2og9tWawG4GIOux4YwLTOdE221W4EthuEF245 zWePQkJQyZJVpWMAcroq0pn6s4yfwKRRoFgPPGj7RjS3qJg31fOXAK9IzB0HAfIPKwSN MPrDqlY7RKf0PgyipMytzeYuk0SiMqt5LEwsnbOO0edv2wWeUY4GvevdgkCnKfQ2ts82 8C2g== X-Gm-Message-State: AO0yUKXx3IYcbq93+cnTQdALdlT9njgLbC/PQCQW1UBzAXA6asHnVEfZ 1+jczhn8XbikNYvymgVj4U7bjlskRPZVA7YUCtu9eg== X-Google-Smtp-Source: AK7set9bboHEOoohMjRpfREFPvW8sWGOPvQier9qfLffyD14JqJa7mQuG0F4Nvc/mEywZNxUhwEUDw== X-Received: by 2002:a05:600c:3c95:b0:3eb:a4e:a2b2 with SMTP id bg21-20020a05600c3c9500b003eb0a4ea2b2mr18831478wmb.4.1678353547477; Thu, 09 Mar 2023 01:19:07 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id o8-20020a05600c4fc800b003ebfc075eaasm2177066wmq.16.2023.03.09.01.19.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Mar 2023 01:19:07 -0800 (PST) From: Neil Armstrong Date: Thu, 09 Mar 2023 10:19:03 +0100 Subject: [PATCH v4 4/5] arm64: dts: qcom: sm8450: switch to usb3/dp combo phy MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230206-topic-sm8450-upstream-dp-controller-v4-4-dca33f531e0d@linaro.org> References: <20230206-topic-sm8450-upstream-dp-controller-v4-0-dca33f531e0d@linaro.org> In-Reply-To: <20230206-topic-sm8450-upstream-dp-controller-v4-0-dca33f531e0d@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Kuogee Hsieh , Andy Gross , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The QMP PHY is a USB3/DP combo phy, switch to the newly documented bindings and register the clocks to the GCC and DISPCC controllers. Reviewed-by: Dmitry Baryshkov Signed-off-by: Neil Armstrong Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 42 +++++++++++++-------------------= ---- 1 file changed, 15 insertions(+), 27 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qco= m/sm8450.dtsi index 1a744a33bcf4..6caa2c8efb46 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -748,7 +749,7 @@ gcc: clock-controller@100000 { <&ufs_mem_phy_lanes 0>, <&ufs_mem_phy_lanes 1>, <&ufs_mem_phy_lanes 2>, - <0>; + <&usb_1_qmpphy QMP_USB43DP_USB3_PIPE_CLK>; clock-names =3D "bi_tcxo", "sleep_clk", "pcie_0_pipe_clk", @@ -2034,37 +2035,24 @@ usb_1_hsphy: phy@88e3000 { resets =3D <&gcc GCC_QUSB2PHY_PRIM_BCR>; }; =20 - usb_1_qmpphy: phy-wrapper@88e9000 { - compatible =3D "qcom,sm8450-qmp-usb3-phy"; - reg =3D <0 0x088e9000 0 0x200>, - <0 0x088e8000 0 0x20>; - status =3D "disabled"; - #address-cells =3D <2>; - #size-cells =3D <2>; - ranges; + usb_1_qmpphy: phy@88e8000 { + compatible =3D "qcom,sm8450-qmp-usb3-dp-phy"; + reg =3D <0 0x088e8000 0 0x4000>; =20 clocks =3D <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, <&rpmhcc RPMH_CXO_CLK>, - <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; - clock-names =3D "aux", "ref_clk_src", "com_aux"; + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + clock-names =3D "aux", "ref", "com_aux", "usb3_pipe"; =20 resets =3D <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, <&gcc GCC_USB3_PHY_PRIM_BCR>; reset-names =3D "phy", "common"; =20 - usb_1_ssphy: phy@88e9200 { - reg =3D <0 0x088e9200 0 0x200>, - <0 0x088e9400 0 0x200>, - <0 0x088e9c00 0 0x400>, - <0 0x088e9600 0 0x200>, - <0 0x088e9800 0 0x200>, - <0 0x088e9a00 0 0x100>; - #phy-cells =3D <0>; - #clock-cells =3D <0>; - clocks =3D <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; - clock-names =3D "pipe0"; - clock-output-names =3D "usb3_phy_pipe_clk_src"; - }; + #clock-cells =3D <1>; + #phy-cells =3D <1>; + + status =3D "disabled"; }; =20 remoteproc_slpi: remoteproc@2400000 { @@ -2972,8 +2960,8 @@ dispcc: clock-controller@af00000 { <&mdss_dsi0_phy 1>, <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>, - <0>, /* dp0 */ - <0>, + <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>, <0>, /* dp1 */ <0>, <0>, /* dp2 */ @@ -4153,7 +4141,7 @@ usb_1_dwc3: usb@a600000 { iommus =3D <&apps_smmu 0x0 0x0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; - phys =3D <&usb_1_hsphy>, <&usb_1_ssphy>; + phys =3D <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names =3D "usb2-phy", "usb3-phy"; }; }; --=20 2.34.1 From nobody Wed Sep 10 07:37:01 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8F834C64EC4 for ; Thu, 9 Mar 2023 09:19:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230514AbjCIJTb (ORCPT ); Thu, 9 Mar 2023 04:19:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48704 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230434AbjCIJTL (ORCPT ); Thu, 9 Mar 2023 04:19:11 -0500 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [IPv6:2a00:1450:4864:20::336]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 032647BA2C for ; Thu, 9 Mar 2023 01:19:09 -0800 (PST) Received: by mail-wm1-x336.google.com with SMTP id c18so657073wmr.3 for ; Thu, 09 Mar 2023 01:19:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678353548; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=AHKQikRbXMPYNu7t4y4O2RDVfK4ikVupKc4HZNkz7SY=; b=N+cCHUOj/EmEMlLtfs4R1PVg38I1Y0U5qtRvFfjpWZcRE/5awIhe1R5BoIso6KLr5O /9mrl3vMpGV54nWQBUTq7W1AJah2E0YO7rS3IG6cG/TDM/AA++btCpEZZ/VTlhKxYiyA YvTgo11xv4fNrGx8qtWSk+fuxp1UofpZruGiABg4dhM0GTe96yNda8HLHFwH6NJcd/hv Hx1xIcGL6ZVqx3MkQpmq7jHgEyt1U39zHOvnWKr/yLzcuyxWVM4a9iRzwxC/UV8inhEn Y5HKgylQsJVdcXJVJ3R0LhESKUCGnNRoejmfTn2uZ2qagh3I4hikWIkGzbyZFO9xT7s8 0M4Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678353548; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AHKQikRbXMPYNu7t4y4O2RDVfK4ikVupKc4HZNkz7SY=; b=pX6u6gBAIU+Mxa2dHfFtBXRkROkkFM83U2R05KtrylRruBUInxhbL5YCOE2a4lXspw RjIJqDjAp4SCSjnUPLkZ5Ufi1AxoKo8yF1av12pzC2Vk/eRnW6HcSJHWZNYhS49ELQLX xRxo6VNLByFs+xNJgbZEz4l10DwAJuSAhhO18dkfO58VeXg3u3mi2k0f+2SjAnz0m/sf aX7GTuyFzRVMbWrYUR50yPD82K3RaJROJ1Diz0sM2dZvejMzaGgw62KuL0VXx03O30Z1 LdXapCB1mRkaXCP8gFqHgvG9rdBJN15X5FIgrR37bw1kKCc21kSJKRdAEGEDHxUlvb6y hJCw== X-Gm-Message-State: AO0yUKXi0CEUAjwwcvuuYv0XdP5+XQSdb0XDML6513tsPYsu+AIfrCy2 rrBjQzmUIxLaU4E81M1RenIurg== X-Google-Smtp-Source: AK7set8WVl8E04epoxC/i+3wBIljDS1OEyw4rH7KIPayqK1GjgVmpuHbDG7pFs+xCPxvzSNE9oXoJw== X-Received: by 2002:a1c:750a:0:b0:3ea:e834:d0d1 with SMTP id o10-20020a1c750a000000b003eae834d0d1mr18438139wmc.36.1678353548391; Thu, 09 Mar 2023 01:19:08 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id o8-20020a05600c4fc800b003ebfc075eaasm2177066wmq.16.2023.03.09.01.19.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Mar 2023 01:19:08 -0800 (PST) From: Neil Armstrong Date: Thu, 09 Mar 2023 10:19:04 +0100 Subject: [PATCH v4 5/5] arm64: dts: qcom: sm8450: add dp controller MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230206-topic-sm8450-upstream-dp-controller-v4-5-dca33f531e0d@linaro.org> References: <20230206-topic-sm8450-upstream-dp-controller-v4-0-dca33f531e0d@linaro.org> In-Reply-To: <20230206-topic-sm8450-upstream-dp-controller-v4-0-dca33f531e0d@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Kuogee Hsieh , Andy Gross , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the Display Port controller subnode to the MDSS node. Signed-off-by: Neil Armstrong Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 79 ++++++++++++++++++++++++++++++++= ++++ 1 file changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qco= m/sm8450.dtsi index 6caa2c8efb46..4f256296d998 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -2751,6 +2751,13 @@ dpu_intf2_out: endpoint { }; }; =20 + port@2 { + reg =3D <2>; + dpu_intf0_out: endpoint { + remote-endpoint =3D <&mdss_dp0_in>; + }; + }; + }; =20 mdp_opp_table: opp-table { @@ -2783,6 +2790,78 @@ opp-500000000 { }; }; =20 + mdss_dp0: displayport-controller@ae90000 { + compatible =3D "qcom,sm8450-dp", "qcom,sm8350-dp"; + reg =3D <0 0xae90000 0 0x200>, + <0 0xae90200 0 0x200>, + <0 0xae90400 0 0xc00>, + <0 0xae91000 0 0x400>, + <0 0xae91400 0 0x400>; + interrupt-parent =3D <&mdss>; + interrupts =3D <12>; + clocks =3D <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&dispcc DISP_CC_MDSS_DPTX0_AUX_CLK>, + <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK>, + <&dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>, + <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>; + clock-names =3D "core_iface", + "core_aux", + "ctrl_link", + "ctrl_link_iface", + "stream_pixel"; + + assigned-clocks =3D <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>, + <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>; + assigned-clock-parents =3D <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>; + + phys =3D <&usb_1_qmpphy QMP_USB43DP_DP_PHY>; + phy-names =3D "dp"; + + #sound-dai-cells =3D <0>; + + operating-points-v2 =3D <&dp_opp_table>; + power-domains =3D <&rpmhpd SM8450_MMCX>; + + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + mdss_dp0_in: endpoint { + remote-endpoint =3D <&dpu_intf0_out>; + }; + }; + }; + + dp_opp_table: opp-table { + compatible =3D "operating-points-v2"; + + opp-160000000 { + opp-hz =3D /bits/ 64 <160000000>; + required-opps =3D <&rpmhpd_opp_low_svs>; + }; + + opp-270000000 { + opp-hz =3D /bits/ 64 <270000000>; + required-opps =3D <&rpmhpd_opp_svs>; + }; + + opp-540000000 { + opp-hz =3D /bits/ 64 <540000000>; + required-opps =3D <&rpmhpd_opp_svs_l1>; + }; + + opp-810000000 { + opp-hz =3D /bits/ 64 <810000000>; + required-opps =3D <&rpmhpd_opp_nom>; + }; + }; + }; + mdss_dsi0: dsi@ae94000 { compatible =3D "qcom,sm8450-dsi-ctrl", "qcom,mdss-dsi-ctrl"; reg =3D <0 0x0ae94000 0 0x400>; --=20 2.34.1