From nobody Sat Sep 21 05:40:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA086C38142 for ; Wed, 1 Feb 2023 07:33:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232001AbjBAHd6 (ORCPT ); Wed, 1 Feb 2023 02:33:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33886 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231917AbjBAHdj (ORCPT ); Wed, 1 Feb 2023 02:33:39 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2F258975E; Tue, 31 Jan 2023 23:33:29 -0800 (PST) X-UUID: b654cbf4a20211ed945fc101203acc17-20230201 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=yicZlhgHEByptDrJJcDgc4g/qNfy8/ddnqXBGAC7QFM=; b=E/6oPFiBePt3NDUN56vAXNUzDwnXEEZl+MivuEkCt4mnXCm0t4PbKDkw6BNGjUYX0Th2Wtap2Iog50VRBpnvgHqp5hhGdEdKTgj5/jZMdLGbRA8E06fmjlLrQ61LXhgzFTzM0tWa2+XsxHXKr4cqLGcy3dEx3UhcZksvX7VoTVk=; X-CID-P-RULE: Spam_GS6885AD X-CID-O-INFO: VERSION:1.1.18,REQID:ad230056-78e9-4399-b295-86c22c7c5892,IP:0,U RL:0,TC:0,Content:0,EDM:25,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS6885AD,ACT ION:quarantine,TS:120 X-CID-INFO: VERSION:1.1.18,REQID:ad230056-78e9-4399-b295-86c22c7c5892,IP:0,URL :0,TC:0,Content:0,EDM:25,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTIO N:quarantine,TS:120 X-CID-META: VersionHash:3ca2d6b,CLOUDID:7ba51ef7-ff42-4fb0-b929-626456a83c14,B ulkID:230201153326Y1WHBXPM,BulkQuantity:0,Recheck:0,SF:38|29|28|17|19|48,T C:nil,Content:0,EDM:5,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0, OSI:0,OSA:0 X-CID-BVR: 0 X-UUID: b654cbf4a20211ed945fc101203acc17-20230201 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1781945916; Wed, 01 Feb 2023 15:33:25 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Wed, 1 Feb 2023 15:33:23 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Wed, 1 Feb 2023 15:33:22 +0800 From: Yunfei Dong To: Yunfei Dong , Chen-Yu Tsai , Nicolas Dufresne , Hans Verkuil , AngeloGioacchino Del Regno , Benjamin Gaignard , Tiffany Lin CC: Mauro Carvalho Chehab , Matthias Brugger , Hsin-Yi Wang , Fritz Koenig , Daniel Vetter , Steve Cho , , , , , , Subject: [PATCH v4,4/7] media: mediatek: vcodec: add core decode done event Date: Wed, 1 Feb 2023 15:33:13 +0800 Message-ID: <20230201073316.27923-5-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230201073316.27923-1-yunfei.dong@mediatek.com> References: <20230201073316.27923-1-yunfei.dong@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Need to make sure core decode done before current instance is free. Fixes: 365e4ba01df4 ("media: mtk-vcodec: Add work queue for core hardware d= ecode") Signed-off-by: Yunfei Dong Reviewed-by: AngeloGioacchino Del Regno --- drivers/media/platform/mediatek/vcodec/vdec_msg_queue.c | 4 +++- drivers/media/platform/mediatek/vcodec/vdec_msg_queue.h | 2 ++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/mediatek/vcodec/vdec_msg_queue.c b/driv= ers/media/platform/mediatek/vcodec/vdec_msg_queue.c index 0da6e3e2ef0b..ce7c82e38103 100644 --- a/drivers/media/platform/mediatek/vcodec/vdec_msg_queue.c +++ b/drivers/media/platform/mediatek/vcodec/vdec_msg_queue.c @@ -196,7 +196,7 @@ bool vdec_msg_queue_wait_lat_buf_full(struct vdec_msg_q= ueue *msg_queue) spin_unlock(&core_ctx->ready_lock); =20 timeout_jiff =3D msecs_to_jiffies(1000 * (NUM_BUFFER_COUNT + 2)); - ret =3D wait_event_timeout(msg_queue->lat_ctx.ready_to_use, + ret =3D wait_event_timeout(msg_queue->ctx->msg_queue.core_dec_done, msg_queue->lat_ctx.ready_num =3D=3D NUM_BUFFER_COUNT, timeout_jiff); if (ret) { @@ -257,6 +257,7 @@ static void vdec_msg_queue_core_work(struct work_struct= *work) mtk_vcodec_dec_disable_hardware(ctx, MTK_VDEC_CORE); vdec_msg_queue_qbuf(&ctx->msg_queue.lat_ctx, lat_buf); =20 + wake_up_all(&ctx->msg_queue.core_dec_done); if (atomic_read(&lat_buf->ctx->msg_queue.core_list_cnt)) { mtk_v4l2_debug(3, "re-schedule to decode for core: %d", dev->msg_queue_core_ctx.ready_num); @@ -281,6 +282,7 @@ int vdec_msg_queue_init(struct vdec_msg_queue *msg_queu= e, =20 atomic_set(&msg_queue->lat_list_cnt, 0); atomic_set(&msg_queue->core_list_cnt, 0); + init_waitqueue_head(&msg_queue->core_dec_done); =20 msg_queue->wdma_addr.size =3D vde_msg_queue_get_trans_size(ctx->picinfo.buf_w, diff --git a/drivers/media/platform/mediatek/vcodec/vdec_msg_queue.h b/driv= ers/media/platform/mediatek/vcodec/vdec_msg_queue.h index 56280d6682c5..a75c04418f52 100644 --- a/drivers/media/platform/mediatek/vcodec/vdec_msg_queue.h +++ b/drivers/media/platform/mediatek/vcodec/vdec_msg_queue.h @@ -76,6 +76,7 @@ struct vdec_lat_buf { * * @lat_list_cnt: used to record each instance lat list count * @core_list_cnt: used to record each instance core list count + * @core_dec_done: core work queue decode done event */ struct vdec_msg_queue { struct vdec_lat_buf lat_buf[NUM_BUFFER_COUNT]; @@ -90,6 +91,7 @@ struct vdec_msg_queue { =20 atomic_t lat_list_cnt; atomic_t core_list_cnt; + wait_queue_head_t core_dec_done; }; =20 /** --=20 2.18.0