From nobody Sat Sep 13 20:35:33 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AAB45C54EAA for ; Mon, 30 Jan 2023 12:09:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236668AbjA3MJI (ORCPT ); Mon, 30 Jan 2023 07:09:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38258 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236720AbjA3MIk (ORCPT ); Mon, 30 Jan 2023 07:08:40 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0DE8410ABF for ; Mon, 30 Jan 2023 04:08:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1675080503; x=1706616503; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=v/tEkZndHLSFZQ+dXZe20waQvOgf9abYz/CSFTYQntc=; b=Ru3RGxAu9IaGSbDzdAnDTUGZHA1NoIuZ1GBmHN+gAzslbwRludE+shSt 53E17j0gaNBjdQSDOXGDFfBvHK8JbcxPOPZJxpiib6TEtbkiTT69Td8i4 HpL/HL6oVhdgG0bRcoTwELoTTnYHjFR+jBYY1l6FReYqd0rmbhDeuSy4w Ga/1PwA21MkFq/KYyBWogmfAT6ZlKNevCTQ6izjBaCKSj/YgFlF4z32fL VPVjKzC5pszahhHgJWdB403z2krHX7N75fr4Ja4hb2oDjeAFvYfb8EHb9 RDju49mgPyOgEkFKGvTQvF8n85qsDygkIRjwRIp1w+RCi69G70VR2poCp w==; X-IronPort-AV: E=Sophos;i="5.97,257,1669100400"; d="scan'208";a="194432936" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 30 Jan 2023 05:07:26 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Mon, 30 Jan 2023 05:07:24 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Mon, 30 Jan 2023 05:07:20 -0700 From: Claudiu Beznea To: , , , , , CC: , , , Claudiu Beznea Subject: [PATCH 1/8] ASoC: mchp-spdifrx: fix controls which rely on rsr register Date: Mon, 30 Jan 2023 14:06:40 +0200 Message-ID: <20230130120647.638049-2-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230130120647.638049-1-claudiu.beznea@microchip.com> References: <20230130120647.638049-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The SPDIFRX block is clocked by 2 clocks: peripheral and generic clocks. Peripheral clock feeds user interface (registers) and generic clock feeds the receiver. To enable the receiver the generic clock needs to be enabled and also the ENABLE bit of MCHP_SPDIFRX_MR register need to be set. The signal control exported by mchp-spdifrx driver reports wrong status when the receiver is disabled. This can happen when requesting the signal and the capture was not previously started. To solve this the receiver needs to be enabled (by enabling generic clock and setting ENABLE bit of MR register) before reading the signal status. As with this fix there are 2 paths now that need to control the generic clock and ENABLE bit of SPDIFRX_MR register (one path though controls, one path though configuration) a mutex has been introduced. We can't rely on subsystem locking as the controls are protected by struct snd_card::controls_rwsem semaphore and configuration is protected by a different lock (embedded in snd_pcm_stream_lock_irq()). The introduction of mutex is also extended to other controls which rely on SPDIFRX_RSR.ULOCK bit as it has been discovered experimentally that having both clocks enabled but not the receiver (through ENABLE bit of SPDIFRX.MR) leads to inconsistent values of SPDIFRX_RSR.ULOCK. Thus on some controls we rely on software state (dev->trigger_enabled protected by mutex) to retrieve proper values. Fixes: ef265c55c1ac ("ASoC: mchp-spdifrx: add driver for SPDIF RX") Signed-off-by: Claudiu Beznea --- sound/soc/atmel/mchp-spdifrx.c | 192 ++++++++++++++++++++++++--------- 1 file changed, 142 insertions(+), 50 deletions(-) diff --git a/sound/soc/atmel/mchp-spdifrx.c b/sound/soc/atmel/mchp-spdifrx.c index ec0705cc40fa..2d86e0ec930f 100644 --- a/sound/soc/atmel/mchp-spdifrx.c +++ b/sound/soc/atmel/mchp-spdifrx.c @@ -233,11 +233,13 @@ struct mchp_spdifrx_dev { struct mchp_spdifrx_mixer_control control; spinlock_t blockend_lock; /* protect access to blockend_refcount */ int blockend_refcount; + struct mutex mlock; struct device *dev; struct regmap *regmap; struct clk *pclk; struct clk *gclk; unsigned int fmt; + unsigned int trigger_enabled; unsigned int gclk_enabled:1; }; =20 @@ -353,47 +355,40 @@ static int mchp_spdifrx_trigger(struct snd_pcm_substr= eam *substream, int cmd, struct snd_soc_dai *dai) { struct mchp_spdifrx_dev *dev =3D snd_soc_dai_get_drvdata(dai); - u32 mr; - int running; - int ret; - - regmap_read(dev->regmap, SPDIFRX_MR, &mr); - running =3D !!(mr & SPDIFRX_MR_RXEN_ENABLE); + int ret =3D 0; =20 switch (cmd) { case SNDRV_PCM_TRIGGER_START: case SNDRV_PCM_TRIGGER_RESUME: case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: - if (!running) { - mr &=3D ~SPDIFRX_MR_RXEN_MASK; - mr |=3D SPDIFRX_MR_RXEN_ENABLE; - /* enable overrun interrupts */ - regmap_write(dev->regmap, SPDIFRX_IER, - SPDIFRX_IR_OVERRUN); - } + mutex_lock(&dev->mlock); + /* Enable overrun interrupts */ + regmap_write(dev->regmap, SPDIFRX_IER, SPDIFRX_IR_OVERRUN); + + /* Enable receiver. */ + regmap_update_bits(dev->regmap, SPDIFRX_MR, SPDIFRX_MR_RXEN_MASK, + SPDIFRX_MR_RXEN_ENABLE); + dev->trigger_enabled =3D true; + mutex_unlock(&dev->mlock); break; case SNDRV_PCM_TRIGGER_STOP: case SNDRV_PCM_TRIGGER_SUSPEND: case SNDRV_PCM_TRIGGER_PAUSE_PUSH: - if (running) { - mr &=3D ~SPDIFRX_MR_RXEN_MASK; - mr |=3D SPDIFRX_MR_RXEN_DISABLE; - /* disable overrun interrupts */ - regmap_write(dev->regmap, SPDIFRX_IDR, - SPDIFRX_IR_OVERRUN); - } + mutex_lock(&dev->mlock); + /* Disable overrun interrupts */ + regmap_write(dev->regmap, SPDIFRX_IDR, SPDIFRX_IR_OVERRUN); + + /* Disable receiver. */ + regmap_update_bits(dev->regmap, SPDIFRX_MR, SPDIFRX_MR_RXEN_MASK, + SPDIFRX_MR_RXEN_DISABLE); + dev->trigger_enabled =3D false; + mutex_unlock(&dev->mlock); break; default: - return -EINVAL; + ret =3D -EINVAL; } =20 - ret =3D regmap_write(dev->regmap, SPDIFRX_MR, mr); - if (ret) { - dev_err(dev->dev, "unable to enable/disable RX: %d\n", ret); - return ret; - } - - return 0; + return ret; } =20 static int mchp_spdifrx_hw_params(struct snd_pcm_substream *substream, @@ -413,13 +408,6 @@ static int mchp_spdifrx_hw_params(struct snd_pcm_subst= ream *substream, return -EINVAL; } =20 - regmap_read(dev->regmap, SPDIFRX_MR, &mr); - - if (mr & SPDIFRX_MR_RXEN_ENABLE) { - dev_err(dev->dev, "PCM already running\n"); - return -EBUSY; - } - if (params_channels(params) !=3D SPDIFRX_CHANNELS) { dev_err(dev->dev, "unsupported number of channels: %d\n", params_channels(params)); @@ -445,6 +433,13 @@ static int mchp_spdifrx_hw_params(struct snd_pcm_subst= ream *substream, return -EINVAL; } =20 + mutex_lock(&dev->mlock); + if (dev->trigger_enabled) { + dev_err(dev->dev, "PCM already running\n"); + ret =3D -EBUSY; + goto unlock; + } + if (dev->gclk_enabled) { clk_disable_unprepare(dev->gclk); dev->gclk_enabled =3D 0; @@ -455,19 +450,24 @@ static int mchp_spdifrx_hw_params(struct snd_pcm_subs= tream *substream, dev_err(dev->dev, "unable to set gclk min rate: rate %u * ratio %u + 1\n", params_rate(params), SPDIFRX_GCLK_RATIO_MIN); - return ret; + goto unlock; } ret =3D clk_prepare_enable(dev->gclk); if (ret) { dev_err(dev->dev, "unable to enable gclk: %d\n", ret); - return ret; + goto unlock; } dev->gclk_enabled =3D 1; =20 dev_dbg(dev->dev, "GCLK range min set to %d\n", params_rate(params) * SPDIFRX_GCLK_RATIO_MIN + 1); =20 - return regmap_write(dev->regmap, SPDIFRX_MR, mr); + ret =3D regmap_write(dev->regmap, SPDIFRX_MR, mr); + +unlock: + mutex_unlock(&dev->mlock); + + return ret; } =20 static int mchp_spdifrx_hw_free(struct snd_pcm_substream *substream, @@ -475,10 +475,12 @@ static int mchp_spdifrx_hw_free(struct snd_pcm_substr= eam *substream, { struct mchp_spdifrx_dev *dev =3D snd_soc_dai_get_drvdata(dai); =20 + mutex_lock(&dev->mlock); if (dev->gclk_enabled) { clk_disable_unprepare(dev->gclk); dev->gclk_enabled =3D 0; } + mutex_unlock(&dev->mlock); return 0; } =20 @@ -627,10 +629,24 @@ static int mchp_spdifrx_ulock_get(struct snd_kcontrol= *kcontrol, u32 val; bool ulock_old =3D ctrl->ulock; =20 - regmap_read(dev->regmap, SPDIFRX_RSR, &val); - ctrl->ulock =3D !(val & SPDIFRX_RSR_ULOCK); + mutex_lock(&dev->mlock); + + /* + * The RSR.ULOCK has wrong value if both pclk and gclk are enabled + * and the receiver is disabled. Thus we take into account the + * dev->trigger_enabled here to return a real status. + */ + if (dev->trigger_enabled) { + regmap_read(dev->regmap, SPDIFRX_RSR, &val); + ctrl->ulock =3D !(val & SPDIFRX_RSR_ULOCK); + } else { + ctrl->ulock =3D 0; + } + uvalue->value.integer.value[0] =3D ctrl->ulock; =20 + mutex_unlock(&dev->mlock); + return ulock_old !=3D ctrl->ulock; } =20 @@ -643,8 +659,22 @@ static int mchp_spdifrx_badf_get(struct snd_kcontrol *= kcontrol, u32 val; bool badf_old =3D ctrl->badf; =20 - regmap_read(dev->regmap, SPDIFRX_RSR, &val); - ctrl->badf =3D !!(val & SPDIFRX_RSR_BADF); + mutex_lock(&dev->mlock); + + /* + * The RSR.ULOCK has wrong value if both pclk and gclk are enabled + * and the receiver is disabled. Thus we take into account the + * dev->trigger_enabled here to return a real status. + */ + if (dev->trigger_enabled) { + regmap_read(dev->regmap, SPDIFRX_RSR, &val); + ctrl->badf =3D !!(val & SPDIFRX_RSR_BADF); + } else { + ctrl->badf =3D 0; + } + + mutex_unlock(&dev->mlock); + uvalue->value.integer.value[0] =3D ctrl->badf; =20 return badf_old !=3D ctrl->badf; @@ -656,11 +686,48 @@ static int mchp_spdifrx_signal_get(struct snd_kcontro= l *kcontrol, struct snd_soc_dai *dai =3D snd_kcontrol_chip(kcontrol); struct mchp_spdifrx_dev *dev =3D snd_soc_dai_get_drvdata(dai); struct mchp_spdifrx_mixer_control *ctrl =3D &dev->control; - u32 val; + u32 val =3D ~0U, loops =3D 10; + int ret; bool signal_old =3D ctrl->signal; =20 - regmap_read(dev->regmap, SPDIFRX_RSR, &val); - ctrl->signal =3D !(val & SPDIFRX_RSR_NOSIGNAL); + mutex_lock(&dev->mlock); + + /* + * To get the signal we need to have receiver enabled. This + * could be enabled also from trigger() function thus we need to + * take care of not disabling the receiver when it runs. + */ + if (!dev->trigger_enabled) { + ret =3D clk_prepare_enable(dev->gclk); + if (ret) + goto unlock; + + regmap_update_bits(dev->regmap, SPDIFRX_MR, SPDIFRX_MR_RXEN_MASK, + SPDIFRX_MR_RXEN_ENABLE); + + /* Wait for RSR.ULOCK bit. */ + while (--loops) { + regmap_read(dev->regmap, SPDIFRX_RSR, &val); + if (!(val & SPDIFRX_RSR_ULOCK)) + break; + usleep_range(100, 150); + } + + regmap_update_bits(dev->regmap, SPDIFRX_MR, SPDIFRX_MR_RXEN_MASK, + SPDIFRX_MR_RXEN_DISABLE); + + clk_disable_unprepare(dev->gclk); + } else { + regmap_read(dev->regmap, SPDIFRX_RSR, &val); + } + +unlock: + mutex_unlock(&dev->mlock); + + if (!(val & SPDIFRX_RSR_ULOCK)) + ctrl->signal =3D !(val & SPDIFRX_RSR_NOSIGNAL); + else + ctrl->signal =3D 0; uvalue->value.integer.value[0] =3D ctrl->signal; =20 return signal_old !=3D ctrl->signal; @@ -685,18 +752,32 @@ static int mchp_spdifrx_rate_get(struct snd_kcontrol = *kcontrol, u32 val; int rate; =20 - regmap_read(dev->regmap, SPDIFRX_RSR, &val); - - /* if the receiver is not locked, ISF data is invalid */ - if (val & SPDIFRX_RSR_ULOCK || !(val & SPDIFRX_RSR_IFS_MASK)) { + mutex_lock(&dev->mlock); + + /* + * The RSR.ULOCK has wrong value if both pclk and gclk are enabled + * and the receiver is disabled. Thus we take into account the + * dev->trigger_enabled here to return a real status. + */ + if (dev->trigger_enabled) { + regmap_read(dev->regmap, SPDIFRX_RSR, &val); + /* If the receiver is not locked, ISF data is invalid. */ + if (val & SPDIFRX_RSR_ULOCK || !(val & SPDIFRX_RSR_IFS_MASK)) { + ucontrol->value.integer.value[0] =3D 0; + goto unlock; + } + } else { + /* Reveicer is not locked, IFS data is invalid. */ ucontrol->value.integer.value[0] =3D 0; - return 0; + goto unlock; } =20 rate =3D clk_get_rate(dev->gclk); =20 ucontrol->value.integer.value[0] =3D rate / (32 * SPDIFRX_RSR_IFS(val)); =20 +unlock: + mutex_unlock(&dev->mlock); return 0; } =20 @@ -913,7 +994,18 @@ static int mchp_spdifrx_probe(struct platform_device *= pdev) "failed to get the PMC generated clock: %d\n", err); return err; } + + /* + * Signal control need a valid rate on gclk. hw_params() configures + * it propertly but requesting signal before any hw_params() has been + * called lead to invalid value returned for signal. Thus, configure + * gclk at a valid rate, here, in initialization, to simplify the + * control path. + */ + clk_set_min_rate(dev->gclk, 48000 * SPDIFRX_GCLK_RATIO_MIN + 1); + spin_lock_init(&dev->blockend_lock); + mutex_init(&dev->mlock); =20 dev->dev =3D &pdev->dev; dev->regmap =3D regmap; --=20 2.34.1 From nobody Sat Sep 13 20:35:33 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5FCB9C54EED for ; Mon, 30 Jan 2023 12:09:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236778AbjA3MJB (ORCPT ); Mon, 30 Jan 2023 07:09:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38260 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236575AbjA3MIj (ORCPT ); Mon, 30 Jan 2023 07:08:39 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0DF45144BB for ; Mon, 30 Jan 2023 04:08:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1675080502; x=1706616502; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rU46NQL4hbbHQR9L/65OOymuaCyWdxogbhBIy2BOVDA=; b=y/hWzs5rMZn4+IrioSraFV5eIIYWvjtL4lEnHYRnoTIqvaN3ArCok0Qo m/DtO+H53EcitMw7+qaNRXkdVjap/MX+bCgkMQlp73QwpuDkPHhnKPJAu /lQQc4IGaF73kF7+ih1Dz550vp9fLUQYxj1yxSXnOwIYbe/Vcu5sHT7um di1FFaKIp6QAWnY8n18ZQiHhHYkW+rbE1UgXIWZh5A1YLYX6HFq1fHqWh +t8cvnTEu6Y0aFq5h6VrG/KK39Z7vxMfYIXh9AhnEdmGpZZIwvsPNbBb5 P199oYv7rMteoBXl8k9VSSYmWDp8TjroUBJVDMtNMLvloiWpE9xqGApf4 Q==; X-IronPort-AV: E=Sophos;i="5.97,257,1669100400"; d="scan'208";a="197975239" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 30 Jan 2023 05:07:28 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Mon, 30 Jan 2023 05:07:28 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Mon, 30 Jan 2023 05:07:24 -0700 From: Claudiu Beznea To: , , , , , CC: , , , Claudiu Beznea Subject: [PATCH 2/8] ASoC: mchp-spdifrx: fix return value in case completion times out Date: Mon, 30 Jan 2023 14:06:41 +0200 Message-ID: <20230130120647.638049-3-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230130120647.638049-1-claudiu.beznea@microchip.com> References: <20230130120647.638049-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" wait_for_completion_interruptible_timeout() returns 0 in case of timeout. Check this into account when returning from function. Fixes: ef265c55c1ac ("ASoC: mchp-spdifrx: add driver for SPDIF RX") Signed-off-by: Claudiu Beznea --- sound/soc/atmel/mchp-spdifrx.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/sound/soc/atmel/mchp-spdifrx.c b/sound/soc/atmel/mchp-spdifrx.c index 2d86e0ec930f..7f359371b31b 100644 --- a/sound/soc/atmel/mchp-spdifrx.c +++ b/sound/soc/atmel/mchp-spdifrx.c @@ -524,9 +524,10 @@ static int mchp_spdifrx_cs_get(struct mchp_spdifrx_dev= *dev, ret =3D wait_for_completion_interruptible_timeout(&ch_stat->done, msecs_to_jiffies(100)); /* IP might not be started or valid stream might not be present */ - if (ret < 0) { + if (ret <=3D 0) { dev_dbg(dev->dev, "channel status for channel %d timeout\n", channel); + return ret ? : -ETIMEDOUT; } =20 memcpy(uvalue->value.iec958.status, ch_stat->data, @@ -580,7 +581,7 @@ static int mchp_spdifrx_subcode_ch_get(struct mchp_spdi= frx_dev *dev, dev_dbg(dev->dev, "user data for channel %d timeout\n", channel); mchp_spdifrx_isr_blockend_dis(dev); - return ret; + return ret ? : -ETIMEDOUT; } =20 spin_lock_irqsave(&user_data->lock, flags); --=20 2.34.1 From nobody Sat Sep 13 20:35:33 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2BEE6C54EAA for ; Mon, 30 Jan 2023 12:09:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235852AbjA3MJL (ORCPT ); Mon, 30 Jan 2023 07:09:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38270 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236730AbjA3MIl (ORCPT ); Mon, 30 Jan 2023 07:08:41 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7F03F28870 for ; Mon, 30 Jan 2023 04:08:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1675080503; x=1706616503; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zxwq9uIaU8bzolvs0Ucl4pALHPjSjFBI0eSgfnpCcZo=; b=o4wR+gGYVg/MCUW+ojEwx/+Tq6I8RN/TDeae0B0jgAwaPsOGjgkqDxvr IUvbeYr4MFVliLBnB35DgdYVOYi1tpp29fiupNns2JLLLK1MdEohKljps ZddWnzQ0cCQOdvsx/Lw5RCAqkzGWRHo70SrApTgY9G8aYV2fOBfL2Wjys MO1ysFwFLNoIFZvYDnnrvZmXoiuQwMkds8TvqMnsnm4FM2FOPBwrQAkw5 KWJY9otjQJRB/uiOB1McDI8PbYYdaH9OokyZiA817+K+GafF6/ClXNnpA mCzCGuGNXb+pqlUb15odSQ4zqQxRLOzECl9pDFCUSZdJDSyt+slo0niAA A==; X-IronPort-AV: E=Sophos;i="5.97,257,1669100400"; d="scan'208";a="134605293" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 30 Jan 2023 05:07:34 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Mon, 30 Jan 2023 05:07:32 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Mon, 30 Jan 2023 05:07:28 -0700 From: Claudiu Beznea To: , , , , , CC: , , , Claudiu Beznea Subject: [PATCH 3/8] ASoC: mchp-spdifrx: fix controls that works with completion mechanism Date: Mon, 30 Jan 2023 14:06:42 +0200 Message-ID: <20230130120647.638049-4-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230130120647.638049-1-claudiu.beznea@microchip.com> References: <20230130120647.638049-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Channel status get and channel subcode get controls relies on data returned by controls when certain IRQs are raised. To achieve that completions are used b/w controls and interrupt service routine. The concurrent accesses to these controls are protected by struct snd_card::controls_rwsem. Issues identified: - reinit_completion() may be called while waiting for completion which should be avoided - in case of multiple threads waiting, the complete() call in interrupt will signal only one waiting thread per interrupt which may lead to timeout for the others - in case of channel status get as the CSC interrupt is not refcounted ISR may disable interrupt for threads that were just enabled it. To solve these the access to controls were protected by a mutex. Along with this there is no need for spinlock to protect the software cache reads/updates b/w controls and ISR as the update is happening only when requested from control, and only one reader can reach the control. Fixes: ef265c55c1ac ("ASoC: mchp-spdifrx: add driver for SPDIF RX") Signed-off-by: Claudiu Beznea --- sound/soc/atmel/mchp-spdifrx.c | 143 ++++++++++++++++++--------------- 1 file changed, 77 insertions(+), 66 deletions(-) diff --git a/sound/soc/atmel/mchp-spdifrx.c b/sound/soc/atmel/mchp-spdifrx.c index 7f359371b31b..31ffaaf46dec 100644 --- a/sound/soc/atmel/mchp-spdifrx.c +++ b/sound/soc/atmel/mchp-spdifrx.c @@ -217,7 +217,6 @@ struct mchp_spdifrx_ch_stat { struct mchp_spdifrx_user_data { unsigned char data[SPDIFRX_UD_BITS / 8]; struct completion done; - spinlock_t lock; /* protect access to user data */ }; =20 struct mchp_spdifrx_mixer_control { @@ -231,8 +230,6 @@ struct mchp_spdifrx_mixer_control { struct mchp_spdifrx_dev { struct snd_dmaengine_dai_dma_data capture; struct mchp_spdifrx_mixer_control control; - spinlock_t blockend_lock; /* protect access to blockend_refcount */ - int blockend_refcount; struct mutex mlock; struct device *dev; struct regmap *regmap; @@ -277,37 +274,11 @@ static void mchp_spdifrx_channel_user_data_read(struc= t mchp_spdifrx_dev *dev, } } =20 -/* called from non-atomic context only */ -static void mchp_spdifrx_isr_blockend_en(struct mchp_spdifrx_dev *dev) -{ - unsigned long flags; - - spin_lock_irqsave(&dev->blockend_lock, flags); - dev->blockend_refcount++; - /* don't enable BLOCKEND interrupt if it's already enabled */ - if (dev->blockend_refcount =3D=3D 1) - regmap_write(dev->regmap, SPDIFRX_IER, SPDIFRX_IR_BLOCKEND); - spin_unlock_irqrestore(&dev->blockend_lock, flags); -} - -/* called from atomic/non-atomic context */ -static void mchp_spdifrx_isr_blockend_dis(struct mchp_spdifrx_dev *dev) -{ - unsigned long flags; - - spin_lock_irqsave(&dev->blockend_lock, flags); - dev->blockend_refcount--; - /* don't enable BLOCKEND interrupt if it's already enabled */ - if (dev->blockend_refcount =3D=3D 0) - regmap_write(dev->regmap, SPDIFRX_IDR, SPDIFRX_IR_BLOCKEND); - spin_unlock_irqrestore(&dev->blockend_lock, flags); -} - static irqreturn_t mchp_spdif_interrupt(int irq, void *dev_id) { struct mchp_spdifrx_dev *dev =3D dev_id; struct mchp_spdifrx_mixer_control *ctrl =3D &dev->control; - u32 sr, imr, pending, idr =3D 0; + u32 sr, imr, pending; irqreturn_t ret =3D IRQ_NONE; int ch; =20 @@ -322,13 +293,10 @@ static irqreturn_t mchp_spdif_interrupt(int irq, void= *dev_id) =20 if (pending & SPDIFRX_IR_BLOCKEND) { for (ch =3D 0; ch < SPDIFRX_CHANNELS; ch++) { - spin_lock(&ctrl->user_data[ch].lock); mchp_spdifrx_channel_user_data_read(dev, ch); - spin_unlock(&ctrl->user_data[ch].lock); - complete(&ctrl->user_data[ch].done); } - mchp_spdifrx_isr_blockend_dis(dev); + regmap_write(dev->regmap, SPDIFRX_IDR, SPDIFRX_IR_BLOCKEND); ret =3D IRQ_HANDLED; } =20 @@ -336,7 +304,7 @@ static irqreturn_t mchp_spdif_interrupt(int irq, void *= dev_id) if (pending & SPDIFRX_IR_CSC(ch)) { mchp_spdifrx_channel_status_read(dev, ch); complete(&ctrl->ch_stat[ch].done); - idr |=3D SPDIFRX_IR_CSC(ch); + regmap_write(dev->regmap, SPDIFRX_IDR, SPDIFRX_IR_CSC(ch)); ret =3D IRQ_HANDLED; } } @@ -346,8 +314,6 @@ static irqreturn_t mchp_spdif_interrupt(int irq, void *= dev_id) ret =3D IRQ_HANDLED; } =20 - regmap_write(dev->regmap, SPDIFRX_IDR, idr); - return ret; } =20 @@ -517,23 +483,51 @@ static int mchp_spdifrx_cs_get(struct mchp_spdifrx_de= v *dev, { struct mchp_spdifrx_mixer_control *ctrl =3D &dev->control; struct mchp_spdifrx_ch_stat *ch_stat =3D &ctrl->ch_stat[channel]; - int ret; + int ret =3D 0; + + mutex_lock(&dev->mlock); =20 - regmap_write(dev->regmap, SPDIFRX_IER, SPDIFRX_IR_CSC(channel)); - /* check for new data available */ - ret =3D wait_for_completion_interruptible_timeout(&ch_stat->done, - msecs_to_jiffies(100)); - /* IP might not be started or valid stream might not be present */ - if (ret <=3D 0) { - dev_dbg(dev->dev, "channel status for channel %d timeout\n", - channel); - return ret ? : -ETIMEDOUT; + /* + * We may reach this point with both clocks enabled but the receiver + * still disabled. To void waiting for completion and return with + * timeout check the dev->trigger_enabled. + * + * To retrieve data: + * - if the receiver is enabled CSC IRQ will update the data in software + * caches (ch_stat->data) + * - otherwise we just update it here the software caches with latest + * available information and return it; in this case we don't need + * spin locking as the IRQ is disabled and will not be raised from + * anywhere else. + */ + + if (dev->trigger_enabled) { + reinit_completion(&ch_stat->done); + regmap_write(dev->regmap, SPDIFRX_IER, SPDIFRX_IR_CSC(channel)); + /* Check for new data available */ + ret =3D wait_for_completion_interruptible_timeout(&ch_stat->done, + msecs_to_jiffies(100)); + /* Valid stream might not be present */ + if (ret <=3D 0) { + dev_dbg(dev->dev, "channel status for channel %d timeout\n", + channel); + regmap_write(dev->regmap, SPDIFRX_IDR, SPDIFRX_IR_CSC(channel)); + ret =3D ret ? : -ETIMEDOUT; + goto unlock; + } else { + ret =3D 0; + } + } else { + /* Update software cache with latest channel status. */ + mchp_spdifrx_channel_status_read(dev, channel); } =20 memcpy(uvalue->value.iec958.status, ch_stat->data, sizeof(ch_stat->data)); =20 - return 0; +unlock: + mutex_unlock(&dev->mlock); + return ret; } =20 static int mchp_spdifrx_cs1_get(struct snd_kcontrol *kcontrol, @@ -567,29 +561,49 @@ static int mchp_spdifrx_subcode_ch_get(struct mchp_sp= difrx_dev *dev, int channel, struct snd_ctl_elem_value *uvalue) { - unsigned long flags; struct mchp_spdifrx_mixer_control *ctrl =3D &dev->control; struct mchp_spdifrx_user_data *user_data =3D &ctrl->user_data[channel]; - int ret; + int ret =3D 0; + + mutex_lock(&dev->mlock); + + /* + * We may reach this point with both clocks enabled but the receiver + * still disabled. To void waiting for completion to just timeout we + * check here the dev->trigger_enabled flag. + * + * To retrieve data: + * - if the receiver is enabled we need to wait for blockend IRQ to read + * data to and update it for us in software caches + * - otherwise reading the SPDIFRX_CHUD() registers is enough. + */ =20 - reinit_completion(&user_data->done); - mchp_spdifrx_isr_blockend_en(dev); - ret =3D wait_for_completion_interruptible_timeout(&user_data->done, - msecs_to_jiffies(100)); - /* IP might not be started or valid stream might not be present */ - if (ret <=3D 0) { - dev_dbg(dev->dev, "user data for channel %d timeout\n", - channel); - mchp_spdifrx_isr_blockend_dis(dev); - return ret ? : -ETIMEDOUT; + if (dev->trigger_enabled) { + reinit_completion(&user_data->done); + regmap_write(dev->regmap, SPDIFRX_IER, SPDIFRX_IR_BLOCKEND); + ret =3D wait_for_completion_interruptible_timeout(&user_data->done, + msecs_to_jiffies(100)); + /* Valid stream might not be present. */ + if (ret <=3D 0) { + dev_dbg(dev->dev, "user data for channel %d timeout\n", + channel); + regmap_write(dev->regmap, SPDIFRX_IDR, SPDIFRX_IR_BLOCKEND); + ret =3D ret ? : -ETIMEDOUT; + goto unlock; + } else { + ret =3D 0; + } + } else { + /* Update software cache with last available data. */ + mchp_spdifrx_channel_user_data_read(dev, channel); } =20 - spin_lock_irqsave(&user_data->lock, flags); memcpy(uvalue->value.iec958.subcode, user_data->data, sizeof(user_data->data)); - spin_unlock_irqrestore(&user_data->lock, flags); =20 - return 0; +unlock: + mutex_unlock(&dev->mlock); + return ret; } =20 static int mchp_spdifrx_subcode_ch1_get(struct snd_kcontrol *kcontrol, @@ -890,11 +904,9 @@ static int mchp_spdifrx_dai_probe(struct snd_soc_dai *= dai) SPDIFRX_MR_AUTORST_NOACTION | SPDIFRX_MR_PACK_DISABLED); =20 - dev->blockend_refcount =3D 0; for (ch =3D 0; ch < SPDIFRX_CHANNELS; ch++) { init_completion(&ctrl->ch_stat[ch].done); init_completion(&ctrl->user_data[ch].done); - spin_lock_init(&ctrl->user_data[ch].lock); } =20 /* Add controls */ @@ -1005,7 +1017,6 @@ static int mchp_spdifrx_probe(struct platform_device = *pdev) */ clk_set_min_rate(dev->gclk, 48000 * SPDIFRX_GCLK_RATIO_MIN + 1); =20 - spin_lock_init(&dev->blockend_lock); mutex_init(&dev->mlock); =20 dev->dev =3D &pdev->dev; --=20 2.34.1 From nobody Sat Sep 13 20:35:33 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CFEFBC54EED for ; Mon, 30 Jan 2023 12:09:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236748AbjA3MJO (ORCPT ); Mon, 30 Jan 2023 07:09:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39024 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236686AbjA3MIp (ORCPT ); Mon, 30 Jan 2023 07:08:45 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6BB13302A0 for ; Mon, 30 Jan 2023 04:08:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1675080508; x=1706616508; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=9NjD6iisgsn/UZGyyRXU8RZMqU7SjVu8tXkA5Lp5KWk=; b=aYvndXj53zST0QXHhERCgubM5JiNridtBCOZ4ep0ecnpp4kBShfM2OaP 5qrkWiuGOukHnJ3K0nqajYeGP5kHSL8Z3SArgLsGvuSPreEIT4zkTJbU2 mhLlq90bULjRjBT7NSp5Rc0bU/33RmPUVxvI5vBCkySBkiqwMzo5v7r8J N9yl3P8lvLKCpHrl0zdV5w1RsjxWzIEejVONY52lDptl59CkoOwbz89UB 3ljgQyvAR4M+/mvAgS80/XfKBGG+ttfD1o8iw8tUAU4gYRYO4EPoVdsAu XI4Ad7IPca4CJuTzynMhH1QabREDj1QM4GKHVh2YgLuDuJtBDxcO6Gl9J w==; X-IronPort-AV: E=Sophos;i="5.97,257,1669100400"; d="scan'208";a="194432967" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 30 Jan 2023 05:07:37 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Mon, 30 Jan 2023 05:07:36 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Mon, 30 Jan 2023 05:07:33 -0700 From: Claudiu Beznea To: , , , , , CC: , , , Claudiu Beznea Subject: [PATCH 4/8] ASoC: mchp-spdifrx: disable all interrupts in mchp_spdifrx_dai_remove() Date: Mon, 30 Jan 2023 14:06:43 +0200 Message-ID: <20230130120647.638049-5-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230130120647.638049-1-claudiu.beznea@microchip.com> References: <20230130120647.638049-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" CSC interrupts which might be used in controls are on bits 8 and 9 of SPDIFRX_IDR register. Thus disable all the interrupts that are exported by driver. Fixes: ef265c55c1ac ("ASoC: mchp-spdifrx: add driver for SPDIF RX") Signed-off-by: Claudiu Beznea --- sound/soc/atmel/mchp-spdifrx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/atmel/mchp-spdifrx.c b/sound/soc/atmel/mchp-spdifrx.c index 31ffaaf46dec..b81fc77728df 100644 --- a/sound/soc/atmel/mchp-spdifrx.c +++ b/sound/soc/atmel/mchp-spdifrx.c @@ -921,7 +921,7 @@ static int mchp_spdifrx_dai_remove(struct snd_soc_dai *= dai) struct mchp_spdifrx_dev *dev =3D snd_soc_dai_get_drvdata(dai); =20 /* Disable interrupts */ - regmap_write(dev->regmap, SPDIFRX_IDR, 0xFF); + regmap_write(dev->regmap, SPDIFRX_IDR, GENMASK(14, 0)); =20 clk_disable_unprepare(dev->pclk); =20 --=20 2.34.1 From nobody Sat Sep 13 20:35:33 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE20FC54EED for ; Mon, 30 Jan 2023 12:09:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235265AbjA3MJk (ORCPT ); Mon, 30 Jan 2023 07:09:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37952 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236744AbjA3MJC (ORCPT ); Mon, 30 Jan 2023 07:09:02 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1080A2C66B for ; Mon, 30 Jan 2023 04:08:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1675080521; x=1706616521; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=/R4wdD0tMsQRvAushbS1DLuKP51g2Gci5WtqH3y3808=; b=aS2gFpM0+OTP52azlkK3satyH4GHDTMAdpkGsJPGLEXx0G6321Lx9QRD 2d/0I5HQOxb3qDIuingRxkX6apPL+3VT+niqFylGxBHZ9aJe+w15zLkkH kRJxZ2vkNNbNgRzyjeU0g+Rxa1hVFyhE3J4hSlc45Adn+SPk8It1Cv/lg 1Hin/3eKj5vjFsV7vcQRqA+eEZvkSeqXfHdmz5r3Ss9DLoHJH8W868+ns MbdtgfmLvOAr0jM0U2N350psiURnthqWjVP9U/kK5+/Kj3cKAK71gjYda kmhPYM9ubG8CgmZ35SxycGa2l7Vg0aJSHX2G+qPC1YG/6KhM95xQiHKk1 Q==; X-IronPort-AV: E=Sophos;i="5.97,257,1669100400"; d="scan'208";a="134605326" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 30 Jan 2023 05:07:52 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Mon, 30 Jan 2023 05:07:41 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Mon, 30 Jan 2023 05:07:37 -0700 From: Claudiu Beznea To: , , , , , CC: , , , Claudiu Beznea Subject: [PATCH 5/8] ASoC: mchp-spdifrx: use unsigned long to store clk_get_rate() value Date: Mon, 30 Jan 2023 14:06:44 +0200 Message-ID: <20230130120647.638049-6-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230130120647.638049-1-claudiu.beznea@microchip.com> References: <20230130120647.638049-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" clk_get_rate() returns an unsigned long. Use a variable of type unsigned long to store it. Signed-off-by: Claudiu Beznea --- sound/soc/atmel/mchp-spdifrx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/atmel/mchp-spdifrx.c b/sound/soc/atmel/mchp-spdifrx.c index b81fc77728df..90b2fb3a9844 100644 --- a/sound/soc/atmel/mchp-spdifrx.c +++ b/sound/soc/atmel/mchp-spdifrx.c @@ -764,8 +764,8 @@ static int mchp_spdifrx_rate_get(struct snd_kcontrol *k= control, { struct snd_soc_dai *dai =3D snd_kcontrol_chip(kcontrol); struct mchp_spdifrx_dev *dev =3D snd_soc_dai_get_drvdata(dai); + unsigned long rate; u32 val; - int rate; =20 mutex_lock(&dev->mlock); =20 --=20 2.34.1 From nobody Sat Sep 13 20:35:33 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80A0DC54EED for ; Mon, 30 Jan 2023 12:10:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236438AbjA3MKL (ORCPT ); Mon, 30 Jan 2023 07:10:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38200 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236745AbjA3MJi (ORCPT ); Mon, 30 Jan 2023 07:09:38 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 352CF3754C for ; Mon, 30 Jan 2023 04:08:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1675080537; x=1706616537; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wy5L39BFMKrQQvzhCUrefjNpUTQMmUcvw5a7H2/NVdQ=; b=x909uhqiKqPic92b2feI3vmeHZ/dNUsrcyjJ67kzf4wW2aFFkr/Yf+D9 agmmeRCN88sBt6PWWkCgbKYuDtM+RCFTLEVClY6pPNOW8UR4QoVwCfD4n /XxFVeM26beKSfrKXboKvPPzRkiHeiEY1kH1Z1gtzWDwLuEUuJg+uCmXt EH/jQoCmPWq/LsQXtE+WHw9yP1qSUDAhw79rSGdFM7SDzN2wT8x7s+Mba IdqKo14XFfGdSetcAeMbIuCKaKotzoGJb3LzX6q/DXXAThNwzg31lKTcf oVCciVWgXzj/tXtMo0+VnWK73cWM+sPoH818yIEtoJo3XWRpRGO053EZW g==; X-IronPort-AV: E=Sophos;i="5.97,257,1669100400"; d="scan'208";a="134605337" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 30 Jan 2023 05:07:53 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Mon, 30 Jan 2023 05:07:45 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Mon, 30 Jan 2023 05:07:41 -0700 From: Claudiu Beznea To: , , , , , CC: , , , Claudiu Beznea Subject: [PATCH 6/8] ASoC: mchp-spdifrx: remove struct mchp_spdifrx_dev::fmt member Date: Mon, 30 Jan 2023 14:06:45 +0200 Message-ID: <20230130120647.638049-7-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230130120647.638049-1-claudiu.beznea@microchip.com> References: <20230130120647.638049-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Remove member fmt of struct mchp_spdifrx_dev as it is not used anywhere. Signed-off-by: Claudiu Beznea --- sound/soc/atmel/mchp-spdifrx.c | 1 - 1 file changed, 1 deletion(-) diff --git a/sound/soc/atmel/mchp-spdifrx.c b/sound/soc/atmel/mchp-spdifrx.c index 90b2fb3a9844..46fff31321f3 100644 --- a/sound/soc/atmel/mchp-spdifrx.c +++ b/sound/soc/atmel/mchp-spdifrx.c @@ -235,7 +235,6 @@ struct mchp_spdifrx_dev { struct regmap *regmap; struct clk *pclk; struct clk *gclk; - unsigned int fmt; unsigned int trigger_enabled; unsigned int gclk_enabled:1; }; --=20 2.34.1 From nobody Sat Sep 13 20:35:33 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AADAFC54EAA for ; Mon, 30 Jan 2023 12:10:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236365AbjA3MKO (ORCPT ); Mon, 30 Jan 2023 07:10:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38496 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236327AbjA3MJk (ORCPT ); Mon, 30 Jan 2023 07:09:40 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 196D710ABF for ; Mon, 30 Jan 2023 04:09:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1675080540; x=1706616540; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=c3S3eY9RQtpuSlzP+O7igbYJtQsWXUsgyYbzOFDO/FQ=; b=t1p5Q3nX2xJdNFTPbSAmnMIRMxixvDg7ihMFqzC7p55j/opyaKzPnTFb iZg4gDFvmOyy00SK6+u8XCfznhAo0yO5+nF4ZKUkeg3dKl/s0y7+B0oeP qRCQpWJe2ZwfKS/LJnTdwdb2pC0jfDYejOoJucFIsaC2OAYfRpV7LA9wq 3z2d+AxEZbdb1lwv9Ac30JWghiZ1owDqtDwO2gEf2F2+QU3WHy9lMLig7 KpRyXna7KQqDZJQ95yS25OVNb86i4kdDI6dTt2mnnRcRzQvUHZ2pb4TLe h/u0EUumYqbnobB+WfRpDkXHiKT8Q+yEL63u/58D63373k5YbFXCK8QX3 Q==; X-IronPort-AV: E=Sophos;i="5.97,257,1669100400"; d="scan'208";a="134605344" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 30 Jan 2023 05:07:54 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Mon, 30 Jan 2023 05:07:48 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Mon, 30 Jan 2023 05:07:45 -0700 From: Claudiu Beznea To: , , , , , CC: , , , Claudiu Beznea Subject: [PATCH 7/8] ASoC: mchp-spdifrx: add runtime pm support Date: Mon, 30 Jan 2023 14:06:46 +0200 Message-ID: <20230130120647.638049-8-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230130120647.638049-1-claudiu.beznea@microchip.com> References: <20230130120647.638049-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add runtime PM support for Microchip SPDIFRX driver. On runtime suspend the clocks are disabled and regmap is set in caching mode. On runtime resume the clocks are enabled and regmap is synced with the device. Signed-off-by: Claudiu Beznea --- sound/soc/atmel/mchp-spdifrx.c | 210 ++++++++++++++++++++++++++------- 1 file changed, 166 insertions(+), 44 deletions(-) diff --git a/sound/soc/atmel/mchp-spdifrx.c b/sound/soc/atmel/mchp-spdifrx.c index 46fff31321f3..796d4ec2b2b1 100644 --- a/sound/soc/atmel/mchp-spdifrx.c +++ b/sound/soc/atmel/mchp-spdifrx.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include =20 @@ -192,6 +193,43 @@ static bool mchp_spdifrx_precious_reg(struct device *d= ev, unsigned int reg) } } =20 +static bool mchp_spdifrx_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case SPDIFRX_IMR: + case SPDIFRX_ISR: + case SPDIFRX_RSR: + case SPDIFRX_CHSR(0, 0): + case SPDIFRX_CHSR(0, 1): + case SPDIFRX_CHSR(0, 2): + case SPDIFRX_CHSR(0, 3): + case SPDIFRX_CHSR(0, 4): + case SPDIFRX_CHSR(0, 5): + case SPDIFRX_CHUD(0, 0): + case SPDIFRX_CHUD(0, 1): + case SPDIFRX_CHUD(0, 2): + case SPDIFRX_CHUD(0, 3): + case SPDIFRX_CHUD(0, 4): + case SPDIFRX_CHUD(0, 5): + case SPDIFRX_CHSR(1, 0): + case SPDIFRX_CHSR(1, 1): + case SPDIFRX_CHSR(1, 2): + case SPDIFRX_CHSR(1, 3): + case SPDIFRX_CHSR(1, 4): + case SPDIFRX_CHSR(1, 5): + case SPDIFRX_CHUD(1, 0): + case SPDIFRX_CHUD(1, 1): + case SPDIFRX_CHUD(1, 2): + case SPDIFRX_CHUD(1, 3): + case SPDIFRX_CHUD(1, 4): + case SPDIFRX_CHUD(1, 5): + case SPDIFRX_VERSION: + return true; + default: + return false; + } +} + static const struct regmap_config mchp_spdifrx_regmap_config =3D { .reg_bits =3D 32, .reg_stride =3D 4, @@ -200,6 +238,8 @@ static const struct regmap_config mchp_spdifrx_regmap_c= onfig =3D { .readable_reg =3D mchp_spdifrx_readable_reg, .writeable_reg =3D mchp_spdifrx_writeable_reg, .precious_reg =3D mchp_spdifrx_precious_reg, + .volatile_reg =3D mchp_spdifrx_volatile_reg, + .cache_type =3D REGCACHE_FLAT, }; =20 #define SPDIFRX_GCLK_RATIO_MIN (12 * 64) @@ -236,7 +276,6 @@ struct mchp_spdifrx_dev { struct clk *pclk; struct clk *gclk; unsigned int trigger_enabled; - unsigned int gclk_enabled:1; }; =20 static void mchp_spdifrx_channel_status_read(struct mchp_spdifrx_dev *dev, @@ -405,16 +444,17 @@ static int mchp_spdifrx_hw_params(struct snd_pcm_subs= tream *substream, goto unlock; } =20 - if (dev->gclk_enabled) { - clk_disable_unprepare(dev->gclk); - dev->gclk_enabled =3D 0; - } + /* GCLK is enabled by runtime PM. */ + clk_disable_unprepare(dev->gclk); + ret =3D clk_set_min_rate(dev->gclk, params_rate(params) * SPDIFRX_GCLK_RATIO_MIN + 1); if (ret) { dev_err(dev->dev, "unable to set gclk min rate: rate %u * ratio %u + 1\n", params_rate(params), SPDIFRX_GCLK_RATIO_MIN); + /* Restore runtime PM state. */ + clk_prepare_enable(dev->gclk); goto unlock; } ret =3D clk_prepare_enable(dev->gclk); @@ -422,7 +462,6 @@ static int mchp_spdifrx_hw_params(struct snd_pcm_substr= eam *substream, dev_err(dev->dev, "unable to enable gclk: %d\n", ret); goto unlock; } - dev->gclk_enabled =3D 1; =20 dev_dbg(dev->dev, "GCLK range min set to %d\n", params_rate(params) * SPDIFRX_GCLK_RATIO_MIN + 1); @@ -435,24 +474,9 @@ static int mchp_spdifrx_hw_params(struct snd_pcm_subst= ream *substream, return ret; } =20 -static int mchp_spdifrx_hw_free(struct snd_pcm_substream *substream, - struct snd_soc_dai *dai) -{ - struct mchp_spdifrx_dev *dev =3D snd_soc_dai_get_drvdata(dai); - - mutex_lock(&dev->mlock); - if (dev->gclk_enabled) { - clk_disable_unprepare(dev->gclk); - dev->gclk_enabled =3D 0; - } - mutex_unlock(&dev->mlock); - return 0; -} - static const struct snd_soc_dai_ops mchp_spdifrx_dai_ops =3D { .trigger =3D mchp_spdifrx_trigger, .hw_params =3D mchp_spdifrx_hw_params, - .hw_free =3D mchp_spdifrx_hw_free, }; =20 #define MCHP_SPDIF_RATES SNDRV_PCM_RATE_8000_192000 @@ -486,6 +510,10 @@ static int mchp_spdifrx_cs_get(struct mchp_spdifrx_dev= *dev, =20 mutex_lock(&dev->mlock); =20 + ret =3D pm_runtime_resume_and_get(dev->dev); + if (ret < 0) + goto unlock; + /* * We may reach this point with both clocks enabled but the receiver * still disabled. To void waiting for completion and return with @@ -512,7 +540,7 @@ static int mchp_spdifrx_cs_get(struct mchp_spdifrx_dev = *dev, channel); regmap_write(dev->regmap, SPDIFRX_IDR, SPDIFRX_IR_CSC(channel)); ret =3D ret ? : -ETIMEDOUT; - goto unlock; + goto pm_runtime_put; } else { ret =3D 0; } @@ -524,6 +552,9 @@ static int mchp_spdifrx_cs_get(struct mchp_spdifrx_dev = *dev, memcpy(uvalue->value.iec958.status, ch_stat->data, sizeof(ch_stat->data)); =20 +pm_runtime_put: + pm_runtime_mark_last_busy(dev->dev); + pm_runtime_put_autosuspend(dev->dev); unlock: mutex_unlock(&dev->mlock); return ret; @@ -566,6 +597,10 @@ static int mchp_spdifrx_subcode_ch_get(struct mchp_spd= ifrx_dev *dev, =20 mutex_lock(&dev->mlock); =20 + ret =3D pm_runtime_resume_and_get(dev->dev); + if (ret < 0) + goto unlock; + /* * We may reach this point with both clocks enabled but the receiver * still disabled. To void waiting for completion to just timeout we @@ -588,7 +623,7 @@ static int mchp_spdifrx_subcode_ch_get(struct mchp_spdi= frx_dev *dev, channel); regmap_write(dev->regmap, SPDIFRX_IDR, SPDIFRX_IR_BLOCKEND); ret =3D ret ? : -ETIMEDOUT; - goto unlock; + goto pm_runtime_put; } else { ret =3D 0; } @@ -600,6 +635,9 @@ static int mchp_spdifrx_subcode_ch_get(struct mchp_spdi= frx_dev *dev, memcpy(uvalue->value.iec958.subcode, user_data->data, sizeof(user_data->data)); =20 +pm_runtime_put: + pm_runtime_mark_last_busy(dev->dev); + pm_runtime_put_autosuspend(dev->dev); unlock: mutex_unlock(&dev->mlock); return ret; @@ -641,10 +679,15 @@ static int mchp_spdifrx_ulock_get(struct snd_kcontrol= *kcontrol, struct mchp_spdifrx_dev *dev =3D snd_soc_dai_get_drvdata(dai); struct mchp_spdifrx_mixer_control *ctrl =3D &dev->control; u32 val; + int ret; bool ulock_old =3D ctrl->ulock; =20 mutex_lock(&dev->mlock); =20 + ret =3D pm_runtime_resume_and_get(dev->dev); + if (ret < 0) + goto unlock; + /* * The RSR.ULOCK has wrong value if both pclk and gclk are enabled * and the receiver is disabled. Thus we take into account the @@ -659,6 +702,9 @@ static int mchp_spdifrx_ulock_get(struct snd_kcontrol *= kcontrol, =20 uvalue->value.integer.value[0] =3D ctrl->ulock; =20 + pm_runtime_mark_last_busy(dev->dev); + pm_runtime_put_autosuspend(dev->dev); +unlock: mutex_unlock(&dev->mlock); =20 return ulock_old !=3D ctrl->ulock; @@ -671,10 +717,15 @@ static int mchp_spdifrx_badf_get(struct snd_kcontrol = *kcontrol, struct mchp_spdifrx_dev *dev =3D snd_soc_dai_get_drvdata(dai); struct mchp_spdifrx_mixer_control *ctrl =3D &dev->control; u32 val; + int ret; bool badf_old =3D ctrl->badf; =20 mutex_lock(&dev->mlock); =20 + ret =3D pm_runtime_resume_and_get(dev->dev); + if (ret < 0) + goto unlock; + /* * The RSR.ULOCK has wrong value if both pclk and gclk are enabled * and the receiver is disabled. Thus we take into account the @@ -687,6 +738,9 @@ static int mchp_spdifrx_badf_get(struct snd_kcontrol *k= control, ctrl->badf =3D 0; } =20 + pm_runtime_mark_last_busy(dev->dev); + pm_runtime_put_autosuspend(dev->dev); +unlock: mutex_unlock(&dev->mlock); =20 uvalue->value.integer.value[0] =3D ctrl->badf; @@ -706,16 +760,16 @@ static int mchp_spdifrx_signal_get(struct snd_kcontro= l *kcontrol, =20 mutex_lock(&dev->mlock); =20 + ret =3D pm_runtime_resume_and_get(dev->dev); + if (ret < 0) + goto unlock; + /* * To get the signal we need to have receiver enabled. This * could be enabled also from trigger() function thus we need to * take care of not disabling the receiver when it runs. */ if (!dev->trigger_enabled) { - ret =3D clk_prepare_enable(dev->gclk); - if (ret) - goto unlock; - regmap_update_bits(dev->regmap, SPDIFRX_MR, SPDIFRX_MR_RXEN_MASK, SPDIFRX_MR_RXEN_ENABLE); =20 @@ -729,12 +783,13 @@ static int mchp_spdifrx_signal_get(struct snd_kcontro= l *kcontrol, =20 regmap_update_bits(dev->regmap, SPDIFRX_MR, SPDIFRX_MR_RXEN_MASK, SPDIFRX_MR_RXEN_DISABLE); - - clk_disable_unprepare(dev->gclk); } else { regmap_read(dev->regmap, SPDIFRX_RSR, &val); } =20 + pm_runtime_mark_last_busy(dev->dev); + pm_runtime_put_autosuspend(dev->dev); + unlock: mutex_unlock(&dev->mlock); =20 @@ -765,9 +820,14 @@ static int mchp_spdifrx_rate_get(struct snd_kcontrol *= kcontrol, struct mchp_spdifrx_dev *dev =3D snd_soc_dai_get_drvdata(dai); unsigned long rate; u32 val; + int ret; =20 mutex_lock(&dev->mlock); =20 + ret =3D pm_runtime_resume_and_get(dev->dev); + if (ret < 0) + goto unlock; + /* * The RSR.ULOCK has wrong value if both pclk and gclk are enabled * and the receiver is disabled. Thus we take into account the @@ -778,21 +838,24 @@ static int mchp_spdifrx_rate_get(struct snd_kcontrol = *kcontrol, /* If the receiver is not locked, ISF data is invalid. */ if (val & SPDIFRX_RSR_ULOCK || !(val & SPDIFRX_RSR_IFS_MASK)) { ucontrol->value.integer.value[0] =3D 0; - goto unlock; + goto pm_runtime_put; } } else { /* Reveicer is not locked, IFS data is invalid. */ ucontrol->value.integer.value[0] =3D 0; - goto unlock; + goto pm_runtime_put; } =20 rate =3D clk_get_rate(dev->gclk); =20 ucontrol->value.integer.value[0] =3D rate / (32 * SPDIFRX_RSR_IFS(val)); =20 +pm_runtime_put: + pm_runtime_mark_last_busy(dev->dev); + pm_runtime_put_autosuspend(dev->dev); unlock: mutex_unlock(&dev->mlock); - return 0; + return ret; } =20 static struct snd_kcontrol_new mchp_spdifrx_ctrls[] =3D { @@ -882,14 +945,6 @@ static int mchp_spdifrx_dai_probe(struct snd_soc_dai *= dai) struct mchp_spdifrx_dev *dev =3D snd_soc_dai_get_drvdata(dai); struct mchp_spdifrx_mixer_control *ctrl =3D &dev->control; int ch; - int err; - - err =3D clk_prepare_enable(dev->pclk); - if (err) { - dev_err(dev->dev, - "failed to enable the peripheral clock: %d\n", err); - return err; - } =20 snd_soc_dai_init_dma_data(dai, NULL, &dev->capture); =20 @@ -922,8 +977,6 @@ static int mchp_spdifrx_dai_remove(struct snd_soc_dai *= dai) /* Disable interrupts */ regmap_write(dev->regmap, SPDIFRX_IDR, GENMASK(14, 0)); =20 - clk_disable_unprepare(dev->pclk); - return 0; } =20 @@ -954,6 +1007,48 @@ static const struct of_device_id mchp_spdifrx_dt_ids[= ] =3D { }; MODULE_DEVICE_TABLE(of, mchp_spdifrx_dt_ids); =20 +static int mchp_spdifrx_runtime_suspend(struct device *dev) +{ + struct mchp_spdifrx_dev *spdifrx =3D dev_get_drvdata(dev); + + regcache_cache_only(spdifrx->regmap, true); + clk_disable_unprepare(spdifrx->gclk); + clk_disable_unprepare(spdifrx->pclk); + + return 0; +} + +static int mchp_spdifrx_runtime_resume(struct device *dev) +{ + struct mchp_spdifrx_dev *spdifrx =3D dev_get_drvdata(dev); + int ret; + + ret =3D clk_prepare_enable(spdifrx->pclk); + if (ret) + return ret; + + ret =3D clk_prepare_enable(spdifrx->gclk); + if (ret) + goto disable_pclk; + + regcache_cache_only(spdifrx->regmap, false); + regcache_mark_dirty(spdifrx->regmap); + ret =3D regcache_sync(spdifrx->regmap); + if (ret) { + regcache_cache_only(spdifrx->regmap, true); + clk_disable_unprepare(spdifrx->gclk); +disable_pclk: + clk_disable_unprepare(spdifrx->pclk); + } + + return ret; +} + +static const struct dev_pm_ops mchp_spdifrx_pm_ops =3D { + RUNTIME_PM_OPS(mchp_spdifrx_runtime_suspend, mchp_spdifrx_runtime_resume, + NULL) +}; + static int mchp_spdifrx_probe(struct platform_device *pdev) { struct mchp_spdifrx_dev *dev; @@ -1022,13 +1117,20 @@ static int mchp_spdifrx_probe(struct platform_devic= e *pdev) dev->regmap =3D regmap; platform_set_drvdata(pdev, dev); =20 + pm_runtime_enable(dev->dev); + if (!pm_runtime_enabled(dev->dev)) { + err =3D mchp_spdifrx_runtime_resume(dev->dev); + if (err) + goto pm_runtime_disable; + } + dev->capture.addr =3D (dma_addr_t)mem->start + SPDIFRX_RHR; dev->capture.maxburst =3D 1; =20 err =3D devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); if (err) { dev_err(&pdev->dev, "failed to register PCM: %d\n", err); - return err; + goto pm_runtime_suspend; } =20 err =3D devm_snd_soc_register_component(&pdev->dev, @@ -1036,20 +1138,40 @@ static int mchp_spdifrx_probe(struct platform_devic= e *pdev) &mchp_spdifrx_dai, 1); if (err) { dev_err(&pdev->dev, "fail to register dai\n"); - return err; + goto pm_runtime_suspend; } =20 regmap_read(regmap, SPDIFRX_VERSION, &vers); dev_info(&pdev->dev, "hw version: %#lx\n", vers & SPDIFRX_VERSION_MASK); =20 return 0; + +pm_runtime_suspend: + if (!pm_runtime_status_suspended(dev->dev)) + mchp_spdifrx_runtime_suspend(dev->dev); +pm_runtime_disable: + pm_runtime_disable(dev->dev); + return err; +} + +static int mchp_spdifrx_remove(struct platform_device *pdev) +{ + struct mchp_spdifrx_dev *dev =3D platform_get_drvdata(pdev); + + pm_runtime_disable(dev->dev); + if (!pm_runtime_status_suspended(dev->dev)) + mchp_spdifrx_runtime_suspend(dev->dev); + + return 0; } =20 static struct platform_driver mchp_spdifrx_driver =3D { .probe =3D mchp_spdifrx_probe, + .remove =3D mchp_spdifrx_remove, .driver =3D { .name =3D "mchp_spdifrx", .of_match_table =3D of_match_ptr(mchp_spdifrx_dt_ids), + .pm =3D pm_ptr(&mchp_spdifrx_pm_ops), }, }; =20 --=20 2.34.1 From nobody Sat Sep 13 20:35:33 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E320C54EAA for ; Mon, 30 Jan 2023 12:09:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236680AbjA3MJW (ORCPT ); Mon, 30 Jan 2023 07:09:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39268 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236644AbjA3MIw (ORCPT ); Mon, 30 Jan 2023 07:08:52 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 848C4AD34 for ; Mon, 30 Jan 2023 04:08:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1675080513; x=1706616513; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Zg6MguSNDaqbB/z5cJmHX/RzGSEZnrDsEwnqwyBRCy8=; b=tbHrY5cd5EOhVC9OPaJSpTY28g9BsblN0R9cSXfGlIVXsQGzF8mUGjFj 7cqvuGRq13JZimoExC4G4er0bj1DUnmFCpkOr7KUj8IHKxG4v02LQ6Dhi 4hWaYikjNqwmbjLdnPPabP/vdF7+CWsS7/nAZcJNGce+gO5BY5ex9eduG SxqGtl0aUvm6JLY9+iVSQvpbHe3q6cMZawda4+915poEdblmn6ux/oKya Pgew0vcri0hNJQ7pQVY8vwRJDpoqTpvRUfmTknzJleeoZy5oaqNq1Cvfa mB6nJJJ0+5mOiFW6QROmZKpb73TJnhqaE2BtFwQq8QoQRE7inZl1Cd1aX g==; X-IronPort-AV: E=Sophos;i="5.97,257,1669100400"; d="scan'208";a="198544941" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 30 Jan 2023 05:07:52 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Mon, 30 Jan 2023 05:07:52 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Mon, 30 Jan 2023 05:07:48 -0700 From: Claudiu Beznea To: , , , , , CC: , , , Claudiu Beznea Subject: [PATCH 8/8] ASoC: mchp-spdifrx: document data structures Date: Mon, 30 Jan 2023 14:06:47 +0200 Message-ID: <20230130120647.638049-9-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230130120647.638049-1-claudiu.beznea@microchip.com> References: <20230130120647.638049-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Document data structures used by mchp-spdifrx driver. Signed-off-by: Claudiu Beznea --- sound/soc/atmel/mchp-spdifrx.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/sound/soc/atmel/mchp-spdifrx.c b/sound/soc/atmel/mchp-spdifrx.c index 796d4ec2b2b1..dab5d93de329 100644 --- a/sound/soc/atmel/mchp-spdifrx.c +++ b/sound/soc/atmel/mchp-spdifrx.c @@ -249,16 +249,34 @@ static const struct regmap_config mchp_spdifrx_regmap= _config =3D { =20 #define SPDIFRX_CHANNELS 2 =20 +/** + * struct mchp_spdifrx_ch_stat: MCHP SPDIFRX channel status + * @data: channel status bits + * @done: completion to signal channel status bits acquisition done + */ struct mchp_spdifrx_ch_stat { unsigned char data[SPDIFRX_CS_BITS / 8]; struct completion done; }; =20 +/** + * struct mchp_spdifrx_user_data: MCHP SPDIFRX user data + * @data: user data bits + * @done: completion to signal user data bits acquisition done + */ struct mchp_spdifrx_user_data { unsigned char data[SPDIFRX_UD_BITS / 8]; struct completion done; }; =20 +/** + * struct mchp_spdifrx_mixer_control: MCHP SPDIFRX mixer control data stru= cture + * @ch_stat: array of channel statuses + * @user_data: array of user data + * @ulock: ulock bit status + * @badf: badf bit status + * @signal: signal bit status + */ struct mchp_spdifrx_mixer_control { struct mchp_spdifrx_ch_stat ch_stat[SPDIFRX_CHANNELS]; struct mchp_spdifrx_user_data user_data[SPDIFRX_CHANNELS]; @@ -267,6 +285,17 @@ struct mchp_spdifrx_mixer_control { bool signal; }; =20 +/** + * struct mchp_spdifrx_dev: MCHP SPDIFRX device data structure + * @capture: DAI DMA configuration data + * @control: mixer controls + * @mlock: mutex to protect concurency b/w configuration and control APIs + * @dev: struct device + * @regmap: regmap for this device + * @pclk: peripheral clock + * @gclk: generic clock + * @trigger_enabled: true if enabled though trigger() ops + */ struct mchp_spdifrx_dev { struct snd_dmaengine_dai_dma_data capture; struct mchp_spdifrx_mixer_control control; --=20 2.34.1