From nobody Sun Sep 14 02:03:53 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 58421C54EAA for ; Fri, 27 Jan 2023 11:29:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233382AbjA0L3h (ORCPT ); Fri, 27 Jan 2023 06:29:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41864 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233356AbjA0L3R (ORCPT ); Fri, 27 Jan 2023 06:29:17 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 7F7A472651 for ; Fri, 27 Jan 2023 03:28:27 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DFBAF1570; Fri, 27 Jan 2023 03:28:55 -0800 (PST) Received: from e122027.cambridge.arm.com (e122027.cambridge.arm.com [10.1.35.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9AA8A3F64C; Fri, 27 Jan 2023 03:28:11 -0800 (PST) From: Steven Price To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: Steven Price , Catalin Marinas , Ard Biesheuvel , Marc Zyngier , Will Deacon , Suzuki K Poulose , James Morse , Oliver Upton , Zenghui Yu , linux-kernel@vger.kernel.org, Joey Gouly , Alexandru Elisei , Christoffer Dall , Fuad Tabba , linux-coco@lists.linux.dev Subject: [RFC PATCH 01/14] arm64: remove redundant 'extern' Date: Fri, 27 Jan 2023 11:27:45 +0000 Message-Id: <20230127112758.37891-2-steven.price@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230127112758.37891-1-steven.price@arm.com> References: <20230127112248.136810-1-suzuki.poulose@arm.com> <20230127112758.37891-1-steven.price@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" It isn't necessary to mark function definitions extern and goes against the kernel coding style. Remove the redundant extern keyword. Signed-off-by: Steven Price --- arch/arm64/include/asm/fixmap.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/fixmap.h b/arch/arm64/include/asm/fixma= p.h index 71ed5fdf718b..09ba9fe3b02c 100644 --- a/arch/arm64/include/asm/fixmap.h +++ b/arch/arm64/include/asm/fixmap.h @@ -107,7 +107,7 @@ void __init early_fixmap_init(void); #define __late_set_fixmap __set_fixmap #define __late_clear_fixmap(idx) __set_fixmap((idx), 0, FIXMAP_PAGE_CLEAR) =20 -extern void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgpro= t_t prot); +void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t pro= t); =20 #include =20 --=20 2.34.1 From nobody Sun Sep 14 02:03:53 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AF7D6C54EAA for ; Fri, 27 Jan 2023 11:29:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233398AbjA0L3p (ORCPT ); Fri, 27 Jan 2023 06:29:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41948 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233169AbjA0L3X (ORCPT ); Fri, 27 Jan 2023 06:29:23 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 84D4772640 for ; Fri, 27 Jan 2023 03:28:31 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DF7481595; Fri, 27 Jan 2023 03:28:58 -0800 (PST) Received: from e122027.cambridge.arm.com (e122027.cambridge.arm.com [10.1.35.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4DEBC3F64C; Fri, 27 Jan 2023 03:28:14 -0800 (PST) From: Steven Price To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: Steven Price , Catalin Marinas , Ard Biesheuvel , Marc Zyngier , Will Deacon , Suzuki K Poulose , James Morse , Oliver Upton , Zenghui Yu , linux-kernel@vger.kernel.org, Joey Gouly , Alexandru Elisei , Christoffer Dall , Fuad Tabba , linux-coco@lists.linux.dev Subject: [RFC PATCH 02/14] arm64: rsi: Add RSI definitions Date: Fri, 27 Jan 2023 11:27:46 +0000 Message-Id: <20230127112758.37891-3-steven.price@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230127112758.37891-1-steven.price@arm.com> References: <20230127112248.136810-1-suzuki.poulose@arm.com> <20230127112758.37891-1-steven.price@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Suzuki K Poulose The RMM (Realm Management Monitor) provides functionality that can be accessed by a realm guest through SMC (Realm Services Interface) calls. The SMC definitions are based on DEN0137[1] version A-bet0. [1] https://developer.arm.com/documentation/den0137/latest Signed-off-by: Suzuki K Poulose Signed-off-by: Steven Price --- arch/arm64/include/asm/rsi_cmds.h | 57 +++++++++++++ arch/arm64/include/asm/rsi_smc.h | 130 ++++++++++++++++++++++++++++++ 2 files changed, 187 insertions(+) create mode 100644 arch/arm64/include/asm/rsi_cmds.h create mode 100644 arch/arm64/include/asm/rsi_smc.h diff --git a/arch/arm64/include/asm/rsi_cmds.h b/arch/arm64/include/asm/rsi= _cmds.h new file mode 100644 index 000000000000..a0b3c1bd786a --- /dev/null +++ b/arch/arm64/include/asm/rsi_cmds.h @@ -0,0 +1,57 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2023 ARM Ltd. + */ + +#ifndef __ASM_RSI_CMDS_H +#define __ASM_RSI_CMDS_H + +#include + +#include + +enum ripas { + RSI_RIPAS_EMPTY, + RSI_RIPAS_RAM, +}; + +static inline unsigned long rsi_get_version(void) +{ + struct arm_smccc_res res; + + arm_smccc_smc(SMC_RSI_ABI_VERSION, 0, 0, 0, 0, 0, 0, 0, &res); + + return res.a0; +} + +static inline unsigned long invoke_rsi_fn_smc(unsigned long function_id, + unsigned long arg0, + unsigned long arg1, + unsigned long arg2, + unsigned long arg3) +{ + struct arm_smccc_res res; + + arm_smccc_smc(function_id, arg0, arg1, arg2, arg3, 0, 0, 0, &res); + return res.a0; +} + +static inline void invoke_rsi_fn_smc_with_res(unsigned long function_id, + unsigned long arg0, + unsigned long arg1, + unsigned long arg2, + unsigned long arg3, + struct arm_smccc_res *res) +{ + arm_smccc_smc(function_id, arg0, arg1, arg2, arg3, 0, 0, 0, res); +} + +static inline unsigned long rsi_set_addr_range_state(phys_addr_t start, + phys_addr_t end, + enum ripas state) +{ + return invoke_rsi_fn_smc(SMC_RSI_IPA_STATE_SET, + start, (end - start), state, 0); +} + +#endif diff --git a/arch/arm64/include/asm/rsi_smc.h b/arch/arm64/include/asm/rsi_= smc.h new file mode 100644 index 000000000000..bc0cdd83f164 --- /dev/null +++ b/arch/arm64/include/asm/rsi_smc.h @@ -0,0 +1,130 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2023 ARM Ltd. + */ + +#ifndef __SMC_RSI_H_ +#define __SMC_RSI_H_ + +/* + * This file describes the Realm Services Interface (RSI) Application Bina= ry + * Interface (ABI) for SMC calls made from within the Realm to the RMM and + * serviced by the RMM. + */ + +#define SMC_RSI_CALL_BASE 0xC4000000 + +/* + * The major version number of the RSI implementation. Increase this when= ever + * the binary format or semantics of the SMC calls change. + */ +#define RSI_ABI_VERSION_MAJOR 1 + +/* + * The minor version number of the RSI implementation. Increase this when + * a bug is fixed, or a feature is added without breaking binary compatibi= lity. + */ +#define RSI_ABI_VERSION_MINOR 0 + +#define RSI_ABI_VERSION ((RSI_ABI_VERSION_MAJOR << 16) | \ + RSI_ABI_VERSION_MINOR) + +#define RSI_ABI_VERSION_GET_MAJOR(_version) ((_version) >> 16) +#define RSI_ABI_VERSION_GET_MINOR(_version) ((_version) & 0xFFFF) + +#define RSI_SUCCESS 0 +#define RSI_ERROR_INPUT 1 +#define RSI_ERROR_STATE 2 +#define RSI_INCOMPLETE 3 + +#define SMC_RSI_FID(_x) (SMC_RSI_CALL_BASE + (_x)) + +#define SMC_RSI_ABI_VERSION SMC_RSI_FID(0x190) + +/* + * arg1 =3D=3D The IPA of token buffer + * arg2 =3D=3D Challenge value, bytes: 0 - 7 + * arg3 =3D=3D Challenge value, bytes: 7 - 15 + * arg4 =3D=3D Challenge value, bytes: 16 - 23 + * arg5 =3D=3D Challenge value, bytes: 24 - 31 + * arg6 =3D=3D Challenge value, bytes: 32 - 39 + * arg7 =3D=3D Challenge value, bytes: 40 - 47 + * arg8 =3D=3D Challenge value, bytes: 48 - 55 + * arg9 =3D=3D Challenge value, bytes: 56 - 63 + * ret0 =3D=3D Status / error + */ +#define SMC_RSI_ATTESTATION_TOKEN_INIT SMC_RSI_FID(0x194) + +/* + * arg1 =3D=3D The IPA of token buffer + * ret0 =3D=3D Status / error + * ret1 =3D=3D Size of completed token in bytes + */ +#define SMC_RSI_ATTESTATION_TOKEN_CONTINUE SMC_RSI_FID(0x195) + +/* + * arg1 =3D=3D Index, which measurements slot to extend + * arg2 =3D=3D Size of realm measurement in bytes, max 64 bytes + * arg3 =3D=3D Measurement value, bytes: 0 - 7 + * arg4 =3D=3D Measurement value, bytes: 7 - 15 + * arg5 =3D=3D Measurement value, bytes: 16 - 23 + * arg6 =3D=3D Measurement value, bytes: 24 - 31 + * arg7 =3D=3D Measurement value, bytes: 32 - 39 + * arg8 =3D=3D Measurement value, bytes: 40 - 47 + * arg9 =3D=3D Measurement value, bytes: 48 - 55 + * arg10 =3D=3D Measurement value, bytes: 56 - 63 + * ret0 =3D=3D Status / error + */ +#define SMC_RSI_MEASUREMENT_EXTEND SMC_RSI_FID(0x193) + +/* + * arg1 =3D=3D Index, which measurements slot to read + * ret0 =3D=3D Status / error + * ret1 =3D=3D Measurement value, bytes: 0 - 7 + * ret2 =3D=3D Measurement value, bytes: 7 - 15 + * ret3 =3D=3D Measurement value, bytes: 16 - 23 + * ret4 =3D=3D Measurement value, bytes: 24 - 31 + * ret5 =3D=3D Measurement value, bytes: 32 - 39 + * ret6 =3D=3D Measurement value, bytes: 40 - 47 + * ret7 =3D=3D Measurement value, bytes: 48 - 55 + * ret8 =3D=3D Measurement value, bytes: 56 - 63 + */ +#define SMC_RSI_MEASUREMENT_READ SMC_RSI_FID(0x192) + +#ifndef __ASSEMBLY__ + +struct realm_config { + unsigned long ipa_bits; /* Width of IPA in bits */ +}; + +#endif /* __ASSEMBLY__ */ + +/* + * arg1 =3D=3D struct realm_config addr + * ret0 =3D=3D Status / error + */ +#define SMC_RSI_REALM_CONFIG SMC_RSI_FID(0x196) + +/* + * arg1 =3D=3D IPA address of target region + * arg2 =3D=3D size of target region in bytes + * arg3 =3D=3D RIPAS value + * ret0 =3D=3D Status / error + * ret1 =3D=3D Top of modified IPA range + */ +#define SMC_RSI_IPA_STATE_SET SMC_RSI_FID(0x197) + +/* + * arg1 =3D=3D IPA of target page + * ret0 =3D=3D Status / error + * ret1 =3D=3D RIPAS value + */ +#define SMC_RSI_IPA_STATE_GET SMC_RSI_FID(0x198) + +/* + * arg1 =3D=3D IPA of host call structure + * ret0 =3D=3D Status / error + */ +#define SMC_RSI_HOST_CALL SMC_RSI_FID(0x199) + +#endif /* __SMC_RSI_H_ */ --=20 2.34.1 From nobody Sun Sep 14 02:03:53 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1A139C61DA4 for ; Fri, 27 Jan 2023 11:30:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233433AbjA0L3v (ORCPT ); Fri, 27 Jan 2023 06:29:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41674 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230060AbjA0L3Z (ORCPT ); Fri, 27 Jan 2023 06:29:25 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 929727AE6A for ; Fri, 27 Jan 2023 03:28:34 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8617B1596; Fri, 27 Jan 2023 03:29:01 -0800 (PST) Received: from e122027.cambridge.arm.com (e122027.cambridge.arm.com [10.1.35.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 418763F64C; Fri, 27 Jan 2023 03:28:17 -0800 (PST) From: Steven Price To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: Steven Price , Catalin Marinas , Ard Biesheuvel , Marc Zyngier , Will Deacon , Suzuki K Poulose , James Morse , Oliver Upton , Zenghui Yu , linux-kernel@vger.kernel.org, Joey Gouly , Alexandru Elisei , Christoffer Dall , Fuad Tabba , linux-coco@lists.linux.dev Subject: [RFC PATCH 03/14] arm64: Detect if in a realm and set RIPAS RAM Date: Fri, 27 Jan 2023 11:27:47 +0000 Message-Id: <20230127112758.37891-4-steven.price@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230127112758.37891-1-steven.price@arm.com> References: <20230127112248.136810-1-suzuki.poulose@arm.com> <20230127112758.37891-1-steven.price@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Detect that the VM is a realm guest by the presence of the RSI interface. If in a realm then all memory needs to be marked as RIPAS RAM initially, the loader may or may not have done this for us. To be sure iterate over all RAM and mark it as such. Any failure is fatal as that implies the RAM regions passed to Linux are incorrect - which would mean failing later when attempting to access non-existent RAM. Co-developed-by: Suzuki K Poulose Signed-off-by: Suzuki K Poulose Signed-off-by: Steven Price --- arch/arm64/include/asm/rsi.h | 46 ++++++++++++++++++++++++++++ arch/arm64/include/asm/rsi_cmds.h | 12 ++++++-- arch/arm64/kernel/Makefile | 2 +- arch/arm64/kernel/rsi.c | 50 +++++++++++++++++++++++++++++++ arch/arm64/kernel/setup.c | 3 ++ arch/arm64/mm/init.c | 2 ++ 6 files changed, 111 insertions(+), 4 deletions(-) create mode 100644 arch/arm64/include/asm/rsi.h create mode 100644 arch/arm64/kernel/rsi.c diff --git a/arch/arm64/include/asm/rsi.h b/arch/arm64/include/asm/rsi.h new file mode 100644 index 000000000000..3b56aac5dc43 --- /dev/null +++ b/arch/arm64/include/asm/rsi.h @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2023 ARM Ltd. + */ + +#ifndef __ASM_RSI_H_ +#define __ASM_RSI_H_ + +#include +#include + +extern struct static_key_false rsi_present; + +void arm64_setup_memory(void); + +void __init arm64_rsi_init(void); +static inline bool is_realm_world(void) +{ + return static_branch_unlikely(&rsi_present); +} + +static inline void set_memory_range(phys_addr_t start, phys_addr_t end, + enum ripas state) +{ + unsigned long ret; + phys_addr_t top; + + while (start !=3D end) { + ret =3D rsi_set_addr_range_state(start, end, state, &top); + BUG_ON(ret); + BUG_ON(top < start); + BUG_ON(top > end); + start =3D top; + } +} + +static inline void set_memory_range_protected(phys_addr_t start, phys_addr= _t end) +{ + set_memory_range(start, end, RSI_RIPAS_RAM); +} + +static inline void set_memory_range_shared(phys_addr_t start, phys_addr_t = end) +{ + set_memory_range(start, end, RSI_RIPAS_EMPTY); +} +#endif diff --git a/arch/arm64/include/asm/rsi_cmds.h b/arch/arm64/include/asm/rsi= _cmds.h index a0b3c1bd786a..ee0df00efd87 100644 --- a/arch/arm64/include/asm/rsi_cmds.h +++ b/arch/arm64/include/asm/rsi_cmds.h @@ -48,10 +48,16 @@ static inline void invoke_rsi_fn_smc_with_res(unsigned = long function_id, =20 static inline unsigned long rsi_set_addr_range_state(phys_addr_t start, phys_addr_t end, - enum ripas state) + enum ripas state, + phys_addr_t *top) { - return invoke_rsi_fn_smc(SMC_RSI_IPA_STATE_SET, - start, (end - start), state, 0); + struct arm_smccc_res res; + + invoke_rsi_fn_smc_with_res(SMC_RSI_IPA_STATE_SET, + start, (end - start), state, 0, &res); + + *top =3D res.a1; + return res.a0; } =20 #endif diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile index ceba6792f5b3..f301c2ad2fa7 100644 --- a/arch/arm64/kernel/Makefile +++ b/arch/arm64/kernel/Makefile @@ -34,7 +34,7 @@ obj-y :=3D debug-monitors.o entry.o irq.o fpsimd.o \ cpufeature.o alternative.o cacheinfo.o \ smp.o smp_spin_table.o topology.o smccc-call.o \ syscall.o proton-pack.o idreg-override.o idle.o \ - patching.o + patching.o rsi.o =20 obj-$(CONFIG_COMPAT) +=3D sys32.o signal32.o \ sys_compat.o diff --git a/arch/arm64/kernel/rsi.c b/arch/arm64/kernel/rsi.c new file mode 100644 index 000000000000..b354ac661c9d --- /dev/null +++ b/arch/arm64/kernel/rsi.c @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2023 ARM Ltd. + */ + +#include +#include +#include + +DEFINE_STATIC_KEY_FALSE_RO(rsi_present); + +static bool rsi_version_matches(void) +{ + unsigned long ver =3D rsi_get_version(); + + if (ver =3D=3D SMCCC_RET_NOT_SUPPORTED) + return false; + + pr_info("RME: RSI version %lu.%lu advertised\n", + RSI_ABI_VERSION_GET_MAJOR(ver), + RSI_ABI_VERSION_GET_MINOR(ver)); + + return (ver >=3D RSI_ABI_VERSION && + RSI_ABI_VERSION_GET_MAJOR(ver) =3D=3D RSI_ABI_VERSION_MAJOR); +} + +void arm64_setup_memory(void) +{ + u64 i; + phys_addr_t start, end; + + if (!static_branch_unlikely(&rsi_present)) + return; + + /* + * Iterate over the available memory ranges + * and convert the state to protected memory. + */ + for_each_mem_range(i, &start, &end) { + set_memory_range_protected(start, end); + } +} + +void __init arm64_rsi_init(void) +{ + if (!rsi_version_matches()) + return; + + static_branch_enable(&rsi_present); +} diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c index 12cfe9d0d3fa..ea89ee563135 100644 --- a/arch/arm64/kernel/setup.c +++ b/arch/arm64/kernel/setup.c @@ -43,6 +43,7 @@ #include #include #include +#include #include #include #include @@ -312,6 +313,8 @@ void __init __no_sanitize_address setup_arch(char **cmd= line_p) * cpufeature code and early parameters. */ jump_label_init(); + /* Init RSI after jump_labels are active */ + arm64_rsi_init(); parse_early_param(); =20 dynamic_scs_init(); diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c index 58a0bb2c17f1..fa9088add624 100644 --- a/arch/arm64/mm/init.c +++ b/arch/arm64/mm/init.c @@ -39,6 +39,7 @@ #include #include #include +#include #include #include #include @@ -412,6 +413,7 @@ void __init arm64_memblock_init(void) reserve_crashkernel(); =20 high_memory =3D __va(memblock_end_of_DRAM() - 1) + 1; + arm64_setup_memory(); } =20 void __init bootmem_init(void) --=20 2.34.1 From nobody Sun Sep 14 02:03:53 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 49469C54EAA for ; Fri, 27 Jan 2023 11:30:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232088AbjA0LaH (ORCPT ); Fri, 27 Jan 2023 06:30:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41688 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233188AbjA0L3Z (ORCPT ); Fri, 27 Jan 2023 06:29:25 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 8924D234E5 for ; Fri, 27 Jan 2023 03:28:37 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 01B031576; Fri, 27 Jan 2023 03:29:04 -0800 (PST) Received: from e122027.cambridge.arm.com (e122027.cambridge.arm.com [10.1.35.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id F1EC93F64C; Fri, 27 Jan 2023 03:28:19 -0800 (PST) From: Steven Price To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: Steven Price , Catalin Marinas , Ard Biesheuvel , Marc Zyngier , Will Deacon , Suzuki K Poulose , James Morse , Oliver Upton , Zenghui Yu , linux-kernel@vger.kernel.org, Joey Gouly , Alexandru Elisei , Christoffer Dall , Fuad Tabba , linux-coco@lists.linux.dev Subject: [RFC PATCH 04/14] arm64: realm: Query IPA size from the RMM Date: Fri, 27 Jan 2023 11:27:48 +0000 Message-Id: <20230127112758.37891-5-steven.price@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230127112758.37891-1-steven.price@arm.com> References: <20230127112248.136810-1-suzuki.poulose@arm.com> <20230127112758.37891-1-steven.price@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The top bit of the configured IPA size is used as an attribute to control whether the address is protected or shared. Query the configuration from the RMM to assertain which bit this is. Co-developed-by: Suzuki K Poulose Signed-off-by: Suzuki K Poulose Signed-off-by: Steven Price --- arch/arm64/include/asm/pgtable-prot.h | 2 ++ arch/arm64/include/asm/rsi_cmds.h | 8 ++++++++ arch/arm64/kernel/rsi.c | 8 ++++++++ 3 files changed, 18 insertions(+) diff --git a/arch/arm64/include/asm/pgtable-prot.h b/arch/arm64/include/asm= /pgtable-prot.h index 9b165117a454..3f24080d6cc9 100644 --- a/arch/arm64/include/asm/pgtable-prot.h +++ b/arch/arm64/include/asm/pgtable-prot.h @@ -33,7 +33,9 @@ #include =20 extern bool arm64_use_ng_mappings; +extern unsigned long prot_ns_shared; =20 +#define PROT_NS_SHARED ((prot_ns_shared)) #define _PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED) #define _PROT_SECT_DEFAULT (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S) =20 diff --git a/arch/arm64/include/asm/rsi_cmds.h b/arch/arm64/include/asm/rsi= _cmds.h index ee0df00efd87..e13f702de6c2 100644 --- a/arch/arm64/include/asm/rsi_cmds.h +++ b/arch/arm64/include/asm/rsi_cmds.h @@ -46,6 +46,14 @@ static inline void invoke_rsi_fn_smc_with_res(unsigned l= ong function_id, arm_smccc_smc(function_id, arg0, arg1, arg2, arg3, 0, 0, 0, res); } =20 +static inline unsigned long rsi_get_realm_config(struct realm_config *cfg) +{ + struct arm_smccc_res res; + + invoke_rsi_fn_smc_with_res(SMC_RSI_REALM_CONFIG, virt_to_phys(cfg), 0, 0,= 0, &res); + return res.a0; +} + static inline unsigned long rsi_set_addr_range_state(phys_addr_t start, phys_addr_t end, enum ripas state, diff --git a/arch/arm64/kernel/rsi.c b/arch/arm64/kernel/rsi.c index b354ac661c9d..9c63ee1c6979 100644 --- a/arch/arm64/kernel/rsi.c +++ b/arch/arm64/kernel/rsi.c @@ -7,6 +7,11 @@ #include #include =20 +struct realm_config __attribute((aligned(PAGE_SIZE))) config; + +unsigned long prot_ns_shared; +EXPORT_SYMBOL(prot_ns_shared); + DEFINE_STATIC_KEY_FALSE_RO(rsi_present); =20 static bool rsi_version_matches(void) @@ -45,6 +50,9 @@ void __init arm64_rsi_init(void) { if (!rsi_version_matches()) return; + if (rsi_get_realm_config(&config)) + return; + prot_ns_shared =3D BIT(config.ipa_bits - 1); =20 static_branch_enable(&rsi_present); } --=20 2.34.1 From nobody Sun Sep 14 02:03:53 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA4BDC38142 for ; Fri, 27 Jan 2023 11:30:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233383AbjA0LaW (ORCPT ); Fri, 27 Jan 2023 06:30:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38040 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233356AbjA0L3n (ORCPT ); Fri, 27 Jan 2023 06:29:43 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id D499C72649 for ; Fri, 27 Jan 2023 03:28:57 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C9BDF15BF; Fri, 27 Jan 2023 03:29:06 -0800 (PST) Received: from e122027.cambridge.arm.com (e122027.cambridge.arm.com [10.1.35.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6CF793F64C; Fri, 27 Jan 2023 03:28:22 -0800 (PST) From: Steven Price To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: Steven Price , Catalin Marinas , Ard Biesheuvel , Marc Zyngier , Will Deacon , Suzuki K Poulose , James Morse , Oliver Upton , Zenghui Yu , linux-kernel@vger.kernel.org, Joey Gouly , Alexandru Elisei , Christoffer Dall , Fuad Tabba , linux-coco@lists.linux.dev Subject: [RFC PATCH 05/14] arm64: Mark all I/O as non-secure shared Date: Fri, 27 Jan 2023 11:27:49 +0000 Message-Id: <20230127112758.37891-6-steven.price@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230127112758.37891-1-steven.price@arm.com> References: <20230127112248.136810-1-suzuki.poulose@arm.com> <20230127112758.37891-1-steven.price@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" All I/O is by default considered non-secure for realms. As such mark them as shared with the host. Co-developed-by: Suzuki K Poulose Signed-off-by: Suzuki K Poulose Signed-off-by: Steven Price --- arch/arm64/include/asm/io.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h index 877495a0fd0c..b1a9c22aed72 100644 --- a/arch/arm64/include/asm/io.h +++ b/arch/arm64/include/asm/io.h @@ -142,12 +142,12 @@ extern void __memset_io(volatile void __iomem *, int,= size_t); bool ioremap_allowed(phys_addr_t phys_addr, size_t size, unsigned long pro= t); #define ioremap_allowed ioremap_allowed =20 -#define _PAGE_IOREMAP PROT_DEVICE_nGnRE +#define _PAGE_IOREMAP (PROT_DEVICE_nGnRE | PROT_NS_SHARED) =20 #define ioremap_wc(addr, size) \ - ioremap_prot((addr), (size), PROT_NORMAL_NC) + ioremap_prot((addr), (size), (PROT_NORMAL_NC | PROT_NS_SHARED)) #define ioremap_np(addr, size) \ - ioremap_prot((addr), (size), PROT_DEVICE_nGnRnE) + ioremap_prot((addr), (size), (PROT_DEVICE_nGnRnE | PROT_NS_SHARED)) =20 /* * io{read,write}{16,32,64}be() macros --=20 2.34.1 From nobody Sun Sep 14 02:03:53 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 74D78C54EAA for ; Fri, 27 Jan 2023 11:30:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233340AbjA0LaS (ORCPT ); Fri, 27 Jan 2023 06:30:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38032 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232997AbjA0L3n (ORCPT ); Fri, 27 Jan 2023 06:29:43 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id C7FB0402F6 for ; Fri, 27 Jan 2023 03:28:57 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3D7DB15DB; Fri, 27 Jan 2023 03:29:09 -0800 (PST) Received: from e122027.cambridge.arm.com (e122027.cambridge.arm.com [10.1.35.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 297B53F64C; Fri, 27 Jan 2023 03:28:25 -0800 (PST) From: Steven Price To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: Steven Price , Catalin Marinas , Ard Biesheuvel , Marc Zyngier , Will Deacon , Suzuki K Poulose , James Morse , Oliver Upton , Zenghui Yu , linux-kernel@vger.kernel.org, Joey Gouly , Alexandru Elisei , Christoffer Dall , Fuad Tabba , linux-coco@lists.linux.dev Subject: [RFC PATCH 06/14] fixmap: Allow architecture overriding set_fixmap_io Date: Fri, 27 Jan 2023 11:27:50 +0000 Message-Id: <20230127112758.37891-7-steven.price@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230127112758.37891-1-steven.price@arm.com> References: <20230127112248.136810-1-suzuki.poulose@arm.com> <20230127112758.37891-1-steven.price@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Suzuki K Poulose For a realm guest it will be necessary to ensure IO mappings are shared so that the VMM can emulate the device. The following patch will provide an implementation of set_fixmap_io for arm64 setting the shared bit (if in a realm). Signed-off-by: Suzuki K Poulose Signed-off-by: Steven Price --- include/asm-generic/fixmap.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/asm-generic/fixmap.h b/include/asm-generic/fixmap.h index 8cc7b09c1bc7..c5ce0368c1ee 100644 --- a/include/asm-generic/fixmap.h +++ b/include/asm-generic/fixmap.h @@ -94,8 +94,10 @@ static inline unsigned long virt_to_fix(const unsigned l= ong vaddr) /* * Some fixmaps are for IO */ +#ifndef set_fixmap_io #define set_fixmap_io(idx, phys) \ __set_fixmap(idx, phys, FIXMAP_PAGE_IO) +#endif =20 #define set_fixmap_offset_io(idx, phys) \ __set_fixmap_offset(idx, phys, FIXMAP_PAGE_IO) --=20 2.34.1 From nobody Sun Sep 14 02:03:53 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C83E1C54EAA for ; Fri, 27 Jan 2023 11:30:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233431AbjA0LaY (ORCPT ); Fri, 27 Jan 2023 06:30:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43432 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233416AbjA0L3r (ORCPT ); Fri, 27 Jan 2023 06:29:47 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 749FF74C3E for ; Fri, 27 Jan 2023 03:29:01 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D99D51650; Fri, 27 Jan 2023 03:29:11 -0800 (PST) Received: from e122027.cambridge.arm.com (e122027.cambridge.arm.com [10.1.35.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B39DE3F64C; Fri, 27 Jan 2023 03:28:27 -0800 (PST) From: Steven Price To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: Steven Price , Catalin Marinas , Ard Biesheuvel , Marc Zyngier , Will Deacon , Suzuki K Poulose , James Morse , Oliver Upton , Zenghui Yu , linux-kernel@vger.kernel.org, Joey Gouly , Alexandru Elisei , Christoffer Dall , Fuad Tabba , linux-coco@lists.linux.dev Subject: [RFC PATCH 07/14] arm64: Override set_fixmap_io Date: Fri, 27 Jan 2023 11:27:51 +0000 Message-Id: <20230127112758.37891-8-steven.price@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230127112758.37891-1-steven.price@arm.com> References: <20230127112248.136810-1-suzuki.poulose@arm.com> <20230127112758.37891-1-steven.price@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Suzuki K Poulose Override the set_fixmap_io to set shared permission for the host in case of a CC guest. For now we mark it shared unconditionally. Future changes could filter the physical address and make the decision accordingly. Signed-off-by: Suzuki K Poulose Signed-off-by: Steven Price --- arch/arm64/include/asm/fixmap.h | 2 ++ arch/arm64/mm/mmu.c | 13 +++++++++++++ 2 files changed, 15 insertions(+) diff --git a/arch/arm64/include/asm/fixmap.h b/arch/arm64/include/asm/fixma= p.h index 09ba9fe3b02c..1acafc1c7fae 100644 --- a/arch/arm64/include/asm/fixmap.h +++ b/arch/arm64/include/asm/fixmap.h @@ -107,6 +107,8 @@ void __init early_fixmap_init(void); #define __late_set_fixmap __set_fixmap #define __late_clear_fixmap(idx) __set_fixmap((idx), 0, FIXMAP_PAGE_CLEAR) =20 +#define set_fixmap_io set_fixmap_io +void set_fixmap_io(enum fixed_addresses idx, phys_addr_t phys); void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t pro= t); =20 #include diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index 14c87e8d69d8..33fda73c669b 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -1279,6 +1279,19 @@ void __set_fixmap(enum fixed_addresses idx, } } =20 +void set_fixmap_io(enum fixed_addresses idx, phys_addr_t phys) +{ + pgprot_t prot =3D FIXMAP_PAGE_IO; + + /* + * For now we consider all I/O as non-secure. For future + * filter the I/O base for setting appropriate permissions. + */ + prot =3D __pgprot(pgprot_val(prot) | PROT_NS_SHARED); + + return __set_fixmap(idx, phys, prot); +} + void *__init fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t pro= t) { const u64 dt_virt_base =3D __fix_to_virt(FIX_FDT); --=20 2.34.1 From nobody Sun Sep 14 02:03:53 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08AFAC38142 for ; Fri, 27 Jan 2023 11:30:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233444AbjA0Lad (ORCPT ); Fri, 27 Jan 2023 06:30:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41702 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233421AbjA0L3s (ORCPT ); Fri, 27 Jan 2023 06:29:48 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 657BC72679 for ; Fri, 27 Jan 2023 03:29:01 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 555F5165C; Fri, 27 Jan 2023 03:29:14 -0800 (PST) Received: from e122027.cambridge.arm.com (e122027.cambridge.arm.com [10.1.35.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 34CC63F64C; Fri, 27 Jan 2023 03:28:30 -0800 (PST) From: Steven Price To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: Steven Price , Catalin Marinas , Ard Biesheuvel , Marc Zyngier , Will Deacon , Suzuki K Poulose , James Morse , Oliver Upton , Zenghui Yu , linux-kernel@vger.kernel.org, Joey Gouly , Alexandru Elisei , Christoffer Dall , Fuad Tabba , linux-coco@lists.linux.dev Subject: [RFC PATCH 08/14] arm64: Make the PHYS_MASK_SHIFT dynamic Date: Fri, 27 Jan 2023 11:27:52 +0000 Message-Id: <20230127112758.37891-9-steven.price@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230127112758.37891-1-steven.price@arm.com> References: <20230127112248.136810-1-suzuki.poulose@arm.com> <20230127112758.37891-1-steven.price@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Make the PHYS_MASK_SHIFT dynamic for Realms. This is only is required for masking the PFN from a pte entry. Elsewhere, we could still use the PA bits configured by the kernel. So, this patch: -> renames PHYS_MASK_SHIFT -> MAX_PHYS_SHIFT as supported by the kernel -> Makes PHYS_MASK_SHIFT -> Dynamic value of the (I)PA bit width -> For a realm: reduces phys_mask_shift if the RMM reports a smaller configured size for the guest. Co-developed-by: Suzuki K Poulose Signed-off-by: Suzuki K Poulose Signed-off-by: Steven Price --- arch/arm64/include/asm/kvm_arm.h | 2 +- arch/arm64/include/asm/pgtable-hwdef.h | 4 ++-- arch/arm64/include/asm/pgtable.h | 5 +++++ arch/arm64/kernel/head.S | 2 +- arch/arm64/kernel/rsi.c | 5 +++++ 5 files changed, 14 insertions(+), 4 deletions(-) diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_= arm.h index 0df3fc3a0173..924f84024009 100644 --- a/arch/arm64/include/asm/kvm_arm.h +++ b/arch/arm64/include/asm/kvm_arm.h @@ -346,7 +346,7 @@ * bits in PAR are res0. */ #define PAR_TO_HPFAR(par) \ - (((par) & GENMASK_ULL(52 - 1, 12)) >> 8) + (((par) & GENMASK_ULL(MAX_PHYS_MASK_SHIFT - 1, 12)) >> 8) =20 #define ECN(x) { ESR_ELx_EC_##x, #x } =20 diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/as= m/pgtable-hwdef.h index f658aafc47df..677bf7a91616 100644 --- a/arch/arm64/include/asm/pgtable-hwdef.h +++ b/arch/arm64/include/asm/pgtable-hwdef.h @@ -178,8 +178,8 @@ /* * Highest possible physical address supported. */ -#define PHYS_MASK_SHIFT (CONFIG_ARM64_PA_BITS) -#define PHYS_MASK ((UL(1) << PHYS_MASK_SHIFT) - 1) +#define MAX_PHYS_MASK_SHIFT (CONFIG_ARM64_PA_BITS) +#define MAX_PHYS_MASK ((UL(1) << PHYS_MASK_SHIFT) - 1) =20 #define TTBR_CNP_BIT (UL(1) << 0) =20 diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgta= ble.h index b4bbeed80fb6..a1319a743b38 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -35,6 +35,11 @@ #include #include =20 +extern unsigned int phys_mask_shift; + +#define PHYS_MASK_SHIFT (phys_mask_shift) +#define PHYS_MASK ((1UL << PHYS_MASK_SHIFT) - 1) + #ifdef CONFIG_TRANSPARENT_HUGEPAGE #define __HAVE_ARCH_FLUSH_PMD_TLB_RANGE =20 diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index 952e17bd1c0b..a05504667b69 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -321,7 +321,7 @@ SYM_FUNC_START_LOCAL(create_idmap) #error "Mismatch between VA_BITS and page size/number of translation level= s" #endif #else -#define IDMAP_PGD_ORDER (PHYS_MASK_SHIFT - PGDIR_SHIFT) +#define IDMAP_PGD_ORDER (MAX_PHYS_MASK_SHIFT - PGDIR_SHIFT) #define EXTRA_SHIFT /* * If VA_BITS =3D=3D 48, we don't have to configure an additional diff --git a/arch/arm64/kernel/rsi.c b/arch/arm64/kernel/rsi.c index 9c63ee1c6979..49d36dfe0064 100644 --- a/arch/arm64/kernel/rsi.c +++ b/arch/arm64/kernel/rsi.c @@ -12,6 +12,8 @@ struct realm_config __attribute((aligned(PAGE_SIZE))) con= fig; unsigned long prot_ns_shared; EXPORT_SYMBOL(prot_ns_shared); =20 +unsigned int phys_mask_shift =3D CONFIG_ARM64_PA_BITS; + DEFINE_STATIC_KEY_FALSE_RO(rsi_present); =20 static bool rsi_version_matches(void) @@ -54,5 +56,8 @@ void __init arm64_rsi_init(void) return; prot_ns_shared =3D BIT(config.ipa_bits - 1); =20 + if (config.ipa_bits - 1 < phys_mask_shift) + phys_mask_shift =3D config.ipa_bits - 1; + static_branch_enable(&rsi_present); } --=20 2.34.1 From nobody Sun Sep 14 02:03:53 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3499FC54EAA for ; Fri, 27 Jan 2023 11:30:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233482AbjA0Lal (ORCPT ); Fri, 27 Jan 2023 06:30:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41798 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233484AbjA0L35 (ORCPT ); Fri, 27 Jan 2023 06:29:57 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 6164378AE3 for ; Fri, 27 Jan 2023 03:29:05 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0D1D41682; Fri, 27 Jan 2023 03:29:17 -0800 (PST) Received: from e122027.cambridge.arm.com (e122027.cambridge.arm.com [10.1.35.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A49D33F64C; Fri, 27 Jan 2023 03:28:32 -0800 (PST) From: Steven Price To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: Steven Price , Catalin Marinas , Ard Biesheuvel , Marc Zyngier , Will Deacon , Suzuki K Poulose , James Morse , Oliver Upton , Zenghui Yu , linux-kernel@vger.kernel.org, Joey Gouly , Alexandru Elisei , Christoffer Dall , Fuad Tabba , linux-coco@lists.linux.dev Subject: [RFC PATCH 09/14] arm64: Enforce bounce buffers for realm DMA Date: Fri, 27 Jan 2023 11:27:53 +0000 Message-Id: <20230127112758.37891-10-steven.price@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230127112758.37891-1-steven.price@arm.com> References: <20230127112248.136810-1-suzuki.poulose@arm.com> <20230127112758.37891-1-steven.price@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Within a realm guest it's not possible for a device emulated by the VMM to access arbitrary guest memory. So force the use of bounce buffers to ensure that the memory the emulated devices are accessing is in memory which is explicitly shared with the host. Co-developed-by: Suzuki K Poulose Signed-off-by: Suzuki K Poulose Signed-off-by: Steven Price --- arch/arm64/kernel/rsi.c | 2 ++ arch/arm64/mm/init.c | 8 +++++++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm64/kernel/rsi.c b/arch/arm64/kernel/rsi.c index 49d36dfe0064..1a07eefdd2e9 100644 --- a/arch/arm64/kernel/rsi.c +++ b/arch/arm64/kernel/rsi.c @@ -5,6 +5,8 @@ =20 #include #include +#include + #include =20 struct realm_config __attribute((aligned(PAGE_SIZE))) config; diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c index fa9088add624..32a4710ad861 100644 --- a/arch/arm64/mm/init.c +++ b/arch/arm64/mm/init.c @@ -472,7 +472,13 @@ void __init bootmem_init(void) */ void __init mem_init(void) { - swiotlb_init(max_pfn > PFN_DOWN(arm64_dma_phys_limit), SWIOTLB_VERBOSE); + if (is_realm_world()) { + swiotlb_init(true, SWIOTLB_VERBOSE | SWIOTLB_FORCE); + swiotlb_update_mem_attributes(); + } else { + swiotlb_init(max_pfn > PFN_DOWN(arm64_dma_phys_limit), + SWIOTLB_VERBOSE); + } =20 /* this will put all unused low memory onto the freelists */ memblock_free_all(); --=20 2.34.1 From nobody Sun Sep 14 02:03:53 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5752BC38142 for ; Fri, 27 Jan 2023 11:30:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233519AbjA0Lar (ORCPT ); Fri, 27 Jan 2023 06:30:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42046 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233493AbjA0L36 (ORCPT ); Fri, 27 Jan 2023 06:29:58 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 8136F41092 for ; Fri, 27 Jan 2023 03:29:05 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 615EC1684; Fri, 27 Jan 2023 03:29:19 -0800 (PST) Received: from e122027.cambridge.arm.com (e122027.cambridge.arm.com [10.1.35.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 608483F64C; Fri, 27 Jan 2023 03:28:35 -0800 (PST) From: Steven Price To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: Steven Price , Catalin Marinas , Ard Biesheuvel , Marc Zyngier , Will Deacon , Suzuki K Poulose , James Morse , Oliver Upton , Zenghui Yu , linux-kernel@vger.kernel.org, Joey Gouly , Alexandru Elisei , Christoffer Dall , Fuad Tabba , linux-coco@lists.linux.dev Subject: [RFC PATCH 10/14] arm64: Enable memory encrypt for Realms Date: Fri, 27 Jan 2023 11:27:54 +0000 Message-Id: <20230127112758.37891-11-steven.price@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230127112758.37891-1-steven.price@arm.com> References: <20230127112248.136810-1-suzuki.poulose@arm.com> <20230127112758.37891-1-steven.price@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Use the memory encryption APIs to trigger a RSI call to request a transition between protected memory and shared memory (or vice versa) and updating the kernel's linear map of modified pages to flip the top bit of the IPA. This requires that block mappings are not used in the direct map for realm guests. Co-developed-by: Suzuki K Poulose Signed-off-by: Suzuki K Poulose Signed-off-by: Steven Price --- arch/arm64/Kconfig | 3 ++ arch/arm64/include/asm/mem_encrypt.h | 19 +++++++++++ arch/arm64/kernel/rsi.c | 12 +++++++ arch/arm64/mm/pageattr.c | 48 +++++++++++++++++++++++++--- 4 files changed, 78 insertions(+), 4 deletions(-) create mode 100644 arch/arm64/include/asm/mem_encrypt.h diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 03934808b2ed..0aac44a993ac 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -20,6 +20,7 @@ config ARM64 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE select ARCH_HAS_CACHE_LINE_SIZE + select ARCH_HAS_CC_PLATFORM select ARCH_HAS_CURRENT_STACK_POINTER select ARCH_HAS_DEBUG_VIRTUAL select ARCH_HAS_DEBUG_VM_PGTABLE @@ -39,6 +40,8 @@ config ARM64 select ARCH_HAS_SETUP_DMA_OPS select ARCH_HAS_SET_DIRECT_MAP select ARCH_HAS_SET_MEMORY + select ARCH_HAS_MEM_ENCRYPT + select ARCH_HAS_FORCE_DMA_UNENCRYPTED select ARCH_STACKWALK select ARCH_HAS_STRICT_KERNEL_RWX select ARCH_HAS_STRICT_MODULE_RWX diff --git a/arch/arm64/include/asm/mem_encrypt.h b/arch/arm64/include/asm/= mem_encrypt.h new file mode 100644 index 000000000000..7381f9585321 --- /dev/null +++ b/arch/arm64/include/asm/mem_encrypt.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023 ARM Ltd. + */ + +#ifndef __ASM_MEM_ENCRYPT_H +#define __ASM_MEM_ENCRYPT_H + +#include + +/* All DMA must be to non-secure memory for now */ +static inline bool force_dma_unencrypted(struct device *dev) +{ + return is_realm_world(); +} + +int set_memory_encrypted(unsigned long addr, int numpages); +int set_memory_decrypted(unsigned long addr, int numpages); +#endif diff --git a/arch/arm64/kernel/rsi.c b/arch/arm64/kernel/rsi.c index 1a07eefdd2e9..1cc292826f2b 100644 --- a/arch/arm64/kernel/rsi.c +++ b/arch/arm64/kernel/rsi.c @@ -6,6 +6,7 @@ #include #include #include +#include =20 #include =20 @@ -18,6 +19,17 @@ unsigned int phys_mask_shift =3D CONFIG_ARM64_PA_BITS; =20 DEFINE_STATIC_KEY_FALSE_RO(rsi_present); =20 +bool cc_platform_has(enum cc_attr attr) +{ + switch (attr) { + case CC_ATTR_MEM_ENCRYPT: + return is_realm_world(); + default: + return false; + } +} +EXPORT_SYMBOL_GPL(cc_platform_has); + static bool rsi_version_matches(void) { unsigned long ver =3D rsi_get_version(); diff --git a/arch/arm64/mm/pageattr.c b/arch/arm64/mm/pageattr.c index 79dd201c59d8..bbd7364dd9a8 100644 --- a/arch/arm64/mm/pageattr.c +++ b/arch/arm64/mm/pageattr.c @@ -5,10 +5,12 @@ #include #include #include +#include #include #include =20 #include +#include #include #include =20 @@ -22,12 +24,12 @@ bool rodata_full __ro_after_init =3D IS_ENABLED(CONFIG_= RODATA_FULL_DEFAULT_ENABLED bool can_set_direct_map(void) { /* - * rodata_full, DEBUG_PAGEALLOC and KFENCE require linear map to be - * mapped at page granularity, so that it is possible to - * protect/unprotect single pages. + * rodata_full, DEBUG_PAGEALLOC, KFENCE and a Realm guest all require + * linear map to be mapped at page granularity, so that it is possible + * to protect/unprotect single pages. */ return (rodata_enabled && rodata_full) || debug_pagealloc_enabled() || - IS_ENABLED(CONFIG_KFENCE); + IS_ENABLED(CONFIG_KFENCE) || is_realm_world(); } =20 static int change_page_range(pte_t *ptep, unsigned long addr, void *data) @@ -38,6 +40,7 @@ static int change_page_range(pte_t *ptep, unsigned long a= ddr, void *data) pte =3D clear_pte_bit(pte, cdata->clear_mask); pte =3D set_pte_bit(pte, cdata->set_mask); =20 + /* TODO: Break before make for PROT_NS_SHARED updates */ set_pte(ptep, pte); return 0; } @@ -190,6 +193,43 @@ int set_direct_map_default_noflush(struct page *page) PAGE_SIZE, change_page_range, &data); } =20 +static int __set_memory_encrypted(unsigned long addr, + int numpages, + bool encrypt) +{ + unsigned long set_prot =3D 0, clear_prot =3D 0; + phys_addr_t start, end; + + if (!is_realm_world()) + return 0; + + WARN_ON(!__is_lm_address(addr)); + start =3D __virt_to_phys(addr); + end =3D start + numpages * PAGE_SIZE; + + if (encrypt) { + clear_prot =3D PROT_NS_SHARED; + set_memory_range_protected(start, end); + } else { + set_prot =3D PROT_NS_SHARED; + set_memory_range_shared(start, end); + } + + return __change_memory_common(addr, PAGE_SIZE * numpages, + __pgprot(set_prot), + __pgprot(clear_prot)); +} + +int set_memory_encrypted(unsigned long addr, int numpages) +{ + return __set_memory_encrypted(addr, numpages, true); +} + +int set_memory_decrypted(unsigned long addr, int numpages) +{ + return __set_memory_encrypted(addr, numpages, false); +} + #ifdef CONFIG_DEBUG_PAGEALLOC void __kernel_map_pages(struct page *page, int numpages, int enable) { --=20 2.34.1 From nobody Sun Sep 14 02:03:53 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1375BC38142 for ; Fri, 27 Jan 2023 11:30:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231562AbjA0Lat (ORCPT ); Fri, 27 Jan 2023 06:30:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42068 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233507AbjA0L36 (ORCPT ); Fri, 27 Jan 2023 06:29:58 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id D38F178AF5 for ; Fri, 27 Jan 2023 03:29:05 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CD5F11688; Fri, 27 Jan 2023 03:29:21 -0800 (PST) Received: from e122027.cambridge.arm.com (e122027.cambridge.arm.com [10.1.35.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BBD223F64C; Fri, 27 Jan 2023 03:28:37 -0800 (PST) From: Steven Price To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: Steven Price , Catalin Marinas , Ard Biesheuvel , Marc Zyngier , Will Deacon , Suzuki K Poulose , James Morse , Oliver Upton , Zenghui Yu , linux-kernel@vger.kernel.org, Joey Gouly , Alexandru Elisei , Christoffer Dall , Fuad Tabba , linux-coco@lists.linux.dev Subject: [RFC PATCH 11/14] arm64: Force device mappings to be non-secure shared Date: Fri, 27 Jan 2023 11:27:55 +0000 Message-Id: <20230127112758.37891-12-steven.price@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230127112758.37891-1-steven.price@arm.com> References: <20230127112248.136810-1-suzuki.poulose@arm.com> <20230127112758.37891-1-steven.price@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Suzuki K Poulose Device mappings (currently) need to be emulated by the VMM so must be mapped shared with the host. Signed-off-by: Suzuki K Poulose Signed-off-by: Steven Price --- arch/arm64/include/asm/pgtable.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgta= ble.h index a1319a743b38..f283ac3fb905 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -567,7 +567,7 @@ static inline void set_pud_at(struct mm_struct *mm, uns= igned long addr, #define pgprot_writecombine(prot) \ __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC) | PTE= _PXN | PTE_UXN) #define pgprot_device(prot) \ - __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) | = PTE_PXN | PTE_UXN) + __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) | = PTE_PXN | PTE_UXN | PROT_NS_SHARED) #define pgprot_tagged(prot) \ __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_TAGGED)) #define pgprot_mhp pgprot_tagged --=20 2.34.1 From nobody Sun Sep 14 02:03:53 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88DE6C38142 for ; Fri, 27 Jan 2023 11:30:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232566AbjA0Lao (ORCPT ); Fri, 27 Jan 2023 06:30:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42050 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233496AbjA0L36 (ORCPT ); Fri, 27 Jan 2023 06:29:58 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id BB6DA78AF2 for ; Fri, 27 Jan 2023 03:29:05 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5DCAB168F; Fri, 27 Jan 2023 03:29:24 -0800 (PST) Received: from e122027.cambridge.arm.com (e122027.cambridge.arm.com [10.1.35.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 27EEF3F8D6; Fri, 27 Jan 2023 03:28:40 -0800 (PST) From: Steven Price To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: Steven Price , Catalin Marinas , Ard Biesheuvel , Marc Zyngier , Will Deacon , Suzuki K Poulose , James Morse , Oliver Upton , Zenghui Yu , linux-kernel@vger.kernel.org, Joey Gouly , Alexandru Elisei , Christoffer Dall , Fuad Tabba , linux-coco@lists.linux.dev Subject: [RFC PATCH 12/14] efi: arm64: Map Device with Prot Shared Date: Fri, 27 Jan 2023 11:27:56 +0000 Message-Id: <20230127112758.37891-13-steven.price@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230127112758.37891-1-steven.price@arm.com> References: <20230127112248.136810-1-suzuki.poulose@arm.com> <20230127112758.37891-1-steven.price@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Suzuki K Poulose Device mappings need to be emualted by the VMM so must be mapped shared with the host. Signed-off-by: Suzuki K Poulose Signed-off-by: Steven Price --- arch/arm64/kernel/efi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/kernel/efi.c b/arch/arm64/kernel/efi.c index fab05de2e12d..03a876707fc5 100644 --- a/arch/arm64/kernel/efi.c +++ b/arch/arm64/kernel/efi.c @@ -31,7 +31,7 @@ static __init pteval_t create_mapping_protection(efi_memo= ry_desc_t *md) u32 type =3D md->type; =20 if (type =3D=3D EFI_MEMORY_MAPPED_IO) - return PROT_DEVICE_nGnRE; + return PROT_NS_SHARED | PROT_DEVICE_nGnRE; =20 if (region_is_misaligned(md)) { static bool __initdata code_is_misaligned; --=20 2.34.1 From nobody Sun Sep 14 02:03:53 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6B372C38142 for ; Fri, 27 Jan 2023 11:30:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229873AbjA0La4 (ORCPT ); Fri, 27 Jan 2023 06:30:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38002 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229700AbjA0LaJ (ORCPT ); Fri, 27 Jan 2023 06:30:09 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 880304108E for ; Fri, 27 Jan 2023 03:29:07 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C93751691; Fri, 27 Jan 2023 03:29:26 -0800 (PST) Received: from e122027.cambridge.arm.com (e122027.cambridge.arm.com [10.1.35.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id AD78A3F64C; Fri, 27 Jan 2023 03:28:42 -0800 (PST) From: Steven Price To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: Steven Price , Catalin Marinas , Ard Biesheuvel , Marc Zyngier , Will Deacon , Suzuki K Poulose , James Morse , Oliver Upton , Zenghui Yu , linux-kernel@vger.kernel.org, Joey Gouly , Alexandru Elisei , Christoffer Dall , Fuad Tabba , linux-coco@lists.linux.dev Subject: [RFC PATCH 13/14] arm64: realm: Support nonsecure ITS emulation shared Date: Fri, 27 Jan 2023 11:27:57 +0000 Message-Id: <20230127112758.37891-14-steven.price@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230127112758.37891-1-steven.price@arm.com> References: <20230127112248.136810-1-suzuki.poulose@arm.com> <20230127112758.37891-1-steven.price@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Within a realm guest the ITS is emulated by the host. This means the allocations must have been made available to the host by a call to set_memory_decrypted(). Introduce an allocation function which performs this extra call. Co-developed-by: Suzuki K Poulose Signed-off-by: Suzuki K Poulose Signed-off-by: Steven Price --- drivers/irqchip/irq-gic-v3-its.c | 95 ++++++++++++++++++++++++-------- 1 file changed, 71 insertions(+), 24 deletions(-) diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-= its.c index 973ede0197e3..5f9829376f6c 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -27,6 +28,7 @@ #include #include #include +#include #include #include =20 @@ -165,6 +167,7 @@ struct its_device { struct its_node *its; struct event_lpi_map event_map; void *itt; + u32 itt_order; u32 nr_ites; u32 device_id; bool shared; @@ -200,6 +203,33 @@ static DEFINE_IDA(its_vpeid_ida); #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) #define gic_data_rdist_vlpi_base() (gic_data_rdist_rd_base() + SZ_128K) =20 +static struct page *its_alloc_shared_pages_node(int node, gfp_t gfp, + unsigned int order) +{ + struct page *page; + + if (node =3D=3D NUMA_NO_NODE) + page =3D alloc_pages(gfp, order); + else + page =3D alloc_pages_node(node, gfp, order); + + if (page) + set_memory_decrypted((unsigned long)page_address(page), + 1 << order); + return page; +} + +static struct page *its_alloc_shared_pages(gfp_t gfp, unsigned int order) +{ + return its_alloc_shared_pages_node(NUMA_NO_NODE, gfp, order); +} + +static void its_free_shared_pages(void *addr, unsigned int order) +{ + set_memory_encrypted((unsigned long)addr, 1 << order); + free_pages((unsigned long)addr, order); +} + /* * Skip ITSs that have no vLPIs mapped, unless we're on GICv4.1, as we * always have vSGIs mapped. @@ -2178,7 +2208,8 @@ static struct page *its_allocate_prop_table(gfp_t gfp= _flags) { struct page *prop_page; =20 - prop_page =3D alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ)); + prop_page =3D its_alloc_shared_pages(gfp_flags, + get_order(LPI_PROPBASE_SZ)); if (!prop_page) return NULL; =20 @@ -2189,8 +2220,8 @@ static struct page *its_allocate_prop_table(gfp_t gfp= _flags) =20 static void its_free_prop_table(struct page *prop_page) { - free_pages((unsigned long)page_address(prop_page), - get_order(LPI_PROPBASE_SZ)); + its_free_shared_pages(page_address(prop_page), + get_order(LPI_PROPBASE_SZ)); } =20 static bool gic_check_reserved_range(phys_addr_t addr, unsigned long size) @@ -2312,10 +2343,10 @@ static int its_setup_baser(struct its_node *its, st= ruct its_baser *baser, order =3D get_order(GITS_BASER_PAGES_MAX * psz); } =20 - page =3D alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, order); + page =3D its_alloc_shared_pages_node(its->numa_node, + GFP_KERNEL | __GFP_ZERO, order); if (!page) return -ENOMEM; - base =3D (void *)page_address(page); baser_phys =3D virt_to_phys(base); =20 @@ -2325,7 +2356,7 @@ static int its_setup_baser(struct its_node *its, stru= ct its_baser *baser, /* 52bit PA is supported only when PageSize=3D64K */ if (psz !=3D SZ_64K) { pr_err("ITS: no 52bit PA support when psz=3D%d\n", psz); - free_pages((unsigned long)base, order); + its_free_shared_pages(base, order); return -ENXIO; } =20 @@ -2379,7 +2410,7 @@ static int its_setup_baser(struct its_node *its, stru= ct its_baser *baser, pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", &its->phys_base, its_base_type_string[type], val, tmp); - free_pages((unsigned long)base, order); + its_free_shared_pages(base, order); return -ENXIO; } =20 @@ -2518,8 +2549,8 @@ static void its_free_tables(struct its_node *its) =20 for (i =3D 0; i < GITS_BASER_NR_REGS; i++) { if (its->tables[i].base) { - free_pages((unsigned long)its->tables[i].base, - its->tables[i].order); + its_free_shared_pages(its->tables[i].base, + its->tables[i].order); its->tables[i].base =3D NULL; } } @@ -2778,7 +2809,8 @@ static bool allocate_vpe_l2_table(int cpu, u32 id) =20 /* Allocate memory for 2nd level table */ if (!table[idx]) { - page =3D alloc_pages(GFP_KERNEL | __GFP_ZERO, get_order(psz)); + page =3D its_alloc_shared_pages(GFP_KERNEL | __GFP_ZERO, + get_order(psz)); if (!page) return false; =20 @@ -2897,7 +2929,8 @@ static int allocate_vpe_l1_table(void) =20 pr_debug("np =3D %d, npg =3D %lld, psz =3D %d, epp =3D %d, esz =3D %d\n", np, npg, psz, epp, esz); - page =3D alloc_pages(GFP_ATOMIC | __GFP_ZERO, get_order(np * PAGE_SIZE)); + page =3D its_alloc_shared_pages(GFP_ATOMIC | __GFP_ZERO, + get_order(np * PAGE_SIZE)); if (!page) return -ENOMEM; =20 @@ -2941,8 +2974,8 @@ static struct page *its_allocate_pending_table(gfp_t = gfp_flags) { struct page *pend_page; =20 - pend_page =3D alloc_pages(gfp_flags | __GFP_ZERO, - get_order(LPI_PENDBASE_SZ)); + pend_page =3D its_alloc_shared_pages(gfp_flags | __GFP_ZERO, + get_order(LPI_PENDBASE_SZ)); if (!pend_page) return NULL; =20 @@ -2954,7 +2987,8 @@ static struct page *its_allocate_pending_table(gfp_t = gfp_flags) =20 static void its_free_pending_table(struct page *pt) { - free_pages((unsigned long)page_address(pt), get_order(LPI_PENDBASE_SZ)); + its_free_shared_pages(page_address(pt), + get_order(LPI_PENDBASE_SZ)); } =20 /* @@ -3283,8 +3317,9 @@ static bool its_alloc_table_entry(struct its_node *it= s, =20 /* Allocate memory for 2nd level table */ if (!table[idx]) { - page =3D alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, - get_order(baser->psz)); + page =3D its_alloc_shared_pages_node(its->numa_node, + GFP_KERNEL | __GFP_ZERO, + get_order(baser->psz)); if (!page) return false; =20 @@ -3367,7 +3402,9 @@ static struct its_device *its_create_device(struct it= s_node *its, u32 dev_id, unsigned long *lpi_map =3D NULL; unsigned long flags; u16 *col_map =3D NULL; + struct page *page; void *itt; + int itt_order; int lpi_base; int nr_lpis; int nr_ites; @@ -3379,7 +3416,6 @@ static struct its_device *its_create_device(struct it= s_node *its, u32 dev_id, if (WARN_ON(!is_power_of_2(nvecs))) nvecs =3D roundup_pow_of_two(nvecs); =20 - dev =3D kzalloc(sizeof(*dev), GFP_KERNEL); /* * Even if the device wants a single LPI, the ITT must be * sized as a power of two (and you need at least one bit...). @@ -3387,7 +3423,16 @@ static struct its_device *its_create_device(struct i= ts_node *its, u32 dev_id, nr_ites =3D max(2, nvecs); sz =3D nr_ites * (FIELD_GET(GITS_TYPER_ITT_ENTRY_SIZE, its->typer) + 1); sz =3D max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; - itt =3D kzalloc_node(sz, GFP_KERNEL, its->numa_node); + itt_order =3D get_order(sz); + page =3D its_alloc_shared_pages_node(its->numa_node, + GFP_KERNEL | __GFP_ZERO, + itt_order); + if (!page) + return NULL; + itt =3D (void *)page_address(page); + + dev =3D kzalloc(sizeof(*dev), GFP_KERNEL); + if (alloc_lpis) { lpi_map =3D its_lpi_alloc(nvecs, &lpi_base, &nr_lpis); if (lpi_map) @@ -3399,9 +3444,9 @@ static struct its_device *its_create_device(struct it= s_node *its, u32 dev_id, lpi_base =3D 0; } =20 - if (!dev || !itt || !col_map || (!lpi_map && alloc_lpis)) { + if (!dev || !col_map || (!lpi_map && alloc_lpis)) { kfree(dev); - kfree(itt); + its_free_shared_pages(itt, itt_order); bitmap_free(lpi_map); kfree(col_map); return NULL; @@ -3411,6 +3456,7 @@ static struct its_device *its_create_device(struct it= s_node *its, u32 dev_id, =20 dev->its =3D its; dev->itt =3D itt; + dev->itt_order =3D itt_order; dev->nr_ites =3D nr_ites; dev->event_map.lpi_map =3D lpi_map; dev->event_map.col_map =3D col_map; @@ -3438,7 +3484,7 @@ static void its_free_device(struct its_device *its_de= v) list_del(&its_dev->entry); raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); kfree(its_dev->event_map.col_map); - kfree(its_dev->itt); + its_free_shared_pages(its_dev->itt, its_dev->itt_order); kfree(its_dev); } =20 @@ -5064,8 +5110,9 @@ static int __init its_probe_one(struct resource *res, =20 its->numa_node =3D numa_node; =20 - page =3D alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, - get_order(ITS_CMD_QUEUE_SZ)); + page =3D its_alloc_shared_pages_node(its->numa_node, + GFP_KERNEL | __GFP_ZERO, + get_order(ITS_CMD_QUEUE_SZ)); if (!page) { err =3D -ENOMEM; goto out_unmap_sgir; @@ -5131,7 +5178,7 @@ static int __init its_probe_one(struct resource *res, out_free_tables: its_free_tables(its); out_free_cmd: - free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); + its_free_shared_pages(its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); out_unmap_sgir: if (its->sgir_base) iounmap(its->sgir_base); --=20 2.34.1 From nobody Sun Sep 14 02:03:53 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9739C38142 for ; Fri, 27 Jan 2023 11:30:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233533AbjA0Lax (ORCPT ); Fri, 27 Jan 2023 06:30:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42102 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233514AbjA0L37 (ORCPT ); Fri, 27 Jan 2023 06:29:59 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 7479E7AE40 for ; Fri, 27 Jan 2023 03:29:07 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 649FC1692; Fri, 27 Jan 2023 03:29:29 -0800 (PST) Received: from e122027.cambridge.arm.com (e122027.cambridge.arm.com [10.1.35.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 265293F64C; Fri, 27 Jan 2023 03:28:45 -0800 (PST) From: Steven Price To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: Steven Price , Catalin Marinas , Ard Biesheuvel , Marc Zyngier , Will Deacon , Suzuki K Poulose , James Morse , Oliver Upton , Zenghui Yu , linux-kernel@vger.kernel.org, Joey Gouly , Alexandru Elisei , Christoffer Dall , Fuad Tabba , linux-coco@lists.linux.dev Subject: [RFC PATCH 14/14] HACK: Accept prototype RSI version Date: Fri, 27 Jan 2023 11:27:58 +0000 Message-Id: <20230127112758.37891-15-steven.price@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230127112758.37891-1-steven.price@arm.com> References: <20230127112248.136810-1-suzuki.poulose@arm.com> <20230127112758.37891-1-steven.price@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The upstream RMM currently advertises the major version of an internal prototype (v12.0) rather than the expected version from the RMM architecture specification (v1.0). Add a config option to enable support for the prototype RSI v12.0. Signed-off-by: Steven Price --- arch/arm64/include/asm/rsi_smc.h | 2 ++ arch/arm64/kernel/rsi.c | 5 +++++ arch/arm64/kvm/Kconfig | 8 ++++++++ 3 files changed, 15 insertions(+) diff --git a/arch/arm64/include/asm/rsi_smc.h b/arch/arm64/include/asm/rsi_= smc.h index bc0cdd83f164..baf07f905353 100644 --- a/arch/arm64/include/asm/rsi_smc.h +++ b/arch/arm64/include/asm/rsi_smc.h @@ -29,6 +29,8 @@ #define RSI_ABI_VERSION ((RSI_ABI_VERSION_MAJOR << 16) | \ RSI_ABI_VERSION_MINOR) =20 +#define RSI_LEGACY_ABI_VERSION 0xc0000 + #define RSI_ABI_VERSION_GET_MAJOR(_version) ((_version) >> 16) #define RSI_ABI_VERSION_GET_MINOR(_version) ((_version) & 0xFFFF) =20 diff --git a/arch/arm64/kernel/rsi.c b/arch/arm64/kernel/rsi.c index 1cc292826f2b..45b26f23e706 100644 --- a/arch/arm64/kernel/rsi.c +++ b/arch/arm64/kernel/rsi.c @@ -41,6 +41,11 @@ static bool rsi_version_matches(void) RSI_ABI_VERSION_GET_MAJOR(ver), RSI_ABI_VERSION_GET_MINOR(ver)); =20 +#ifdef CONFIG_RME_USE_PROTOTYPE_HACKS + if (ver =3D=3D RSI_LEGACY_ABI_VERSION) + return true; +#endif + return (ver >=3D RSI_ABI_VERSION && RSI_ABI_VERSION_GET_MAJOR(ver) =3D=3D RSI_ABI_VERSION_MAJOR); } diff --git a/arch/arm64/kvm/Kconfig b/arch/arm64/kvm/Kconfig index 05da3c8f7e88..13858a5047fd 100644 --- a/arch/arm64/kvm/Kconfig +++ b/arch/arm64/kvm/Kconfig @@ -58,6 +58,14 @@ config NVHE_EL2_DEBUG =20 If unsure, say N. =20 +config RME_USE_PROTOTYPE_HACKS + bool "Allow RMM prototype version numbers" + default y + help + For compatibility with the the current RMM code allow versions + numbers from a prototype implementation as well as the expected + version number from the RMM specification. + config PROTECTED_NVHE_STACKTRACE bool "Protected KVM hypervisor stacktraces" depends on NVHE_EL2_DEBUG --=20 2.34.1