From nobody Sun Sep 14 07:45:37 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE91EC38142 for ; Tue, 24 Jan 2023 23:49:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234341AbjAXXtT (ORCPT ); Tue, 24 Jan 2023 18:49:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48748 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234273AbjAXXtQ (ORCPT ); Tue, 24 Jan 2023 18:49:16 -0500 Received: from mail-pf1-x449.google.com (mail-pf1-x449.google.com [IPv6:2607:f8b0:4864:20::449]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C7A2D3 for ; Tue, 24 Jan 2023 15:49:15 -0800 (PST) Received: by mail-pf1-x449.google.com with SMTP id a18-20020a62bd12000000b0056e7b61ec78so7396912pff.17 for ; Tue, 24 Jan 2023 15:49:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=xHI4355sZtl+nMxSrviADFAGPhVPX2cjlZsacGsw9pI=; b=RAAd1Iu4UYOh1XsF8Cfe52BTlzhxuWODb0kKCcvoM9rqv0AU2jMW7496Q3aayEBvSQ neTdVSs7NeBj8zQJoFhhPzVm4joC8mZ8YbsOFxm5lNQKU799j0EnbwviVogAmKs8Ab1c fqS18Q9i6Nn0gHXXGy/B2LkZR7WW+r80VpeFpfcDNbJXHe2wRky4HEb6hHsxiUCk0P8u h9rY0X2k6Jt+brsvgb/OoozZLc/VmyA2i597RiNFtjRGBnXywLqsLHtWIG4FkJethTsc V9zGA5ufPSq/AnK4LrkicqQCJOeYOFd7ga8eRDs+oArYI8rhs6ln+HkHH/9o+/AxO0cD hAXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=xHI4355sZtl+nMxSrviADFAGPhVPX2cjlZsacGsw9pI=; b=AJg6svjFMMOtXIiVK8Cj/VEAogytnq8jBA9zjDIPO03wlZTwdQ6+PwCtKZAZiWX8AW eTp8ILvz9xy7DoOyboSgRO1HrHXCudydzi05X061zjNz9SpGLrsfCOaiz0+qZfAUctJw q3iOVAwLwH2TpULEtgfsc0szB1acDK2KpY7orbriZV3Qqkee+fS5e/UF28FC8GqdIdfR PSIe9MqRC/8ikO9W4Vl/ju4Pwom8qWnlVcP0G1YHnZE7wjfQEQ5hQhxvUduyTdj22C/u UYKnTmhg81uf+ew9Bl4XVfuGFUYFm1ZlL1E2mutiOsp/Xj9re824MtWqadU9ohKydwG1 nKLA== X-Gm-Message-State: AFqh2kp+hhWqTi2MaB3imB2BlVyTUaY0Sg0cWD0lX0qZBTNuySEOVC0n ZhHR2nZGVDNm1dZZT8jTDTUrKVt7ozo= X-Google-Smtp-Source: AMrXdXvYyk1sWuRZ5UE/FSLyVafxn2kpbItwCV1ruZJj5qGZULz4RlmSKkf8HnPq/QxXtVj4pEO2mBr8YmE= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:aa7:972c:0:b0:579:6402:5b39 with SMTP id k12-20020aa7972c000000b0057964025b39mr3200002pfg.11.1674604155069; Tue, 24 Jan 2023 15:49:15 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 24 Jan 2023 23:49:00 +0000 In-Reply-To: <20230124234905.3774678-1-seanjc@google.com> Mime-Version: 1.0 References: <20230124234905.3774678-1-seanjc@google.com> X-Mailer: git-send-email 2.39.1.456.gfc5497dd1b-goog Message-ID: <20230124234905.3774678-2-seanjc@google.com> Subject: [PATCH 1/6] KVM: x86/pmu: Cap kvm_pmu_cap.num_counters_gp at KVM's internal max From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini , Vitaly Kuznetsov Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Aaron Lewis , Weijiang Yang , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Limit kvm_pmu_cap.num_counters_gp during kvm_init_pmu_capability() based on the vendor PMU capabilities so that consuming num_counters_gp naturally does the right thing. This fixes a mostly theoretical bug where KVM could over-report its PMU support in KVM_GET_SUPPORTED_CPUID for leaf 0xA, e.g. if the number of counters reported by perf is greater than KVM's hardcoded internal limit. Incorporating input from the AMD PMU also avoids over-reporting MSRs to save when running on AMD. Signed-off-by: Sean Christopherson --- arch/x86/kvm/pmu.h | 5 ++++- arch/x86/kvm/svm/pmu.c | 1 + arch/x86/kvm/vmx/pmu_intel.c | 1 + arch/x86/kvm/x86.c | 6 +++--- 4 files changed, 9 insertions(+), 4 deletions(-) diff --git a/arch/x86/kvm/pmu.h b/arch/x86/kvm/pmu.h index 30bfccc6df60..8c04e9109db0 100644 --- a/arch/x86/kvm/pmu.h +++ b/arch/x86/kvm/pmu.h @@ -42,6 +42,7 @@ struct kvm_pmu_ops { void (*cleanup)(struct kvm_vcpu *vcpu); =20 const u64 EVENTSEL_EVENT; + const int MAX_NR_GP_COUNTERS; }; =20 void kvm_pmu_ops_update(const struct kvm_pmu_ops *pmu_ops); @@ -163,7 +164,7 @@ static inline bool pmc_speculative_in_use(struct kvm_pm= c *pmc) =20 extern struct x86_pmu_capability kvm_pmu_cap; =20 -static inline void kvm_init_pmu_capability(void) +static inline void kvm_init_pmu_capability(const struct kvm_pmu_ops *pmu_o= ps) { bool is_intel =3D boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_INTEL; =20 @@ -182,6 +183,8 @@ static inline void kvm_init_pmu_capability(void) } =20 kvm_pmu_cap.version =3D min(kvm_pmu_cap.version, 2); + kvm_pmu_cap.num_counters_gp =3D min(kvm_pmu_cap.num_counters_gp, + pmu_ops->MAX_NR_GP_COUNTERS); kvm_pmu_cap.num_counters_fixed =3D min(kvm_pmu_cap.num_counters_fixed, KVM_PMC_MAX_FIXED); } diff --git a/arch/x86/kvm/svm/pmu.c b/arch/x86/kvm/svm/pmu.c index 5da8c292e3e3..cc77a0681800 100644 --- a/arch/x86/kvm/svm/pmu.c +++ b/arch/x86/kvm/svm/pmu.c @@ -232,4 +232,5 @@ struct kvm_pmu_ops amd_pmu_ops __initdata =3D { .init =3D amd_pmu_init, .reset =3D amd_pmu_reset, .EVENTSEL_EVENT =3D AMD64_EVENTSEL_EVENT, + .MAX_NR_GP_COUNTERS =3D KVM_AMD_PMC_MAX_GENERIC, }; diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index 7980fda3978d..5d525d677967 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -812,4 +812,5 @@ struct kvm_pmu_ops intel_pmu_ops __initdata =3D { .deliver_pmi =3D intel_pmu_deliver_pmi, .cleanup =3D intel_pmu_cleanup, .EVENTSEL_EVENT =3D ARCH_PERFMON_EVENTSEL_EVENT, + .MAX_NR_GP_COUNTERS =3D KVM_INTEL_PMC_MAX_GENERIC, }; diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index da02a08e21b5..ad95ce92a154 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -7061,12 +7061,12 @@ static void kvm_init_msr_list(void) break; case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR_MAX: if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=3D - min(KVM_INTEL_PMC_MAX_GENERIC, kvm_pmu_cap.num_counters_gp)) + kvm_pmu_cap.num_counters_gp) continue; break; case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL_MAX: if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=3D - min(KVM_INTEL_PMC_MAX_GENERIC, kvm_pmu_cap.num_counters_gp)) + kvm_pmu_cap.num_counters_gp) continue; break; case MSR_IA32_XFD: @@ -9386,7 +9386,7 @@ static int __kvm_x86_vendor_init(struct kvm_x86_init_= ops *ops) if (boot_cpu_has(X86_FEATURE_XSAVES)) rdmsrl(MSR_IA32_XSS, host_xss); =20 - kvm_init_pmu_capability(); + kvm_init_pmu_capability(ops->pmu_ops); =20 r =3D ops->hardware_setup(); if (r !=3D 0) --=20 2.39.1.456.gfc5497dd1b-goog From nobody Sun Sep 14 07:45:37 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 09417C54EED for ; Tue, 24 Jan 2023 23:49:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234468AbjAXXtZ (ORCPT ); Tue, 24 Jan 2023 18:49:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48836 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234326AbjAXXtS (ORCPT ); Tue, 24 Jan 2023 18:49:18 -0500 Received: from mail-pf1-x44a.google.com (mail-pf1-x44a.google.com [IPv6:2607:f8b0:4864:20::44a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B29EB46A for ; Tue, 24 Jan 2023 15:49:17 -0800 (PST) Received: by mail-pf1-x44a.google.com with SMTP id bt23-20020a056a00439700b0058e23ca109fso4910013pfb.19 for ; Tue, 24 Jan 2023 15:49:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=ezITNigk0nCUK1P2pm1bMFWUxaZdj3btWqkAvgj3Ekg=; b=M8JljCyrd+ISLaFzsLrzmO6ZC+OOlCGhA7o8j565gCVFoFVY8UKbeS77PE6odaXGPw 0Ol3Eqrkp1yeW03OupoRu8c9851edOve1tk88KY8YHup2IqmC1PWm7iNeYSx6eVr6YkS fqILlYYFSjcPQVyxmmUg2wO9MldKEwf9sMMhucAw/qGPE9rTJZOm5udFoet906siuU/n 7MBJ+rlOtbS8+sgw8Wbk2eMmhB2BIpCWejjRxz6SoxXm98I9LXiIh4UqaAnuxElH47oz Ku+/pznQ6+O0BIVbv684KV5jtnOsFr4GNP6O6e13eTrG1crEcttKHsOhDs3Izy1h2P2M iF9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=ezITNigk0nCUK1P2pm1bMFWUxaZdj3btWqkAvgj3Ekg=; b=shEVz/NTZaagAUGUG+s5O7cs41KDJbZDU4da+Al/QEonP68ewTo7vYhRPewOzDd9Qb 8Q2u1hZ0sfcXIYL8umPwTVyh+0h8hyJEmHZQaa10gXETW3Fx27yx8Y516AS8P3kFDpxj f0g7GqVHnNVBzmBVS9rU8T/VXLg3CjOwFM5mVXgFTizWRSdn0AVMIiXfsws+ei2zRqv+ oXP732SoYUUk/Ob+FW5OHnSpItXlk/U3Qa6fI576aC5OWbvknaMpu2l3YvjoSH9uBoPT aJ6pbVrP5RZ1WPWg4ZXESJc7jz86PnoL5/+u5h6XwgtPQasLo00QSBfSjiJpkhQ72X/K HE8w== X-Gm-Message-State: AFqh2kpegchc8uTPzT1rXeA/QsR02KPqkpLTb7LuLtqq2RNqiqMRtcmR yCXvTHtmTRFSPnh7gyiKGuRDU83MlaA= X-Google-Smtp-Source: AMrXdXuDcHqUYEP9AhwzvxiuxnjKVX9UJDsQBmXvp/p2qxuA128ge6f0FI5nqk4JzQ4zBIXxIZ21NaWI5rQ= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a05:6a00:b96:b0:58d:b8f6:6f6d with SMTP id g22-20020a056a000b9600b0058db8f66f6dmr3046704pfj.32.1674604156683; Tue, 24 Jan 2023 15:49:16 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 24 Jan 2023 23:49:01 +0000 In-Reply-To: <20230124234905.3774678-1-seanjc@google.com> Mime-Version: 1.0 References: <20230124234905.3774678-1-seanjc@google.com> X-Mailer: git-send-email 2.39.1.456.gfc5497dd1b-goog Message-ID: <20230124234905.3774678-3-seanjc@google.com> Subject: [PATCH 2/6] KVM: x86/pmu: Gate all "unimplemented MSR" prints on report_ignored_msrs From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini , Vitaly Kuznetsov Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Aaron Lewis , Weijiang Yang , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add helpers to print unimplemented MSR accesses and condition all such prints on report_ignored_msrs, i.e. honor userspace's request to not print unimplemented MSRs. Even though vcpu_unimpl() is ratelimited, printing can still be problematic, e.g. if a print gets stalled when host userspace is writing MSRs during live migration, an effective stall can result in very noticeable disruption in the guest. E.g. the profile below was taken while calling KVM_SET_MSRS on the PMU counters while the PMU was disabled in KVM. - 99.75% 0.00% [.] __ioctl - __ioctl - 99.74% entry_SYSCALL_64_after_hwframe do_syscall_64 sys_ioctl - do_vfs_ioctl - 92.48% kvm_vcpu_ioctl - kvm_arch_vcpu_ioctl - 85.12% kvm_set_msr_ignored_check svm_set_msr kvm_set_msr_common printk vprintk_func vprintk_default vprintk_emit console_unlock call_console_drivers univ8250_console_write serial8250_console_write uart_console_write Reported-by: Aaron Lewis Signed-off-by: Sean Christopherson Reviewed-by: Vitaly Kuznetsov --- arch/x86/kvm/hyperv.c | 10 ++++------ arch/x86/kvm/svm/svm.c | 5 ++--- arch/x86/kvm/vmx/vmx.c | 4 +--- arch/x86/kvm/x86.c | 18 +++++------------- arch/x86/kvm/x86.h | 12 ++++++++++++ 5 files changed, 24 insertions(+), 25 deletions(-) diff --git a/arch/x86/kvm/hyperv.c b/arch/x86/kvm/hyperv.c index 71aff0edc0ed..3eb8caf87ee4 100644 --- a/arch/x86/kvm/hyperv.c +++ b/arch/x86/kvm/hyperv.c @@ -1430,8 +1430,7 @@ static int kvm_hv_set_msr_pw(struct kvm_vcpu *vcpu, u= 32 msr, u64 data, case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER: return syndbg_set_msr(vcpu, msr, data, host); default: - vcpu_unimpl(vcpu, "Hyper-V unhandled wrmsr: 0x%x data 0x%llx\n", - msr, data); + kvm_pr_unimpl_wrmsr(vcpu, msr, data); return 1; } return 0; @@ -1552,8 +1551,7 @@ static int kvm_hv_set_msr(struct kvm_vcpu *vcpu, u32 = msr, u64 data, bool host) return 1; break; default: - vcpu_unimpl(vcpu, "Hyper-V unhandled wrmsr: 0x%x data 0x%llx\n", - msr, data); + kvm_pr_unimpl_wrmsr(vcpu, msr, data); return 1; } =20 @@ -1608,7 +1606,7 @@ static int kvm_hv_get_msr_pw(struct kvm_vcpu *vcpu, u= 32 msr, u64 *pdata, case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER: return syndbg_get_msr(vcpu, msr, pdata, host); default: - vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr); + kvm_pr_unimpl_rdmsr(vcpu, msr); return 1; } =20 @@ -1673,7 +1671,7 @@ static int kvm_hv_get_msr(struct kvm_vcpu *vcpu, u32 = msr, u64 *pdata, data =3D APIC_BUS_FREQUENCY; break; default: - vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr); + kvm_pr_unimpl_rdmsr(vcpu, msr); return 1; } *pdata =3D data; diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index d13cf53e7390..dd21e8b1a259 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -3015,8 +3015,7 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct = msr_data *msr) break; case MSR_IA32_DEBUGCTLMSR: if (!lbrv) { - vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTL 0x%llx, nop\n", - __func__, data); + kvm_pr_unimpl_wrmsr(vcpu, ecx, data); break; } if (data & DEBUGCTL_RESERVED_BITS) @@ -3045,7 +3044,7 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct = msr_data *msr) case MSR_VM_CR: return svm_set_vm_cr(vcpu, data); case MSR_VM_IGNNE: - vcpu_unimpl(vcpu, "unimplemented wrmsr: 0x%x data 0x%llx\n", ecx, data); + kvm_pr_unimpl_wrmsr(vcpu, ecx, data); break; case MSR_AMD64_DE_CFG: { struct kvm_msr_entry msr_entry; diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index c788aa382611..8f0f67c75f35 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -2206,9 +2206,7 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct = msr_data *msr_info) =20 invalid =3D data & ~vmx_get_supported_debugctl(vcpu, msr_info->host_init= iated); if (invalid & (DEBUGCTLMSR_BTF|DEBUGCTLMSR_LBR)) { - if (report_ignored_msrs) - vcpu_unimpl(vcpu, "%s: BTF|LBR in IA32_DEBUGCTLMSR 0x%llx, nop\n", - __func__, data); + kvm_pr_unimpl_wrmsr(vcpu, msr_index, data); data &=3D ~(DEBUGCTLMSR_BTF|DEBUGCTLMSR_LBR); invalid &=3D ~(DEBUGCTLMSR_BTF|DEBUGCTLMSR_LBR); } diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index ad95ce92a154..d4a610ffe2b8 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3560,7 +3560,6 @@ static void record_steal_time(struct kvm_vcpu *vcpu) =20 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) { - bool pr =3D false; u32 msr =3D msr_info->index; u64 data =3D msr_info->data; =20 @@ -3606,15 +3605,13 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struc= t msr_data *msr_info) if (data =3D=3D BIT_ULL(18)) { vcpu->arch.msr_hwcr =3D data; } else if (data !=3D 0) { - vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n", - data); + kvm_pr_unimpl_wrmsr(vcpu, msr, data); return 1; } break; case MSR_FAM10H_MMIO_CONF_BASE: if (data !=3D 0) { - vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: " - "0x%llx\n", data); + kvm_pr_unimpl_wrmsr(vcpu, msr, data); return 1; } break; @@ -3794,16 +3791,13 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struc= t msr_data *msr_info) =20 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3: case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1: - pr =3D true; - fallthrough; case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3: case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1: if (kvm_pmu_is_valid_msr(vcpu, msr)) return kvm_pmu_set_msr(vcpu, msr_info); =20 - if (pr || data !=3D 0) - vcpu_unimpl(vcpu, "disabled perfctr wrmsr: " - "0x%x data 0x%llx\n", msr, data); + if (data) + kvm_pr_unimpl_wrmsr(vcpu, msr, data); break; case MSR_K7_CLK_CTL: /* @@ -3831,9 +3825,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct = msr_data *msr_info) /* Drop writes to this legacy MSR -- see rdmsr * counterpart for further detail. */ - if (report_ignored_msrs) - vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n", - msr, data); + kvm_pr_unimpl_wrmsr(vcpu, msr, data); break; case MSR_AMD64_OSVW_ID_LENGTH: if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW)) diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h index 9de72586f406..f3554bf05201 100644 --- a/arch/x86/kvm/x86.h +++ b/arch/x86/kvm/x86.h @@ -331,6 +331,18 @@ extern bool report_ignored_msrs; =20 extern bool eager_page_split; =20 +static inline void kvm_pr_unimpl_wrmsr(struct kvm_vcpu *vcpu, u32 msr, u64= data) +{ + if (report_ignored_msrs) + vcpu_unimpl(vcpu, "Unhandled WRMSR(0x%x) =3D 0x%llx\n", msr, data); +} + +static inline void kvm_pr_unimpl_rdmsr(struct kvm_vcpu *vcpu, u32 msr) +{ + if (report_ignored_msrs) + vcpu_unimpl(vcpu, "Unhandled RDMSR(0x%x)\n", msr); +} + static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec) { return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult, --=20 2.39.1.456.gfc5497dd1b-goog From nobody Sun Sep 14 07:45:37 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 523C1C61DA0 for ; Tue, 24 Jan 2023 23:49:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234571AbjAXXt1 (ORCPT ); Tue, 24 Jan 2023 18:49:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49092 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234345AbjAXXtW (ORCPT ); Tue, 24 Jan 2023 18:49:22 -0500 Received: from mail-pg1-x54a.google.com (mail-pg1-x54a.google.com [IPv6:2607:f8b0:4864:20::54a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 16FD87A90 for ; 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charset="utf-8" Move all potential to-be-saved PMU MSRs into a separate array so that a future patch can easily omit all PMU MSRs from the list when the PMU is disabled. No functional change intended. Signed-off-by: Sean Christopherson --- arch/x86/kvm/x86.c | 153 ++++++++++++++++++++++++--------------------- 1 file changed, 82 insertions(+), 71 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index d4a610ffe2b8..9b6e1af63531 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -1419,7 +1419,7 @@ EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc); * may depend on host virtualization features rather than host cpu feature= s. */ =20 -static const u32 msrs_to_save_all[] =3D { +static const u32 msrs_to_save_base[] =3D { MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP, MSR_STAR, #ifdef CONFIG_X86_64 @@ -1436,6 +1436,10 @@ static const u32 msrs_to_save_all[] =3D { MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B, MSR_IA32_UMWAIT_CONTROL, =20 + MSR_IA32_XFD, MSR_IA32_XFD_ERR, +}; + +static const u32 msrs_to_save_pmu[] =3D { MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1, MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS, @@ -1460,11 +1464,10 @@ static const u32 msrs_to_save_all[] =3D { MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5, MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2, MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5, - - MSR_IA32_XFD, MSR_IA32_XFD_ERR, }; =20 -static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)]; +static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_base) + + ARRAY_SIZE(msrs_to_save_pmu)]; static unsigned num_msrs_to_save; =20 static const u32 emulated_msrs_all[] =3D { @@ -6994,84 +6997,92 @@ long kvm_arch_vm_ioctl(struct file *filp, return r; } =20 -static void kvm_init_msr_list(void) +static void kvm_probe_msr_to_save(u32 msr_index) { u32 dummy[2]; + + if (rdmsr_safe(msr_index, &dummy[0], &dummy[1])) + return; + + /* + * Even MSRs that are valid in the host may not be exposed to guests in + * some cases. + */ + switch (msr_index) { + case MSR_IA32_BNDCFGS: + if (!kvm_mpx_supported()) + return; + break; + case MSR_TSC_AUX: + if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) && + !kvm_cpu_cap_has(X86_FEATURE_RDPID)) + return; + break; + case MSR_IA32_UMWAIT_CONTROL: + if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG)) + return; + break; + case MSR_IA32_RTIT_CTL: + case MSR_IA32_RTIT_STATUS: + if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT)) + return; + break; + case MSR_IA32_RTIT_CR3_MATCH: + if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) || + !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering)) + return; + break; + case MSR_IA32_RTIT_OUTPUT_BASE: + case MSR_IA32_RTIT_OUTPUT_MASK: + if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) || + (!intel_pt_validate_hw_cap(PT_CAP_topa_output) && + !intel_pt_validate_hw_cap(PT_CAP_single_range_output))) + return; + break; + case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B: + if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) || + (msr_index - MSR_IA32_RTIT_ADDR0_A >=3D + intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)) + return; + break; + case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR_MAX: + if (msr_index - MSR_ARCH_PERFMON_PERFCTR0 >=3D + kvm_pmu_cap.num_counters_gp) + return; + break; + case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL_MAX: + if (msr_index - MSR_ARCH_PERFMON_EVENTSEL0 >=3D + kvm_pmu_cap.num_counters_gp) + return; + break; + case MSR_IA32_XFD: + case MSR_IA32_XFD_ERR: + if (!kvm_cpu_cap_has(X86_FEATURE_XFD)) + return; + break; + default: + break; + } + + msrs_to_save[num_msrs_to_save++] =3D msr_index; +} + +static void kvm_init_msr_list(void) +{ unsigned i; =20 BUILD_BUG_ON_MSG(KVM_PMC_MAX_FIXED !=3D 3, - "Please update the fixed PMCs in msrs_to_saved_all[]"); + "Please update the fixed PMCs in msrs_to_save_pmu[]"); =20 num_msrs_to_save =3D 0; num_emulated_msrs =3D 0; num_msr_based_features =3D 0; =20 - for (i =3D 0; i < ARRAY_SIZE(msrs_to_save_all); i++) { - if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0) - continue; + for (i =3D 0; i < ARRAY_SIZE(msrs_to_save_base); i++) + kvm_probe_msr_to_save(msrs_to_save_base[i]); =20 - /* - * Even MSRs that are valid in the host may not be exposed - * to the guests in some cases. - */ - switch (msrs_to_save_all[i]) { - case MSR_IA32_BNDCFGS: - if (!kvm_mpx_supported()) - continue; - break; - case MSR_TSC_AUX: - if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) && - !kvm_cpu_cap_has(X86_FEATURE_RDPID)) - continue; - break; - case MSR_IA32_UMWAIT_CONTROL: - if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG)) - continue; - break; - case MSR_IA32_RTIT_CTL: - case MSR_IA32_RTIT_STATUS: - if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT)) - continue; - break; - case MSR_IA32_RTIT_CR3_MATCH: - if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) || - !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering)) - continue; - break; - case MSR_IA32_RTIT_OUTPUT_BASE: - case MSR_IA32_RTIT_OUTPUT_MASK: - if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) || - (!intel_pt_validate_hw_cap(PT_CAP_topa_output) && - !intel_pt_validate_hw_cap(PT_CAP_single_range_output))) - continue; - break; - case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B: - if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) || - msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=3D - intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2) - continue; - break; - case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR_MAX: - if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=3D - kvm_pmu_cap.num_counters_gp) - continue; - break; - case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL_MAX: - if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=3D - kvm_pmu_cap.num_counters_gp) - continue; - break; - case MSR_IA32_XFD: - case MSR_IA32_XFD_ERR: - if (!kvm_cpu_cap_has(X86_FEATURE_XFD)) - continue; - break; - default: - break; - } - - msrs_to_save[num_msrs_to_save++] =3D msrs_to_save_all[i]; - } + for (i =3D 0; i < ARRAY_SIZE(msrs_to_save_pmu); i++) + kvm_probe_msr_to_save(msrs_to_save_pmu[i]); =20 for (i =3D 0; i < ARRAY_SIZE(emulated_msrs_all); i++) { if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i])) --=20 2.39.1.456.gfc5497dd1b-goog From nobody Sun Sep 14 07:45:37 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5C51C54E94 for ; Tue, 24 Jan 2023 23:49:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234662AbjAXXti (ORCPT ); Tue, 24 Jan 2023 18:49:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49146 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234400AbjAXXtX (ORCPT ); Tue, 24 Jan 2023 18:49:23 -0500 Received: from mail-pg1-x549.google.com (mail-pg1-x549.google.com [IPv6:2607:f8b0:4864:20::549]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8AD9D49022 for ; Tue, 24 Jan 2023 15:49:20 -0800 (PST) Received: by mail-pg1-x549.google.com with SMTP id e184-20020a6369c1000000b0049de6cfcc40so7519180pgc.19 for ; Tue, 24 Jan 2023 15:49:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=cSFedQsv7Wc1M6mfIq8Uerd1CseDG+3+LjpR3/a1jI4=; b=Vp+bCCyRCOzXxx9AZRk/kLf2yoM9R2H7MV3TG8iO4ixZfrmXyu3VH5OT9URCnFT6Ao SnOE2UHK2AnZMfppSvxPBExJYZ4Fxe9T9DFqELJjMzTPwm3THgO6m/pOUi4AULV2sZ1b 5BNeuoAAa7KPpu6EiXS3gy8WFApTYM5YBCvJTG6h76zjPe9l+cRD0Zp1KCyUns7fe6nX VX1PrSIkSYQxk0xiGxVaWwC1UOgh09tR1C/pu6yybMIHQDasONsVEtBIkxqac5Q4XQoh QATfefxt08qKbI42PfLX9jDT1Nf1BnuHKNDKAqU040eTQcTdnTjdSThoIhCikZ1drvSv bb7w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=cSFedQsv7Wc1M6mfIq8Uerd1CseDG+3+LjpR3/a1jI4=; b=fUQLB5PwoVt4kkBGvUmTTcDZIMWjCx1l4ys+ntLOvMnQ3wEfQAgM+oeZyLgMsu0QTv gsaFrLiyzjTa/TuGAsrgTKgmEVVW79kAXiz1eJS8xH/O1vSIGUsJ02BzleRNwGymLI40 bI7qn91jR4U9W+vuFl3Ir9rixBoXWr1GIwnJhZFtu8s8kwmzJXwS4V/UEGCqJS8ObLlc T+EvUCD9n9/IJewza4Vk6MWYqf3MJcbvbBMpk87W9cvUYF3npOI1gklYSU5PyZ1ixFbB RcRRqv1Xr4dTSMfWyzTVfLTycbTWjHh2sAX8JHoNQ4Oy2sjd38WUu6QE2EoajobsXM8Y x98g== X-Gm-Message-State: AFqh2ko3NQjkk49Q7KScQ4gVZweJ4XZfzK4wnwNlR/KvbyxHHqHHBtN0 nlTxumFP7vNoK8KrRgqgVjAjYZs4ELs= X-Google-Smtp-Source: AMrXdXv339G7NMnbhLg4zibqJM/2hsDjjR6Pg293Q4PQitRC5ZTlozoeYq7nwj6TlxtlrhWWEQeAgD92yFo= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:902:bd97:b0:192:9e63:e2bc with SMTP id q23-20020a170902bd9700b001929e63e2bcmr3138979pls.11.1674604159781; Tue, 24 Jan 2023 15:49:19 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 24 Jan 2023 23:49:03 +0000 In-Reply-To: <20230124234905.3774678-1-seanjc@google.com> Mime-Version: 1.0 References: <20230124234905.3774678-1-seanjc@google.com> X-Mailer: git-send-email 2.39.1.456.gfc5497dd1b-goog Message-ID: <20230124234905.3774678-5-seanjc@google.com> Subject: [PATCH 4/6] KVM: x86/pmu: Don't tell userspace to save PMU MSRs if PMU is disabled From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini , Vitaly Kuznetsov Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Aaron Lewis , Weijiang Yang , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Omit all PMU MSRs from the "MSRs to save" list if the PMU is disabled so that userspace doesn't waste time saving and restoring dummy values. KVM provides "error" semantics (read zeros, drop writes) for such known-but- unsupported MSRs, i.e. has fudged around this issue for quite some time. Keep the "error" semantics as-is for now, the logic will be cleaned up in a separate patch. Cc: Aaron Lewis Cc: Weijiang Yang Signed-off-by: Sean Christopherson --- arch/x86/kvm/x86.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 9b6e1af63531..25da2cc09e55 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -7081,8 +7081,10 @@ static void kvm_init_msr_list(void) for (i =3D 0; i < ARRAY_SIZE(msrs_to_save_base); i++) kvm_probe_msr_to_save(msrs_to_save_base[i]); =20 - for (i =3D 0; i < ARRAY_SIZE(msrs_to_save_pmu); i++) - kvm_probe_msr_to_save(msrs_to_save_pmu[i]); + if (enable_pmu) { + for (i =3D 0; i < ARRAY_SIZE(msrs_to_save_pmu); i++) + kvm_probe_msr_to_save(msrs_to_save_pmu[i]); + } =20 for (i =3D 0; i < ARRAY_SIZE(emulated_msrs_all); i++) { if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i])) --=20 2.39.1.456.gfc5497dd1b-goog From nobody Sun Sep 14 07:45:37 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27933C38142 for ; Tue, 24 Jan 2023 23:49:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234627AbjAXXtg (ORCPT ); Tue, 24 Jan 2023 18:49:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49214 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234493AbjAXXtZ (ORCPT ); Tue, 24 Jan 2023 18:49:25 -0500 Received: from mail-pj1-x104a.google.com (mail-pj1-x104a.google.com [IPv6:2607:f8b0:4864:20::104a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2E01A518E0 for ; Tue, 24 Jan 2023 15:49:21 -0800 (PST) Received: by mail-pj1-x104a.google.com with SMTP id x12-20020a17090abc8c00b0022bfadb3a4dso149669pjr.0 for ; Tue, 24 Jan 2023 15:49:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=etFpX/482XpVxpk8+X7x9LZK6GHklrmOWmBG2Y9l9JY=; b=PaPFcjkY84c1BKENp3ubJyva/NBLjPo7sEgZagcT9qRPJXepm8n4k89Wf8MPHqwKV2 xL2OgFZmaF2JpR1nfmxlaWEWDb0SwBh4jQ84r9tWNS3F4rOTph2CtS2Ud0rtf2oY/pk+ 65GpkRiNS+I9N4JGjXmB5WmUJe4XN0xc9GAjoJiJNVAMjRnWDoc2gK7HW6T6w8zwXL3O 553HY1KeSy3AINSbZpAOVOFSwHpc2Tin9dHIK7KsOMQXnKKLDahp8tBeTiCMoPoChrwY 5GpuYETk271PwyEYZ7xzfyOBnY6mgTYC88yDxdYQTM2LFZt6YibyDdBDND7jAHi3UFpA p4mA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=etFpX/482XpVxpk8+X7x9LZK6GHklrmOWmBG2Y9l9JY=; b=N3zeGFocWjhtczuFdwKNzGUFNHUJG/VjAeG3ZJ915KNdtBE9Kqlgy5vvuaIQLX5/i1 ag9NWSdLuwO26HvDqlbHg4yuD0TxVn6r0sj/K74F0DtR6Em/CByQCdmDGQkCxMIuG0Sy DagUYkjbPvQF1c8XA/UOzfT1KJwvhds18CJFbZLdO2uceZ2Z8igLn3GQOj75egKekGep GjhYsYy7FdxocS7ch+x+8m+QTcjM7n4gOjQiGg23eC8WrYdUL0wrDFSQ2OKpvfSUPqTI 5Nmv0aUAUsq/w2zENF0drlnJ0C8x3uSwxftTsPO/dLMb5VLyjYEPTFu9f0Wv9WR4vPb8 vNvg== X-Gm-Message-State: AO0yUKXGSfATNSIv9E+DkbHe2O2U8jxIPm8fUHsz0BamL6oNhmPUKq1g /ocCtTQGjqfj9Tleo9DndXC5ebzQ5BE= X-Google-Smtp-Source: AK7set8SaE2MZIRg9LgmCIwbSkWZ/LgOB2ipKmhXTLetCVx/z8v1pT85QcQW4E3nEHJMgo6DIweuCZPB1ls= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a63:131e:0:b0:4d9:ed5e:5e99 with SMTP id i30-20020a63131e000000b004d9ed5e5e99mr11422pgl.69.1674604161397; Tue, 24 Jan 2023 15:49:21 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 24 Jan 2023 23:49:04 +0000 In-Reply-To: <20230124234905.3774678-1-seanjc@google.com> Mime-Version: 1.0 References: <20230124234905.3774678-1-seanjc@google.com> X-Mailer: git-send-email 2.39.1.456.gfc5497dd1b-goog Message-ID: <20230124234905.3774678-6-seanjc@google.com> Subject: [PATCH 5/6] KVM: x86/pmu: Don't tell userspace to save MSRs for non-existent fixed PMCs From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini , Vitaly Kuznetsov Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Aaron Lewis , Weijiang Yang , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Like Xu Limit the set of MSRs for fixed PMU counters based on the number of fixed counters actually supported by the host so that userspace doesn't waste time saving and restoring dummy values. Signed-off-by: Like Xu [sean: split for !enable_pmu logic, drop min(), write changelog] Signed-off-by: Sean Christopherson --- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/x86.c | 5 +++++ 2 files changed, 6 insertions(+) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_hos= t.h index cd0151e6af62..adb92fc4d7c9 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -514,6 +514,7 @@ struct kvm_pmc { #define MSR_ARCH_PERFMON_PERFCTR_MAX (MSR_ARCH_PERFMON_PERFCTR0 + KVM_INTE= L_PMC_MAX_GENERIC - 1) #define MSR_ARCH_PERFMON_EVENTSEL_MAX (MSR_ARCH_PERFMON_EVENTSEL0 + KVM_IN= TEL_PMC_MAX_GENERIC - 1) #define KVM_PMC_MAX_FIXED 3 +#define MSR_ARCH_PERFMON_FIXED_CTR_MAX (MSR_ARCH_PERFMON_FIXED_CTR0 + KVM_= PMC_MAX_FIXED - 1) #define KVM_AMD_PMC_MAX_GENERIC 6 struct kvm_pmu { unsigned nr_arch_gp_counters; diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 25da2cc09e55..3c49c86b973d 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -7055,6 +7055,11 @@ static void kvm_probe_msr_to_save(u32 msr_index) kvm_pmu_cap.num_counters_gp) return; break; + case MSR_ARCH_PERFMON_FIXED_CTR0 ... MSR_ARCH_PERFMON_FIXED_CTR_MAX: + if (msr_index - MSR_ARCH_PERFMON_FIXED_CTR0 >=3D + kvm_pmu_cap.num_counters_fixed) + return; + break; case MSR_IA32_XFD: case MSR_IA32_XFD_ERR: if (!kvm_cpu_cap_has(X86_FEATURE_XFD)) --=20 2.39.1.456.gfc5497dd1b-goog From nobody Sun Sep 14 07:45:37 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D848C54E94 for ; Tue, 24 Jan 2023 23:49:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233586AbjAXXtd (ORCPT ); Tue, 24 Jan 2023 18:49:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49242 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234527AbjAXXtZ (ORCPT ); Tue, 24 Jan 2023 18:49:25 -0500 Received: from mail-pf1-x449.google.com (mail-pf1-x449.google.com [IPv6:2607:f8b0:4864:20::449]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9AA2E49404 for ; Tue, 24 Jan 2023 15:49:23 -0800 (PST) Received: by mail-pf1-x449.google.com with SMTP id f15-20020a62380f000000b0058db55a8d7aso7457649pfa.21 for ; Tue, 24 Jan 2023 15:49:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=UzMRX5SFUfOVkL2DhNd2WmgacyEPpUxAyESmr0cYTPo=; b=U+2hjRjwdAw4rgSwJT4rTLx+XWZ6VA8xRr9CDH5MmtQ0DMC6I8AZu0utxcCMToxUt0 qEvmcAkPf0Z2PX0nGGVKoNQUWR9l3i/D88vwPrfs8FLHGmwsaNXkyQ4SaZ0wNIo8qhJZ R8B0xXP4sv2OG4APlw8RdWx2ZdMWW2NUv5HfnHJ7M+2LhRT5WIz/p0YGDe3qGGVS8kRc WcwkOSYbpY2N7QzFWXEuHkLkmO9KTO0XKtPlZ+kjdrEluzgZ2iPKY0u7rrxc+5NhusWx XxSaFjfe7ss8AqeFDPdA+yjfi8DZ9I7MtXqYDCSNAlrfv5iKsocGtMA8YD6lzk6vGcYX foLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=UzMRX5SFUfOVkL2DhNd2WmgacyEPpUxAyESmr0cYTPo=; b=UC8ZjWm8pnHVhI4umI9O/qEFpAKw4fVvjzS2/+SYERUlDDuWTpDnDQIgAQpoGy0rag UC3Kc9mh5e1+FWbwaE5LFgl5KQcYMhItE7d92gUZQceNLfXMxc2VJyu5m+ozghN2IbX9 SQ08/8v7Lur17yir0L+CZ8BIEFFI4rbv8mfo+P4sZVYLYGguv7hTNlJxvlv+GuSs1E3G u4JI4mUvRRf5JSUNcBq3DYHBborQpWknl3Giv0lo0KYAeKTd8ppBa4gTmvF/mLC2rvFz 6DcSqd9xpkmUWOlf2/VXSg+FlLaFZxw0mz4NUjVcpbq1eic6CXQdJSAYJEcazbSMEK7H DqIQ== X-Gm-Message-State: AFqh2kplOvdjSXGiIX0StWx3/IvgkYEgNm6X/BpkfRGsTo83lSwednlS D7wJLEuP/c0MM8mXQSujUz/FGd9NSwk= X-Google-Smtp-Source: AMrXdXuK/2YHhj4eTdRh15QrAi1gGGAbhQFHxWDpJQGzDuXV8X4TYOIqARvH1aClbII5MaCT1Ll9QeXYTuY= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a05:6a00:4088:b0:576:cc71:b8e4 with SMTP id bw8-20020a056a00408800b00576cc71b8e4mr3170694pfb.20.1674604163135; Tue, 24 Jan 2023 15:49:23 -0800 (PST) Reply-To: Sean Christopherson Date: Tue, 24 Jan 2023 23:49:05 +0000 In-Reply-To: <20230124234905.3774678-1-seanjc@google.com> Mime-Version: 1.0 References: <20230124234905.3774678-1-seanjc@google.com> X-Mailer: git-send-email 2.39.1.456.gfc5497dd1b-goog Message-ID: <20230124234905.3774678-7-seanjc@google.com> Subject: [PATCH 6/6] KVM: x86/pmu: Provide "error" semantics for unsupported-but-known PMU MSRs From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini , Vitaly Kuznetsov Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Aaron Lewis , Weijiang Yang , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Provide "error" semantics (read zeros, drop writes) for userspace accesses to MSRs that are ultimately unsupported for whatever reason, but for which KVM told userspace to save and restore the MSR, i.e. for MSRs that KVM included in KVM_GET_MSR_INDEX_LIST. Previously, KVM special cased a few PMU MSRs that were problematic at one point or another. Extend the treatment to all PMU MSRs, e.g. to avoid spurious unsupported accesses. Note, the logic can also be used for non-PMU MSRs, but as of today only PMU MSRs can end up being unsupported after KVM told userspace to save and restore them. Signed-off-by: Sean Christopherson --- arch/x86/kvm/x86.c | 51 ++++++++++++++++++++++++++-------------------- 1 file changed, 29 insertions(+), 22 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 3c49c86b973d..64c567a1b32b 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3561,6 +3561,18 @@ static void record_steal_time(struct kvm_vcpu *vcpu) mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa)); } =20 +static bool kvm_is_msr_to_save(u32 msr_index) +{ + unsigned int i; + + for (i =3D 0; i < num_msrs_to_save; i++) { + if (msrs_to_save[i] =3D=3D msr_index) + return true; + } + + return false; +} + int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) { u32 msr =3D msr_info->index; @@ -3876,20 +3888,18 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struc= t msr_data *msr_info) vcpu->arch.guest_fpu.xfd_err =3D data; break; #endif - case MSR_IA32_PEBS_ENABLE: - case MSR_IA32_DS_AREA: - case MSR_PEBS_DATA_CFG: - case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5: + default: if (kvm_pmu_is_valid_msr(vcpu, msr)) return kvm_pmu_set_msr(vcpu, msr_info); + /* * Userspace is allowed to write '0' to MSRs that KVM reports * as to-be-saved, even if an MSRs isn't fully supported. */ - return !msr_info->host_initiated || data; - default: - if (kvm_pmu_is_valid_msr(vcpu, msr)) - return kvm_pmu_set_msr(vcpu, msr_info); + if (msr_info->host_initiated && !data && + kvm_is_msr_to_save(msr)) + break; + return KVM_MSR_RET_INVALID; } return 0; @@ -3979,20 +3989,6 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct= msr_data *msr_info) case MSR_DRAM_ENERGY_STATUS: /* DRAM controller */ msr_info->data =3D 0; break; - case MSR_IA32_PEBS_ENABLE: - case MSR_IA32_DS_AREA: - case MSR_PEBS_DATA_CFG: - case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5: - if (kvm_pmu_is_valid_msr(vcpu, msr_info->index)) - return kvm_pmu_get_msr(vcpu, msr_info); - /* - * Userspace is allowed to read MSRs that KVM reports as - * to-be-saved, even if an MSR isn't fully supported. - */ - if (!msr_info->host_initiated) - return 1; - msr_info->data =3D 0; - break; case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3: case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3: case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1: @@ -4248,6 +4244,17 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct= msr_data *msr_info) default: if (kvm_pmu_is_valid_msr(vcpu, msr_info->index)) return kvm_pmu_get_msr(vcpu, msr_info); + + /* + * Userspace is allowed to read MSRs that KVM reports as + * to-be-saved, even if an MSR isn't fully supported. + */ + if (msr_info->host_initiated && + kvm_is_msr_to_save(msr_info->index)) { + msr_info->data =3D 0; + break; + } + return KVM_MSR_RET_INVALID; } return 0; --=20 2.39.1.456.gfc5497dd1b-goog