From nobody Sun Sep 14 11:08:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BCFEAC25B50 for ; Mon, 23 Jan 2023 21:07:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232977AbjAWVHT (ORCPT ); Mon, 23 Jan 2023 16:07:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41296 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232907AbjAWVHP (ORCPT ); Mon, 23 Jan 2023 16:07:15 -0500 Received: from desiato.infradead.org (desiato.infradead.org [IPv6:2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 06C2638675 for ; Mon, 23 Jan 2023 13:07:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Type:MIME-Version:References: Subject:Cc:To:From:Date:Message-ID:Sender:Reply-To:Content-Transfer-Encoding: Content-ID:Content-Description:In-Reply-To; bh=43U4bn0+EhRePAQFEfIEHYSWEzea++Rs3FkcHjx/rv8=; b=GNpOpTvJ2abtxz1GuR6oDPbBFH gRKJX5F+/8CQ8hBkc06D7Df/ATaLdINRo44g2Pk0aJKTHl5l9YD8P8daAyP/ByYwM3uBZ5RTwrCOX BxFj52kR1hNUkdjf90+2jhrY4snrl5Kl55XqFBR50utZdC/3a8a8wUnOtWoRIaC3SeuLvEbvvP2nK 4pJ8WqWKt3CaixdXdRXb940NueJDrWXM3Dgl4K5h9E2+vIMV1Rnik6UP6rcf6xLjTsJrwQTq72GRh LE5wmnndzETgilE+jRoElqNMIoM3TGpi3wOopZd0g4LKFPX5F268UTdE0YW4dnT3Hff6Z6Y5tKG29 VcxQsalg==; Received: from j130084.upc-j.chello.nl ([24.132.130.84] helo=noisy.programming.kicks-ass.net) by desiato.infradead.org with esmtpsa (Exim 4.96 #2 (Red Hat Linux)) id 1pK41C-001e3s-06; Mon, 23 Jan 2023 21:06:19 +0000 Received: from hirez.programming.kicks-ass.net (hirez.programming.kicks-ass.net [192.168.1.225]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (Client did not present a certificate) by noisy.programming.kicks-ass.net (Postfix) with ESMTPS id 64A43300747; Mon, 23 Jan 2023 22:06:45 +0100 (CET) Received: by hirez.programming.kicks-ass.net (Postfix, from userid 0) id 2C7C72038B0DA; Mon, 23 Jan 2023 22:06:45 +0100 (CET) Message-ID: <20230123210607.115718513@infradead.org> User-Agent: quilt/0.66 Date: Mon, 23 Jan 2023 21:59:17 +0100 From: Peter Zijlstra To: mingo@kernel.org Cc: tglx@linutronix.de, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, peterz@infradead.org, jpoimboe@kernel.org, jbaron@akamai.com, rostedt@goodmis.org, ardb@kernel.org, linux-kernel@vger.kernel.org, erhard_f@mailbox.org, ndesaulniers@google.com, mhiramat@kernel.org, sandipan.das@amd.com Subject: [PATCH 2/3] x86/alternative: Teach text_poke_bp() to patch Jcc.d32 instructions References: <20230123205915.751729592@infradead.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In order to re-write Jcc.d32 instructions text_poke_bp() needs to be taught about them. The biggest hurdle is that the whole machinery is currently made for 5 byte instructions and extending this would grow struct text_poke_loc which is currently a nice 16 bytes and used in an array. However, since text_poke_loc contains a full copy of the (s32) displacement, it is possible to map the Jcc.d32 2 byte opcodes to Jcc.d8 1 byte opcode for the int3 emulation. This then leaves the replacement bytes; fudge that by only storing the last 5 bytes and adding the rule that 'length =3D=3D 6' instruction will be prefixed with a 0x0f byte. Signed-off-by: Peter Zijlstra (Intel) Reviewed-by: Masami Hiramatsu (Google) --- arch/x86/kernel/alternative.c | 62 +++++++++++++++++++++++++++++++------= ----- 1 file changed, 47 insertions(+), 15 deletions(-) --- a/arch/x86/kernel/alternative.c +++ b/arch/x86/kernel/alternative.c @@ -338,6 +338,12 @@ void __init_or_module noinline apply_alt } } =20 +static inline bool is_jcc32(struct insn *insn) +{ + /* Jcc.d32 second opcode byte is in the range: 0x80-0x8f */ + return insn->opcode.bytes[0] =3D=3D 0x0f && (insn->opcode.bytes[1] & 0xf0= ) =3D=3D 0x80; +} + #if defined(CONFIG_RETPOLINE) && defined(CONFIG_OBJTOOL) =20 /* @@ -376,12 +382,6 @@ static int emit_indirect(int op, int reg return i; } =20 -static inline bool is_jcc32(struct insn *insn) -{ - /* Jcc.d32 second opcode byte is in the range: 0x80-0x8f */ - return insn->opcode.bytes[0] =3D=3D 0x0f && (insn->opcode.bytes[1] & 0xf0= ) =3D=3D 0x80; -} - static int emit_call_track_retpoline(void *addr, struct insn *insn, int re= g, u8 *bytes) { u8 op =3D insn->opcode.bytes[0]; @@ -1770,6 +1770,11 @@ void text_poke_sync(void) on_each_cpu(do_sync_core, NULL, 1); } =20 +/* + * NOTE: crazy scheme to allow patching Jcc.d32 but not increase the size = of + * this thing. When len =3D=3D 6 everything is prefixed with 0x0f and we m= ap + * opcode to Jcc.d8, using len to distinguish. + */ struct text_poke_loc { /* addr :=3D _stext + rel_addr */ s32 rel_addr; @@ -1891,6 +1896,10 @@ noinstr int poke_int3_handler(struct pt_ int3_emulate_jmp(regs, (long)ip + tp->disp); break; =20 + case 0x70 ... 0x7f: /* Jcc */ + int3_emulate_jcc(regs, tp->opcode & 0xf, (long)ip, tp->disp); + break; + default: BUG(); } @@ -1964,16 +1973,26 @@ static void text_poke_bp_batch(struct te * Second step: update all but the first byte of the patched range. */ for (do_sync =3D 0, i =3D 0; i < nr_entries; i++) { - u8 old[POKE_MAX_OPCODE_SIZE] =3D { tp[i].old, }; + u8 old[POKE_MAX_OPCODE_SIZE+1] =3D { tp[i].old, }; + u8 _new[POKE_MAX_OPCODE_SIZE+1]; + const u8 *new =3D tp[i].text; int len =3D tp[i].len; =20 if (len - INT3_INSN_SIZE > 0) { memcpy(old + INT3_INSN_SIZE, text_poke_addr(&tp[i]) + INT3_INSN_SIZE, len - INT3_INSN_SIZE); + + if (len =3D=3D 6) { + _new[0] =3D 0x0f; + memcpy(_new + 1, new, 5); + new =3D _new; + } + text_poke(text_poke_addr(&tp[i]) + INT3_INSN_SIZE, - (const char *)tp[i].text + INT3_INSN_SIZE, + new + INT3_INSN_SIZE, len - INT3_INSN_SIZE); + do_sync++; } =20 @@ -2001,8 +2020,7 @@ static void text_poke_bp_batch(struct te * The old instruction is recorded so that the event can be * processed forwards or backwards. */ - perf_event_text_poke(text_poke_addr(&tp[i]), old, len, - tp[i].text, len); + perf_event_text_poke(text_poke_addr(&tp[i]), old, len, new, len); } =20 if (do_sync) { @@ -2019,10 +2037,15 @@ static void text_poke_bp_batch(struct te * replacing opcode. */ for (do_sync =3D 0, i =3D 0; i < nr_entries; i++) { - if (tp[i].text[0] =3D=3D INT3_INSN_OPCODE) + u8 byte =3D tp[i].text[0]; + + if (tp[i].len =3D=3D 6) + byte =3D 0x0f; + + if (byte =3D=3D INT3_INSN_OPCODE) continue; =20 - text_poke(text_poke_addr(&tp[i]), tp[i].text, INT3_INSN_SIZE); + text_poke(text_poke_addr(&tp[i]), &byte, INT3_INSN_SIZE); do_sync++; } =20 @@ -2040,9 +2063,11 @@ static void text_poke_loc_init(struct te const void *opcode, size_t len, const void *emulate) { struct insn insn; - int ret, i; + int ret, i =3D 0; =20 - memcpy((void *)tp->text, opcode, len); + if (len =3D=3D 6) + i =3D 1; + memcpy((void *)tp->text, opcode+i, len-i); if (!emulate) emulate =3D opcode; =20 @@ -2053,6 +2078,13 @@ static void text_poke_loc_init(struct te tp->len =3D len; tp->opcode =3D insn.opcode.bytes[0]; =20 + if (is_jcc32(&insn)) { + /* + * Map Jcc.d32 onto Jcc.d8 and use len to distinguish. + */ + tp->opcode =3D insn.opcode.bytes[1] - 0x10; + } + switch (tp->opcode) { case RET_INSN_OPCODE: case JMP32_INSN_OPCODE: @@ -2069,7 +2101,6 @@ static void text_poke_loc_init(struct te BUG_ON(len !=3D insn.length); } =20 - switch (tp->opcode) { case INT3_INSN_OPCODE: case RET_INSN_OPCODE: @@ -2078,6 +2109,7 @@ static void text_poke_loc_init(struct te case CALL_INSN_OPCODE: case JMP32_INSN_OPCODE: case JMP8_INSN_OPCODE: + case 0x70 ... 0x7f: /* Jcc */ tp->disp =3D insn.immediate.value; break;