From nobody Sun Sep 14 12:34:52 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F0B10C38142 for ; Sat, 21 Jan 2023 21:35:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229853AbjAUVf0 (ORCPT ); Sat, 21 Jan 2023 16:35:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34816 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229484AbjAUVfY (ORCPT ); Sat, 21 Jan 2023 16:35:24 -0500 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0B8E423C72 for ; Sat, 21 Jan 2023 13:35:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1674336923; x=1705872923; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zY4nJSbIj2KCZODz6WytpRpGqSak4jvzYQ/pzIgYhPE=; b=SM4uWad2WqK/QlphzQ05Q3D+P7prL7w2wmbHDEVbm118jf3ppNa+Hqyj CR7uUh8Gx7aoC/ot1+72EYitDJ3P2OJiW7ecpEcz5pk92pgF+eFB/lJuw wNbPPIuIbH4Q08RFPq4AKpl2t0Fa2uCloPo2v2SykFNCAWqOyET3LuemT 94FOMqbRHD8KfM+y13PkzENARrvxvaQJGwfhSP2gbcHhoMnZJc4UUW8/J PZQWz93JowwbqKllvWMiaVDB9EDiXP0UUx5SPULhOhui9y80MpEmukluu dIAkm4DYUjUuvfNaXAbTSG0cNf8ZYr3DbXFmERjfB+tRX5ei6LGR9ET+H g==; X-IronPort-AV: E=McAfee;i="6500,9779,10597"; a="412066308" X-IronPort-AV: E=Sophos;i="5.97,235,1669104000"; d="scan'208";a="412066308" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jan 2023 13:35:22 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10597"; a="784946310" X-IronPort-AV: E=Sophos;i="5.97,235,1669104000"; d="scan'208";a="784946310" Received: from araj-ucode.jf.intel.com ([10.23.0.19]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jan 2023 13:35:21 -0800 From: Ashok Raj To: Thomas Gleixner , Borislav Petkov Cc: Ashok Raj , LKML , x86 , Ingo Molnar , Tony Luck , Dave Hansen , Alison Schofield , Reinette Chatre , Tom Lendacky , Stefan Talpalaru , David Woodhouse , Benjamin Herrenschmidt , Jonathan Corbet , "Rafael J . Wysocki" , Peter Zilstra , Andy Lutomirski , Andrew Cooper , Boris Ostrovsky , Martin Pohlack Subject: [Part 2 v2[cleanup] 1/4] x86/microcode: Taint kernel only if microcode loading was successful Date: Sat, 21 Jan 2023 13:35:09 -0800 Message-Id: <20230121213512.251578-2-ashok.raj@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230121213512.251578-1-ashok.raj@intel.com> References: <87y1pygiyf.ffs@tglx> <20230121213512.251578-1-ashok.raj@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Currently when late loading is aborted due to check_online_cpu(), kernel still ends up tainting the kernel. Taint only when microcode loading was successful. Suggested-by: Thomas Gleixner Signed-off-by: Ashok Raj Cc: LKML Cc: x86 Cc: Ingo Molnar Cc: Tony Luck Cc: Dave Hansen Cc: Alison Schofield Cc: Reinette Chatre Cc: Thomas Gleixner (Intel) Cc: Tom Lendacky Cc: Stefan Talpalaru Cc: David Woodhouse Cc: Benjamin Herrenschmidt Cc: Jonathan Corbet Cc: Rafael J. Wysocki Cc: Peter Zilstra (Intel) Cc: Andy Lutomirski Cc: Andrew Cooper Cc: Boris Ostrovsky Cc: Martin Pohlack --- arch/x86/kernel/cpu/microcode/core.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/mic= rocode/core.c index d7cbc83df9b6..c5d80ff00b4e 100644 --- a/arch/x86/kernel/cpu/microcode/core.c +++ b/arch/x86/kernel/cpu/microcode/core.c @@ -475,6 +475,7 @@ static ssize_t reload_store(struct device *dev, enum ucode_state tmp_ret =3D UCODE_OK; int bsp =3D boot_cpu_data.cpu_index; unsigned long val; + int load_ret =3D -1; ssize_t ret =3D 0; =20 ret =3D kstrtoul(buf, 0, &val); @@ -495,16 +496,20 @@ static ssize_t reload_store(struct device *dev, goto put; =20 mutex_lock(µcode_mutex); - ret =3D microcode_reload_late(); + load_ret =3D microcode_reload_late(); mutex_unlock(µcode_mutex); =20 put: cpus_read_unlock(); =20 - if (ret =3D=3D 0) + /* + * Taint only when loading was successful + */ + if (load_ret =3D=3D 0) { ret =3D size; - - add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK); + add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK); + pr_warn("Microcode late loading tainted the kernel\n"); + } =20 return ret; } --=20 2.34.1