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[135.181.76.187]) by smtp.gmail.com with ESMTPSA id b31-20020a0565120b9f00b004d30752a561sm2112737lfv.298.2023.01.19.10.49.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Jan 2023 10:49:22 -0800 (PST) From: Alibek Omarov Cc: a1ba.omarov@gmail.com, alexander.sverdlin@siemens.com, macromorgan@hotmail.com, Sandy Huang , =?UTF-8?q?Heiko=20St=C3=BCbner?= , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Michael Riesch , Peter Geis , Sascha Hauer , Frank Wunderlich , Nicolas Frattaroli , Ezequiel Garcia , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/3] drm/rockchip: lvds: add rk3568 support Date: Thu, 19 Jan 2023 21:48:03 +0300 Message-Id: <20230119184807.171132-2-a1ba.omarov@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230119184807.171132-1-a1ba.omarov@gmail.com> References: <20230119184807.171132-1-a1ba.omarov@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" One of the ports of RK3568 can be configured as LVDS, re-using the DSI DPHY Signed-off-by: Alibek Omarov --- drivers/gpu/drm/rockchip/rockchip_lvds.c | 144 +++++++++++++++++++++-- drivers/gpu/drm/rockchip/rockchip_lvds.h | 10 ++ 2 files changed, 147 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.c b/drivers/gpu/drm/roc= kchip/rockchip_lvds.c index 68f6ebb33460..83c60240af85 100644 --- a/drivers/gpu/drm/rockchip/rockchip_lvds.c +++ b/drivers/gpu/drm/rockchip/rockchip_lvds.c @@ -433,6 +433,90 @@ static void px30_lvds_encoder_disable(struct drm_encod= er *encoder) drm_panel_unprepare(lvds->panel); } =20 +static int rk3568_lvds_poweron(struct rockchip_lvds *lvds) +{ + int ret; + + ret =3D clk_enable(lvds->pclk); + if (ret < 0) { + DRM_DEV_ERROR(lvds->dev, "failed to enable lvds pclk %d\n", ret); + return ret; + } + + ret =3D pm_runtime_get_sync(lvds->dev); + if (ret < 0) { + DRM_DEV_ERROR(lvds->dev, "failed to get pm runtime: %d\n", ret); + clk_disable(lvds->pclk); + return ret; + } + + /* Enable LVDS mode */ + return regmap_update_bits(lvds->grf, RK3568_GRF_VO_CON2, + RK3568_LVDS0_MODE_EN(1), + RK3568_LVDS0_MODE_EN(1)); +} + +static void rk3568_lvds_poweroff(struct rockchip_lvds *lvds) +{ + regmap_update_bits(lvds->grf, RK3568_GRF_VO_CON2, + RK3568_LVDS0_MODE_EN(1) | RK3568_LVDS0_P2S_EN(1), + RK3568_LVDS0_MODE_EN(0) | RK3568_LVDS0_P2S_EN(0)); + + pm_runtime_put(lvds->dev); + clk_disable(lvds->pclk); +} + +static int rk3568_lvds_grf_config(struct drm_encoder *encoder, + struct drm_display_mode *mode) +{ + struct rockchip_lvds *lvds =3D encoder_to_lvds(encoder); + + if (lvds->output !=3D DISPLAY_OUTPUT_LVDS) { + DRM_DEV_ERROR(lvds->dev, "Unsupported display output %d\n", + lvds->output); + return -EINVAL; + } + + /* Set format */ + return regmap_update_bits(lvds->grf, RK3568_GRF_VO_CON0, + RK3568_LVDS0_SELECT(3), + RK3568_LVDS0_SELECT(lvds->format)); +} + +static void rk3568_lvds_encoder_enable(struct drm_encoder *encoder) +{ + struct rockchip_lvds *lvds =3D encoder_to_lvds(encoder); + struct drm_display_mode *mode =3D &encoder->crtc->state->adjusted_mode; + int ret; + + drm_panel_prepare(lvds->panel); + + ret =3D rk3568_lvds_poweron(lvds); + if (ret) { + DRM_DEV_ERROR(lvds->dev, "failed to power on LVDS: %d\n", ret); + drm_panel_unprepare(lvds->panel); + return; + } + + ret =3D rk3568_lvds_grf_config(encoder, mode); + if (ret) { + DRM_DEV_ERROR(lvds->dev, "failed to configure LVDS: %d\n", ret); + drm_panel_unprepare(lvds->panel); + return; + } + + drm_panel_enable(lvds->panel); +} + +static void rk3568_lvds_encoder_disable(struct drm_encoder *encoder) +{ + struct rockchip_lvds *lvds =3D encoder_to_lvds(encoder); + + drm_panel_disable(lvds->panel); + rk3568_lvds_poweroff(lvds); + drm_panel_unprepare(lvds->panel); +} + static const struct drm_encoder_helper_funcs rk3288_lvds_encoder_helper_funcs =3D { .enable =3D rk3288_lvds_encoder_enable, @@ -447,6 +531,13 @@ struct drm_encoder_helper_funcs px30_lvds_encoder_help= er_funcs =3D { .atomic_check =3D rockchip_lvds_encoder_atomic_check, }; =20 +static const +struct drm_encoder_helper_funcs rk3568_lvds_encoder_helper_funcs =3D { + .enable =3D rk3568_lvds_encoder_enable, + .disable =3D rk3568_lvds_encoder_disable, + .atomic_check =3D rockchip_lvds_encoder_atomic_check, +}; + static int rk3288_lvds_probe(struct platform_device *pdev, struct rockchip_lvds *lvds) { @@ -491,6 +582,26 @@ static int rk3288_lvds_probe(struct platform_device *p= dev, return 0; } =20 +static int rockchip_lvds_phy_probe(struct platform_device *pdev, + struct rockchip_lvds *lvds) +{ + int ret; + + lvds->dphy =3D devm_phy_get(&pdev->dev, "dphy"); + if (IS_ERR(lvds->dphy)) + return PTR_ERR(lvds->dphy); + + ret =3D phy_init(lvds->dphy); + if (ret) + return ret; + + ret =3D phy_set_mode(lvds->dphy, PHY_MODE_LVDS); + if (ret) + return ret; + + return phy_power_on(lvds->dphy); +} + static int px30_lvds_probe(struct platform_device *pdev, struct rockchip_lvds *lvds) { @@ -503,20 +614,28 @@ static int px30_lvds_probe(struct platform_device *pd= ev, if (ret) return ret; =20 - /* PHY */ - lvds->dphy =3D devm_phy_get(&pdev->dev, "dphy"); - if (IS_ERR(lvds->dphy)) - return PTR_ERR(lvds->dphy); + return rockchip_lvds_phy_probe(pdev, lvds); +} =20 - ret =3D phy_init(lvds->dphy); +static int rk3568_lvds_probe(struct platform_device *pdev, + struct rockchip_lvds *lvds) +{ + int ret; + + ret =3D regmap_update_bits(lvds->grf, RK3568_GRF_VO_CON0, + RK3568_LVDS0_MSBSEL(1), + RK3568_LVDS0_MSBSEL(1)); if (ret) return ret; =20 - ret =3D phy_set_mode(lvds->dphy, PHY_MODE_LVDS); + ret =3D regmap_update_bits(lvds->grf, RK3568_GRF_VO_CON2, + RK3568_LVDS0_P2S_EN(1), + RK3568_LVDS0_P2S_EN(1)); + if (ret) return ret; =20 - return phy_power_on(lvds->dphy); + return rockchip_lvds_phy_probe(pdev, lvds); } =20 static const struct rockchip_lvds_soc_data rk3288_lvds_data =3D { @@ -529,6 +648,11 @@ static const struct rockchip_lvds_soc_data px30_lvds_d= ata =3D { .helper_funcs =3D &px30_lvds_encoder_helper_funcs, }; =20 +static const struct rockchip_lvds_soc_data rk3568_lvds_data =3D { + .probe =3D rk3568_lvds_probe, + .helper_funcs =3D &rk3568_lvds_encoder_helper_funcs, +}; + static const struct of_device_id rockchip_lvds_dt_ids[] =3D { { .compatible =3D "rockchip,rk3288-lvds", @@ -538,6 +662,10 @@ static const struct of_device_id rockchip_lvds_dt_ids[= ] =3D { .compatible =3D "rockchip,px30-lvds", .data =3D &px30_lvds_data }, + { + .compatible =3D "rockchip,rk3568-lvds", + .data =3D &rk3568_lvds_data + }, {} }; MODULE_DEVICE_TABLE(of, rockchip_lvds_dt_ids); @@ -612,6 +740,8 @@ static int rockchip_lvds_bind(struct device *dev, struc= t device *master, encoder =3D &lvds->encoder.encoder; encoder->possible_crtcs =3D drm_of_find_possible_crtcs(drm_dev, dev->of_node); + rockchip_drm_encoder_set_crtc_endpoint_id(&lvds->encoder, + dev->of_node, 0, 0); =20 ret =3D drm_simple_encoder_init(drm_dev, encoder, DRM_MODE_ENCODER_LVDS); if (ret < 0) { diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.h b/drivers/gpu/drm/roc= kchip/rockchip_lvds.h index 4ce967d23813..57decb33f779 100644 --- a/drivers/gpu/drm/rockchip/rockchip_lvds.h +++ b/drivers/gpu/drm/rockchip/rockchip_lvds.h @@ -120,4 +120,14 @@ #define PX30_LVDS_P2S_EN(val) HIWORD_UPDATE(val, 6, 6) #define PX30_LVDS_VOP_SEL(val) HIWORD_UPDATE(val, 1, 1) =20 +#define RK3568_GRF_VO_CON0 0x0360 +#define RK3568_LVDS0_SELECT(val) HIWORD_UPDATE(val, 5, 4) +#define RK3568_LVDS0_MSBSEL(val) HIWORD_UPDATE(val, 3, 3) + +#define RK3568_GRF_VO_CON2 0x0368 +#define RK3568_LVDS0_DCLK_INV_SEL(val) HIWORD_UPDATE(val, 9, 9) +#define RK3568_LVDS0_DCLK_DIV2_SEL(val) HIWORD_UPDATE(val, 8, 8) +#define RK3568_LVDS0_MODE_EN(val) HIWORD_UPDATE(val, 1, 1) +#define RK3568_LVDS0_P2S_EN(val) HIWORD_UPDATE(val, 0, 0) + #endif /* _ROCKCHIP_LVDS_ */ --=20 2.34.1