From nobody Sun Sep 14 18:25:17 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 338FAC38142 for ; Thu, 19 Jan 2023 07:51:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230241AbjASHvf (ORCPT ); Thu, 19 Jan 2023 02:51:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54246 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230345AbjASHuP (ORCPT ); Thu, 19 Jan 2023 02:50:15 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 621812715 for ; Wed, 18 Jan 2023 23:48:12 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id F3CAA61B9D for ; Thu, 19 Jan 2023 07:48:11 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id BD978C433F0; Thu, 19 Jan 2023 07:48:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1674114491; bh=x+6hysZetLjXNJoPmPem8KkgdCayvnvdD0vD47hnXTw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OCKr7WQy84g91clObcCPN4ujLE8G6ryfwyrIb5kQIjfphSjUsiJwo8tCw/cjD6DMa bVtPv9K1Gig0mN0oAsG2pyKregWutfWQ37Hx4kc3B95uR0V/nTMMJU6VkcnluddWi7 oXpAwRGF5pQnalavt9hFymGUXIwrnDHCdxCs1tYcuAZMLF98Mda1apRykl3jicBKA8 cerShorkhdTiuHpSQCh/dO/yDv2KjkxGcMUN0V4YKB6tqaB4Er3hd3Nl6a2rkdp44T P6H6mED9rtxyyE9FBsrDmSpLN4hFGddeBxEKvwB0gn7ARk+aKnjWk1R9I4MrFwJz5S wjIykZaESbsjg== From: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= To: Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-riscv@lists.infradead.org Cc: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= , Andreas Schwab , Geert Uytterhoeven , linux-kernel@vger.kernel.org Subject: [PATCH v3 1/2] riscv: Add instruction dump to RISC-V splats Date: Thu, 19 Jan 2023 08:47:37 +0100 Message-Id: <20230119074738.708301-2-bjorn@kernel.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230119074738.708301-1-bjorn@kernel.org> References: <20230119074738.708301-1-bjorn@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bj=C3=B6rn T=C3=B6pel Add instruction dump (Code:) output to RISC-V splats. Dump 16b parcels. An example: Unable to handle kernel NULL pointer dereference at virtual address 00000= 00000000000 Oops [#1] Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Not tainted 6.2.0-rc3-00302-g840ff44c571d-d= irty #27 Hardware name: riscv-virtio,qemu (DT) epc : kernel_init+0xc8/0x10e ra : kernel_init+0x70/0x10e epc : ffffffff80bd9a40 ra : ffffffff80bd99e8 sp : ff2000000060bec0 gp : ffffffff81730b28 tp : ff6000007ff00000 t0 : 7974697275636573 t1 : 0000000000000000 t2 : 3030303270393d6e s0 : ff2000000060bee0 s1 : ffffffff81732028 a0 : 0000000000000000 a1 : ff60000080dd1780 a2 : 0000000000000002 a3 : ffffffff8176a470 a4 : 0000000000000000 a5 : 000000000000000a a6 : 0000000000000081 a7 : ff60000080dd1780 s2 : 0000000000000000 s3 : 0000000000000000 s4 : 0000000000000000 s5 : 0000000000000000 s6 : 0000000000000000 s7 : 0000000000000000 s8 : 0000000000000000 s9 : 0000000000000000 s10: 0000000000000000 s11: 0000000000000000 t3 : ffffffff81186018 t4 : 0000000000000022 t5 : 000000000000003d t6 : 0000000000000000 status: 0000000200000120 badaddr: 0000000000000000 cause: 000000000000000f [] ret_from_exception+0x0/0x16 Code: 862a d179 608c a517 0069 0513 2be5 d0ef db2e 47a9 (c11c) a517 ---[ end trace 0000000000000000 ]--- Kernel panic - not syncing: Attempted to kill init! exitcode=3D0x0000000b SMP: stopping secondary CPUs ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=3D0= x0000000b ]--- Signed-off-by: Bj=C3=B6rn T=C3=B6pel --- arch/riscv/kernel/traps.c | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c index 549bde5c970a..fbdcdbc792d3 100644 --- a/arch/riscv/kernel/traps.c +++ b/arch/riscv/kernel/traps.c @@ -29,6 +29,27 @@ int show_unhandled_signals =3D 1; =20 static DEFINE_SPINLOCK(die_lock); =20 +static void dump_kernel_instr(const char *loglvl, struct pt_regs *regs) +{ + char str[sizeof("0000 ") * 12 + 2 + 1], *p =3D str; + const u16 *insns =3D (u16 *)instruction_pointer(regs); + long bad; + u16 val; + int i; + + for (i =3D -10; i < 2; i++) { + bad =3D get_kernel_nofault(val, &insns[i]); + if (!bad) { + p +=3D sprintf(p, i =3D=3D 0 ? "(%04hx) " : "%04hx ", val); + } else { + printk("%sCode: Unable to access instruction at 0x%px.\n", + loglvl, &insns[i]); + return; + } + } + printk("%sCode: %s\n", loglvl, str); +} + void die(struct pt_regs *regs, const char *str) { static int die_counter; @@ -43,8 +64,10 @@ void die(struct pt_regs *regs, const char *str) =20 pr_emerg("%s [#%d]\n", str, ++die_counter); print_modules(); - if (regs) + if (regs) { show_regs(regs); + dump_kernel_instr(KERN_EMERG, regs); + } =20 cause =3D regs ? regs->cause : -1; ret =3D notify_die(DIE_OOPS, str, regs, 0, cause, SIGSEGV); --=20 2.37.2 From nobody Sun Sep 14 18:25:17 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0D744C00A5A for ; Thu, 19 Jan 2023 07:51:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230223AbjASHvZ (ORCPT ); Thu, 19 Jan 2023 02:51:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54968 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230333AbjASHuN (ORCPT ); Thu, 19 Jan 2023 02:50:13 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DBDEE689FA for ; Wed, 18 Jan 2023 23:48:14 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 18C8461BA6 for ; Thu, 19 Jan 2023 07:48:14 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D94ACC433EF; Thu, 19 Jan 2023 07:48:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1674114493; bh=PBE0PpRXIlt2qCDFtsjgADfP4kD6JxkZrkUXxW7Tmuw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=F+9OmwVL6lX48jOEAysQTK3qhLt3mSeXbLlVru28JnzuovuPCuTdiTQtUoSwjB+ps Wd56KDxsYagdWgG7gH83veEO34aLJf1+lkkB+UiWSJNfo6/PjRS/8mC2UhNxayL4zd IgN54fSBcVNOm9GvIGHQNc93olFcrzVMmY9NNju/K2PCXIGrFao/mbWzEnZNvbYRXx sY+bzGVxz6VFYL4ptncHJMFnLQASifnFjX4RfFyNh//oPXdrR75K8pyaFMAcjPHMhb MknCw6cEnu9oYlXUsnlFTfWIGVxga+Ni5GgCbBg/Jieh2Q2WpeR7nVxD2m+G0goBIe LV5rrCkiwU1bg== From: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= To: Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-riscv@lists.infradead.org Cc: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= , Andreas Schwab , Geert Uytterhoeven , linux-kernel@vger.kernel.org Subject: [PATCH v3 2/2] scripts/decodecode: Add support for RISC-V Date: Thu, 19 Jan 2023 08:47:38 +0100 Message-Id: <20230119074738.708301-3-bjorn@kernel.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230119074738.708301-1-bjorn@kernel.org> References: <20230119074738.708301-1-bjorn@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bj=C3=B6rn T=C3=B6pel RISC-V has some GNU disassembly quirks, e.g. it requires '-D' to properly disassemble .2byte directives similar to Arm [1]. Further, GNU objdump groups RISC-V instruction by 2 or 4 byte chunks, instead doing byte-for-byte. Add the required switches, and translate from short/word to bytes when ARCH is "riscv". An example how to invoke decodecode for RISC-V: $ echo 'Code: bf45 f793 1007 f7d9 50ef 37af d541 b7d9 7097 00c8 (80e7) 6140' | AFLAGS=3D"-march=3Drv64imac_zicbom_zihintpause" \ ARCH=3Driscv CROSS_COMPILE=3Driscv64-linux-gnu- ./scripts/decodecode Code: bf45 f793 1007 f7d9 50ef 37af d541 b7d9 7097 00c8 (80e7) 6140 All code =3D=3D=3D=3D=3D=3D=3D=3D 0: bf45 c.j 0xffffffffffffffb0 2: 1007f793 andi a5,a5,256 6: f7d9 c.bnez a5,0xffffffffffffff94 8: 37af50ef jal ra,0xf5382 c: d541 c.beqz a0,0xffffffffffffff94 e: b7d9 c.j 0xffffffffffffffd4 10: 00c87097 auipc ra,0xc87 14:* 614080e7 jalr ra,1556(ra) # 0xc87624 <= -- trapping instruction Code starting with the faulting instruction =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D 0: 614080e7 jalr ra,1556(ra) [1] https://sourceware.org/bugzilla/show_bug.cgi?id=3D10263 Signed-off-by: Bj=C3=B6rn T=C3=B6pel Tested-by: Alexandre Ghiti --- scripts/decodecode | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/scripts/decodecode b/scripts/decodecode index b28fd2686561..8fe71c292381 100755 --- a/scripts/decodecode +++ b/scripts/decodecode @@ -93,6 +93,11 @@ disas() { ${CROSS_COMPILE}strip $t.o fi =20 + if [ "$ARCH" =3D "riscv" ]; then + OBJDUMPFLAGS=3D"-M no-aliases --section=3D.text -D" + ${CROSS_COMPILE}strip $t.o + fi + if [ $pc_sub -ne 0 ]; then if [ $PC ]; then adj_vma=3D$(( $PC - $pc_sub )) @@ -126,8 +131,13 @@ get_substr_opcode_bytes_num() do substr+=3D"$opc" =20 + opcode=3D"$substr" + if [ "$ARCH" =3D "riscv" ]; then + opcode=3D$(echo $opcode | tr ' ' '\n' | tac | tr -d '\n') + fi + # return if opcode bytes do not match @opline anymore - if ! echo $opline | grep -q "$substr"; + if ! echo $opline | grep -q "$opcode"; then break fi --=20 2.37.2