From nobody Mon Sep 15 00:01:45 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56A68C32793 for ; Wed, 18 Jan 2023 06:41:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229993AbjARGj6 (ORCPT ); Wed, 18 Jan 2023 01:39:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59064 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229687AbjARG1C (ORCPT ); Wed, 18 Jan 2023 01:27:02 -0500 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 155C9392A9; Tue, 17 Jan 2023 22:17:11 -0800 (PST) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 85B7924DDB2; Wed, 18 Jan 2023 14:17:09 +0800 (CST) Received: from EXMBX073.cuchost.com (172.16.6.83) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 18 Jan 2023 14:17:09 +0800 Received: from wyh-VirtualBox.starfivetech.com (171.223.208.138) by EXMBX073.cuchost.com (172.16.6.83) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 18 Jan 2023 14:17:08 +0800 From: Yanhong Wang To: , , , CC: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Emil Renner Berthing , Richard Cochran , Andrew Lunn , Heiner Kallweit , Peter Geis , Yanhong Wang Subject: [PATCH v4 6/7] riscv: dts: starfive: jh7110: Add ethernet device node Date: Wed, 18 Jan 2023 14:17:00 +0800 Message-ID: <20230118061701.30047-7-yanhong.wang@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230118061701.30047-1-yanhong.wang@starfivetech.com> References: <20230118061701.30047-1-yanhong.wang@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX073.cuchost.com (172.16.6.83) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add JH7110 ethernet device node to support gmac driver for the JH7110 RISC-V SoC. Signed-off-by: Yanhong Wang --- arch/riscv/boot/dts/starfive/jh7110.dtsi | 93 ++++++++++++++++++++++++ 1 file changed, 93 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts= /starfive/jh7110.dtsi index c22e8f1d2640..c6de6e3b1a25 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -433,5 +433,98 @@ reg-shift =3D <2>; status =3D "disabled"; }; + + stmmac_axi_setup: stmmac-axi-config { + snps,lpi_en; + snps,wr_osr_lmt =3D <4>; + snps,rd_osr_lmt =3D <4>; + snps,blen =3D <256 128 64 32 0 0 0>; + }; + + gmac0: ethernet@16030000 { + compatible =3D "starfive,jh7110-dwmac", "snps,dwmac-5.20"; + reg =3D <0x0 0x16030000 0x0 0x10000>; + clocks =3D <&aoncrg JH7110_AONCLK_GMAC0_AXI>, + <&aoncrg JH7110_AONCLK_GMAC0_AHB>, + <&syscrg JH7110_SYSCLK_GMAC0_PTP>, + <&aoncrg JH7110_AONCLK_GMAC0_TX>, + <&syscrg JH7110_SYSCLK_GMAC0_GTXC>, + <&syscrg JH7110_SYSCLK_GMAC0_GTXCLK>; + clock-names =3D "stmmaceth", "pclk", "ptp_ref", + "tx", "gtxc", "gtx"; + resets =3D <&aoncrg JH7110_AONRST_GMAC0_AXI>, + <&aoncrg JH7110_AONRST_GMAC0_AHB>; + reset-names =3D "stmmaceth", "ahb"; + interrupts =3D <7>, <6>, <5>; + interrupt-names =3D "macirq", "eth_wake_irq", "eth_lpi"; + phy-mode =3D "rgmii-id"; + snps,multicast-filter-bins =3D <64>; + snps,perfect-filter-entries =3D <8>; + rx-fifo-depth =3D <2048>; + tx-fifo-depth =3D <2048>; + snps,fixed-burst; + snps,no-pbl-x8; + snps,force_thresh_dma_mode; + snps,axi-config =3D <&stmmac_axi_setup>; + snps,tso; + snps,en-tx-lpi-clockgating; + snps,txpbl =3D <16>; + snps,rxpbl =3D <16>; + status =3D "disabled"; + phy-handle =3D <&phy0>; + + mdio0: mdio { + #address-cells =3D <1>; + #size-cells =3D <0>; + compatible =3D "snps,dwmac-mdio"; + + phy0: ethernet-phy@0 { + reg =3D <0>; + }; + }; + }; + + gmac1: ethernet@16040000 { + compatible =3D "starfive,jh7110-dwmac", "snps,dwmac-5.20"; + reg =3D <0x0 0x16040000 0x0 0x10000>; + clocks =3D <&syscrg JH7110_SYSCLK_GMAC1_AXI>, + <&syscrg JH7110_SYSCLK_GMAC1_AHB>, + <&syscrg JH7110_SYSCLK_GMAC1_PTP>, + <&syscrg JH7110_SYSCLK_GMAC1_TX>, + <&syscrg JH7110_SYSCLK_GMAC1_GTXC>, + <&syscrg JH7110_SYSCLK_GMAC1_GTXCLK>; + clock-names =3D "stmmaceth", "pclk", "ptp_ref", + "tx", "gtxc", "gtx"; + resets =3D <&syscrg JH7110_SYSRST_GMAC1_AXI>, + <&syscrg JH7110_SYSRST_GMAC1_AHB>; + reset-names =3D "stmmaceth", "ahb"; + interrupts =3D <78>, <77>, <76>; + interrupt-names =3D "macirq", "eth_wake_irq", "eth_lpi"; + phy-mode =3D "rgmii-id"; + snps,multicast-filter-bins =3D <64>; + snps,perfect-filter-entries =3D <8>; + rx-fifo-depth =3D <2048>; + tx-fifo-depth =3D <2048>; + snps,fixed-burst; + snps,no-pbl-x8; + snps,force_thresh_dma_mode; + snps,axi-config =3D <&stmmac_axi_setup>; + snps,tso; + snps,en-tx-lpi-clockgating; + snps,txpbl =3D <16>; + snps,rxpbl =3D <16>; + status =3D "disabled"; + phy-handle =3D <&phy1>; + + mdio1: mdio { + #address-cells =3D <1>; + #size-cells =3D <0>; + compatible =3D "snps,dwmac-mdio"; + + phy1: ethernet-phy@1 { + reg =3D <1>; + }; + }; + }; }; }; --=20 2.17.1