From nobody Sun Sep 14 22:29:23 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 105C0C6379F for ; Tue, 17 Jan 2023 22:02:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229924AbjAQWCj (ORCPT ); Tue, 17 Jan 2023 17:02:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39734 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229944AbjAQWAV (ORCPT ); Tue, 17 Jan 2023 17:00:21 -0500 Received: from mail-ej1-x636.google.com (mail-ej1-x636.google.com [IPv6:2a00:1450:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 390D847EE9 for ; Tue, 17 Jan 2023 12:44:31 -0800 (PST) Received: by mail-ej1-x636.google.com with SMTP id tz11so13862069ejc.0 for ; Tue, 17 Jan 2023 12:44:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=grsecurity.net; s=grsec; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=joD6UNobMMls+6tKVhM1/laXbk6jjwsQnCEiOHpSVIA=; b=uNJwbBkZ2OYvc+3MK2JpuwUBcUSsXIPchhZmTbZfiIf3phVjJD2exKjZz1S87BXs/v qAu1ZV7HUlvWm7k4NFwXRXrvKfHN4EU/QEg8qUOC0MPTKTww5t/xI44WhL/R6s0+nMow DcAJ3cYBieTKHWHMT1tL92A5pXDYYFPpUdYhbmBocgdmE+4HZnPiRyXK6dLY08LZqRJk PvS9BHFUEbUQKq7QG5+SPL6O4xCxLw6m8Yjs5u1HqaqDFn2T4Nh4LZq6x9LsLJ7JbF9f OV4sIP+RbjYVcNyJL7oJ2izf/kCSjgKIBlU9HUmutuk43eplU+CEe96XRD5qFqrE7rWJ 6yWA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=joD6UNobMMls+6tKVhM1/laXbk6jjwsQnCEiOHpSVIA=; b=CUTH3V83eKylDQ7APVXkRA/7Db3IEEtaq2+IfqMfZY7rjubE5fzD+GryYuwhMlTcoc qmHjlSIjNPLsUibC+H8MDy3fQ5ezZMslufh6Lt4EXF5FM/L9jBY/kJJtqTJsh8Ynh2Oo EDHHGL5P5sz3tMzbermc5SLu52GVihBiImbsEL88M8rYVpye1zFu445r4AmlAttDRzJ8 OxO3yg3fuMsLhQ15JnyThLJfoo/j7TybHyaMaFDLVvjIHU5Rpj295VXHW26+9DUe8nRj 9sGFZrkt2eAF6vcTI695j1u6+kaYFD1GlGZq6mnhibdCC9ymtOjcEJNR4zbbFRnx+ixV VDqA== X-Gm-Message-State: AFqh2koHarjeDMtkTgEM+46hKQ2SfbkWqJFiD+fYari6HlyJYPG3I82T lPfK91b8i1HYxEW5r4TX7HMnCg== X-Google-Smtp-Source: AMrXdXvdqRpWYkx5fV5QmNteGDEyAGWOxNgAqXU1sQpZsIja/afYqaJkC/B6S7veK3AjzZdSNSurMQ== X-Received: by 2002:a17:906:5da8:b0:7b2:c227:126d with SMTP id n8-20020a1709065da800b007b2c227126dmr472951ejv.20.1673988269748; Tue, 17 Jan 2023 12:44:29 -0800 (PST) Received: from nuc.fritz.box (p200300f6af098f00245ad18781b5e181.dip0.t-ipconnect.de. [2003:f6:af09:8f00:245a:d187:81b5:e181]) by smtp.gmail.com with ESMTPSA id k2-20020a170906970200b0073dbaeb50f6sm13477051ejx.169.2023.01.17.12.44.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Jan 2023 12:44:29 -0800 (PST) From: Mathias Krause To: kvm@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Sean Christopherson , Paolo Bonzini , Mathias Krause Subject: [PATCH 1/3] KVM: x86/mmu: avoid indirect call for get_cr3 Date: Tue, 17 Jan 2023 21:45:54 +0100 Message-Id: <20230117204556.16217-2-minipli@grsecurity.net> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230117204556.16217-1-minipli@grsecurity.net> References: <20230117204556.16217-1-minipli@grsecurity.net> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Paolo Bonzini Most of the time, calls to get_guest_pgd result in calling kvm_read_cr3 (the exception is only nested TDP). Hardcode the default instead of using the get_cr3 function, avoiding a retpoline if they are enabled. Signed-off-by: Paolo Bonzini Signed-off-by: Mathias Krause --- arch/x86/kvm/mmu/mmu.c | 31 ++++++++++++++++++++----------- arch/x86/kvm/mmu/paging_tmpl.h | 2 +- 2 files changed, 21 insertions(+), 12 deletions(-) diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c index aeb240b339f5..505768631614 100644 --- a/arch/x86/kvm/mmu/mmu.c +++ b/arch/x86/kvm/mmu/mmu.c @@ -241,6 +241,20 @@ static struct kvm_mmu_role_regs vcpu_to_role_regs(stru= ct kvm_vcpu *vcpu) return regs; } =20 +static unsigned long get_guest_cr3(struct kvm_vcpu *vcpu) +{ + return kvm_read_cr3(vcpu); +} + +static inline unsigned long kvm_mmu_get_guest_pgd(struct kvm_vcpu *vcpu, + struct kvm_mmu *mmu) +{ + if (IS_ENABLED(CONFIG_RETPOLINE) && mmu->get_guest_pgd =3D=3D get_guest_c= r3) + return kvm_read_cr3(vcpu); + + return mmu->get_guest_pgd(vcpu); +} + static inline bool kvm_available_flush_tlb_with_range(void) { return kvm_x86_ops.tlb_remote_flush_with_range; @@ -3722,7 +3736,7 @@ static int mmu_alloc_shadow_roots(struct kvm_vcpu *vc= pu) int quadrant, i, r; hpa_t root; =20 - root_pgd =3D mmu->get_guest_pgd(vcpu); + root_pgd =3D kvm_mmu_get_guest_pgd(vcpu, mmu); root_gfn =3D root_pgd >> PAGE_SHIFT; =20 if (mmu_check_root(vcpu, root_gfn)) @@ -4172,7 +4186,7 @@ static bool kvm_arch_setup_async_pf(struct kvm_vcpu *= vcpu, gpa_t cr2_or_gpa, arch.token =3D alloc_apf_token(vcpu); arch.gfn =3D gfn; arch.direct_map =3D vcpu->arch.mmu->root_role.direct; - arch.cr3 =3D vcpu->arch.mmu->get_guest_pgd(vcpu); + arch.cr3 =3D kvm_mmu_get_guest_pgd(vcpu, vcpu->arch.mmu); =20 return kvm_setup_async_pf(vcpu, cr2_or_gpa, kvm_vcpu_gfn_to_hva(vcpu, gfn), &arch); @@ -4191,7 +4205,7 @@ void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,= struct kvm_async_pf *work) return; =20 if (!vcpu->arch.mmu->root_role.direct && - work->arch.cr3 !=3D vcpu->arch.mmu->get_guest_pgd(vcpu)) + work->arch.cr3 !=3D kvm_mmu_get_guest_pgd(vcpu, vcpu->arch.mmu)) return; =20 kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true); @@ -4592,11 +4606,6 @@ void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t ne= w_pgd) } EXPORT_SYMBOL_GPL(kvm_mmu_new_pgd); =20 -static unsigned long get_cr3(struct kvm_vcpu *vcpu) -{ - return kvm_read_cr3(vcpu); -} - static bool sync_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn, unsigned int access) { @@ -5147,7 +5156,7 @@ static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu, context->page_fault =3D kvm_tdp_page_fault; context->sync_page =3D nonpaging_sync_page; context->invlpg =3D NULL; - context->get_guest_pgd =3D get_cr3; + context->get_guest_pgd =3D get_guest_cr3; context->get_pdptr =3D kvm_pdptr_read; context->inject_page_fault =3D kvm_inject_page_fault; =20 @@ -5297,7 +5306,7 @@ static void init_kvm_softmmu(struct kvm_vcpu *vcpu, =20 kvm_init_shadow_mmu(vcpu, cpu_role); =20 - context->get_guest_pgd =3D get_cr3; + context->get_guest_pgd =3D get_guest_cr3; context->get_pdptr =3D kvm_pdptr_read; context->inject_page_fault =3D kvm_inject_page_fault; } @@ -5311,7 +5320,7 @@ static void init_kvm_nested_mmu(struct kvm_vcpu *vcpu, return; =20 g_context->cpu_role.as_u64 =3D new_mode.as_u64; - g_context->get_guest_pgd =3D get_cr3; + g_context->get_guest_pgd =3D get_guest_cr3; g_context->get_pdptr =3D kvm_pdptr_read; g_context->inject_page_fault =3D kvm_inject_page_fault; =20 diff --git a/arch/x86/kvm/mmu/paging_tmpl.h b/arch/x86/kvm/mmu/paging_tmpl.h index e5662dbd519c..78448fb84bd6 100644 --- a/arch/x86/kvm/mmu/paging_tmpl.h +++ b/arch/x86/kvm/mmu/paging_tmpl.h @@ -324,7 +324,7 @@ static int FNAME(walk_addr_generic)(struct guest_walker= *walker, trace_kvm_mmu_pagetable_walk(addr, access); retry_walk: walker->level =3D mmu->cpu_role.base.level; - pte =3D mmu->get_guest_pgd(vcpu); + pte =3D kvm_mmu_get_guest_pgd(vcpu, mmu); have_ad =3D PT_HAVE_ACCESSED_DIRTY(mmu); =20 #if PTTYPE =3D=3D 64 --=20 2.39.0 From nobody Sun Sep 14 22:29:23 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 331D4C3DA71 for ; Tue, 17 Jan 2023 22:02:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229894AbjAQWCc (ORCPT ); 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[2003:f6:af09:8f00:245a:d187:81b5:e181]) by smtp.gmail.com with ESMTPSA id k2-20020a170906970200b0073dbaeb50f6sm13477051ejx.169.2023.01.17.12.44.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Jan 2023 12:44:30 -0800 (PST) From: Mathias Krause To: kvm@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Sean Christopherson , Paolo Bonzini , Mathias Krause Subject: [PATCH 2/3] KVM: VMX: avoid retpoline call for control register caused exits Date: Tue, 17 Jan 2023 21:45:55 +0100 Message-Id: <20230117204556.16217-3-minipli@grsecurity.net> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230117204556.16217-1-minipli@grsecurity.net> References: <20230117204556.16217-1-minipli@grsecurity.net> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Complement commit 4289d2728664 ("KVM: retpolines: x86: eliminate retpoline from vmx.c exit handlers") and avoid a retpoline call for control register accesses as well. This speeds up guests that make heavy use of it, like grsecurity kernels toggling CR0.WP to implement kernel W^X. Signed-off-by: Mathias Krause --- SVM may gain from a similar change as well, however, I've no AMD box to test this on. arch/x86/kvm/vmx/vmx.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index c788aa382611..c8198c8a9b55 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -6538,6 +6538,8 @@ static int __vmx_handle_exit(struct kvm_vcpu *vcpu, f= astpath_t exit_fastpath) return handle_external_interrupt(vcpu); else if (exit_reason.basic =3D=3D EXIT_REASON_HLT) return kvm_emulate_halt(vcpu); + else if (exit_reason.basic =3D=3D EXIT_REASON_CR_ACCESS) + return handle_cr(vcpu); else if (exit_reason.basic =3D=3D EXIT_REASON_EPT_MISCONFIG) return handle_ept_misconfig(vcpu); #endif --=20 2.39.0 From nobody Sun Sep 14 22:29:23 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E66CEC3DA71 for ; Tue, 17 Jan 2023 22:10:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230105AbjAQWJ4 (ORCPT ); Tue, 17 Jan 2023 17:09:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50310 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230029AbjAQWIZ (ORCPT ); Tue, 17 Jan 2023 17:08:25 -0500 Received: from mail-ej1-x633.google.com (mail-ej1-x633.google.com [IPv6:2a00:1450:4864:20::633]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 982FA47EEE for ; Tue, 17 Jan 2023 12:44:33 -0800 (PST) Received: by mail-ej1-x633.google.com with SMTP id mg12so5930019ejc.5 for ; Tue, 17 Jan 2023 12:44:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=grsecurity.net; s=grsec; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=MOV3rwtP0iA8TQDDF9B/zFHDP5AzXHd8KRmKGtRz1nY=; b=tXpFGbRqaeGhZGVimlbcoV/9XnwdDGVH7hiIqREcmx64IUGAWAbGzUfS+Q2jzaESyM AFl3xbLPrb3Ey64qAv8+UAK5Pp7qbk6IwVqSB/KAqvTxa8MCtymrzccp5EA/NOHmJIam FZz+MXubbmE9cUQcbMwKoWjU8BlOjEdeLRZS0FVUmLrfI1mWYMiyHqscPmZxOuX8orBW ubbcfHBaySe3/L/ijowed8k/6SoVk0gXTFSR/kM8TbGH2iC+8Syt5JeU6fVAhIlOAaAF Rnnk0eKP5L1w8Niy0855lVZCCcJfiYV+SJIo1K5q0VaCpqmWwwSIf1bDJnQcnbJQGMmS x0ww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MOV3rwtP0iA8TQDDF9B/zFHDP5AzXHd8KRmKGtRz1nY=; b=NkyQEQav3SFYONlj4saYZzdmT0DkzDfvSGcatxr4Pw9T2H2WfbXD0Ne/RKNLn6T9pK c5MQsOCfYcLXfHGXw5cVglaXzxiAs0eyxZVH1oAIQL0YO1zYhee9a9huq6ZmIRC6g52L 9MMCyVD6rAMiAwcfv8zlIWdPLCDrAP7HN28CGRDRbphpTFYCS4rPfy51pOPWrEIfth3k 2xp1FlHwcC6xYJj9Z0bNFSbJesW4gxXsLR344Aw0dRLwVJuH2jS66a+MJq/RHJqSKYpv wAW9v4yoHSvFz+9/exZFPvw5nyDrAPXPsEPd500gMXvmqFrZWzG2hy2eFXAyGB/OwnSZ KIrg== X-Gm-Message-State: AFqh2krJHiSkGL0zZnNxIugrB13Dcb0z8GfkdviIcXVQ+2DZ4FfIP0QH Mz6Xj0uAzrICPwXKti86uCkSQg== X-Google-Smtp-Source: AMrXdXsY3mioBxxzF9rzO54UIsI4Wgpzvkeu6PzACp6IRoyPEm6qKAM/K9pSkMOzUsObYOSA6dMjZw== X-Received: by 2002:a17:907:8a07:b0:7c1:5ee1:4c57 with SMTP id sc7-20020a1709078a0700b007c15ee14c57mr5084938ejc.8.1673988272166; Tue, 17 Jan 2023 12:44:32 -0800 (PST) Received: from nuc.fritz.box (p200300f6af098f00245ad18781b5e181.dip0.t-ipconnect.de. [2003:f6:af09:8f00:245a:d187:81b5:e181]) by smtp.gmail.com with ESMTPSA id k2-20020a170906970200b0073dbaeb50f6sm13477051ejx.169.2023.01.17.12.44.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Jan 2023 12:44:31 -0800 (PST) From: Mathias Krause To: kvm@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Sean Christopherson , Paolo Bonzini , Mathias Krause Subject: [PATCH 3/3] KVM: x86: do not unload MMU roots when only toggling CR0.WP Date: Tue, 17 Jan 2023 21:45:56 +0100 Message-Id: <20230117204556.16217-4-minipli@grsecurity.net> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230117204556.16217-1-minipli@grsecurity.net> References: <20230117204556.16217-1-minipli@grsecurity.net> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" There is no need to unload the MMU roots when only CR0.WP has changed -- the paging structures are still valid, only the permission bitmap needs to be updated. Change kvm_mmu_reset_context() to get passed the need for unloading MMU roots and explicitly avoid it if only CR0.WP was toggled on a CR0 write caused VMEXIT. This change brings a huge performance gain as the following micro- benchmark running 'ssdd 10 50000' from rt-tests[1] on a grsecurity L1 VM shows (runtime in seconds, lower is better): legacy MMU TDP MMU kvm.git/queue 11.55s 13.91s kvm.git/queue+patch 7.44s 7.94s For legacy MMU this is ~35% faster, for TTP MMU ~43% faster. [1] https://git.kernel.org/pub/scm/utils/rt-tests/rt-tests.git Signed-off-by: Mathias Krause --- arch/x86/include/asm/kvm_host.h | 2 +- arch/x86/kvm/mmu/mmu.c | 7 ++++--- arch/x86/kvm/smm.c | 4 ++-- arch/x86/kvm/vmx/nested.c | 2 +- arch/x86/kvm/x86.c | 28 +++++++++++++++++++--------- 5 files changed, 27 insertions(+), 16 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_hos= t.h index 4d2bc08794e4..e7851315ffa6 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -1812,7 +1812,7 @@ int kvm_mmu_init_vm(struct kvm *kvm); void kvm_mmu_uninit_vm(struct kvm *kvm); =20 void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu); -void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); +void kvm_mmu_reset_context(struct kvm_vcpu *vcpu, bool unload_mmu); void kvm_mmu_slot_remove_write_access(struct kvm *kvm, const struct kvm_memory_slot *memslot, int start_level); diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c index 505768631614..4022394d3a25 100644 --- a/arch/x86/kvm/mmu/mmu.c +++ b/arch/x86/kvm/mmu/mmu.c @@ -5384,7 +5384,7 @@ void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu) vcpu->arch.root_mmu.cpu_role.ext.valid =3D 0; vcpu->arch.guest_mmu.cpu_role.ext.valid =3D 0; vcpu->arch.nested_mmu.cpu_role.ext.valid =3D 0; - kvm_mmu_reset_context(vcpu); + kvm_mmu_reset_context(vcpu, true); =20 /* * Changing guest CPUID after KVM_RUN is forbidden, see the comment in @@ -5393,9 +5393,10 @@ void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu) KVM_BUG_ON(vcpu->arch.last_vmentry_cpu !=3D -1, vcpu->kvm); } =20 -void kvm_mmu_reset_context(struct kvm_vcpu *vcpu) +void kvm_mmu_reset_context(struct kvm_vcpu *vcpu, bool unload_mmu) { - kvm_mmu_unload(vcpu); + if (unload_mmu) + kvm_mmu_unload(vcpu); kvm_init_mmu(vcpu); } EXPORT_SYMBOL_GPL(kvm_mmu_reset_context); diff --git a/arch/x86/kvm/smm.c b/arch/x86/kvm/smm.c index cc43638d48a3..09f47048eb1b 100644 --- a/arch/x86/kvm/smm.c +++ b/arch/x86/kvm/smm.c @@ -131,7 +131,7 @@ void kvm_smm_changed(struct kvm_vcpu *vcpu, bool enteri= ng_smm) vcpu->arch.pdptrs_from_userspace =3D false; } =20 - kvm_mmu_reset_context(vcpu); + kvm_mmu_reset_context(vcpu, true); } =20 void process_smi(struct kvm_vcpu *vcpu) @@ -369,7 +369,7 @@ void enter_smm(struct kvm_vcpu *vcpu) #endif =20 kvm_update_cpuid_runtime(vcpu); - kvm_mmu_reset_context(vcpu); + kvm_mmu_reset_context(vcpu, true); return; error: kvm_vm_dead(vcpu->kvm); diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c index 557b9c468734..14815fd6dcb1 100644 --- a/arch/x86/kvm/vmx/nested.c +++ b/arch/x86/kvm/vmx/nested.c @@ -4648,7 +4648,7 @@ static void nested_vmx_restore_host_state(struct kvm_= vcpu *vcpu) if (enable_ept && is_pae_paging(vcpu)) ept_save_pdptrs(vcpu); =20 - kvm_mmu_reset_context(vcpu); + kvm_mmu_reset_context(vcpu, true); =20 /* * This nasty bit of open coding is a compromise between blindly diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 508074e47bc0..d7c326ab94de 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -902,7 +902,9 @@ EXPORT_SYMBOL_GPL(load_pdptrs); =20 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsign= ed long cr0) { - if ((cr0 ^ old_cr0) & X86_CR0_PG) { + unsigned long cr0_change =3D cr0 ^ old_cr0; + + if (cr0_change & X86_CR0_PG) { kvm_clear_async_pf_completion_queue(vcpu); kvm_async_pf_hash_reset(vcpu); =20 @@ -914,10 +916,18 @@ void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned= long old_cr0, unsigned lon kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu); } =20 - if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS) - kvm_mmu_reset_context(vcpu); + if (cr0_change & KVM_MMU_CR0_ROLE_BITS) { + bool unload_mmu =3D + cr0_change & (KVM_MMU_CR0_ROLE_BITS & ~X86_CR0_WP); =20 - if (((cr0 ^ old_cr0) & X86_CR0_CD) && + /* + * Toggling just CR0.WP doesn't invalidate page tables per se, + * only the permission bits. + */ + kvm_mmu_reset_context(vcpu, unload_mmu); + } + + if ((cr0_change & X86_CR0_CD) && kvm_arch_has_noncoherent_dma(vcpu->kvm) && !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED)) kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL); @@ -1117,7 +1127,7 @@ static bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, u= nsigned long cr4) void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsign= ed long cr4) { if ((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS) - kvm_mmu_reset_context(vcpu); + kvm_mmu_reset_context(vcpu, true); =20 /* * If CR4.PCIDE is changed 0 -> 1, there is no need to flush the TLB @@ -1740,7 +1750,7 @@ static int set_efer(struct kvm_vcpu *vcpu, struct msr= _data *msr_info) } =20 if ((efer ^ old_efer) & KVM_MMU_EFER_ROLE_BITS) - kvm_mmu_reset_context(vcpu); + kvm_mmu_reset_context(vcpu, true); =20 return 0; } @@ -11410,7 +11420,7 @@ static int __set_sregs(struct kvm_vcpu *vcpu, struc= t kvm_sregs *sregs) return ret; =20 if (mmu_reset_needed) - kvm_mmu_reset_context(vcpu); + kvm_mmu_reset_context(vcpu, true); =20 max_bits =3D KVM_NR_INTERRUPTS; pending_vec =3D find_first_bit( @@ -11452,7 +11462,7 @@ static int __set_sregs2(struct kvm_vcpu *vcpu, stru= ct kvm_sregs2 *sregs2) vcpu->arch.pdptrs_from_userspace =3D true; } if (mmu_reset_needed) - kvm_mmu_reset_context(vcpu); + kvm_mmu_reset_context(vcpu, true); return 0; } =20 @@ -11970,7 +11980,7 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool ini= t_event) */ if (old_cr0 & X86_CR0_PG) { kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu); - kvm_mmu_reset_context(vcpu); + kvm_mmu_reset_context(vcpu, true); } =20 /* --=20 2.39.0