From nobody Mon Sep 15 03:55:31 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47108C46467 for ; Mon, 16 Jan 2023 18:06:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232547AbjAPSGG (ORCPT ); Mon, 16 Jan 2023 13:06:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47118 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232838AbjAPSFX (ORCPT ); Mon, 16 Jan 2023 13:05:23 -0500 Received: from mail-ej1-x62c.google.com (mail-ej1-x62c.google.com [IPv6:2a00:1450:4864:20::62c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F3F072E0EF for ; Mon, 16 Jan 2023 09:52:12 -0800 (PST) Received: by mail-ej1-x62c.google.com with SMTP id bk15so12328609ejb.9 for ; Mon, 16 Jan 2023 09:52:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jfErmyZAWFClEhl0ayKENaiIcOOkglWFws7K0nbLI8s=; b=CiZDRrup74sgUxRVU6m1gLeEbwHwbulx2ngc8VyZ9sGs5XEKXQbDgMycQM7zOa3nBU TxmnS1YBlX44zfqBABDkM4kQBhkFaKjSNGH0XDKCt0ob4HEhX0IS/+yi6DT10yJkk32T Oauww02NGbHbMvSiZpCcZsbGRMP1ICMU1VlKc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jfErmyZAWFClEhl0ayKENaiIcOOkglWFws7K0nbLI8s=; b=ToqDPZ8BtUWE/GY6zQAwLDj1zRh4BGhANJSzYj5wXHRhVF2YNDnqHkg2MmFNRKXV57 r2qsFoqv5m/KxV9ZvX02NMcTsX4634HWAfMyuqllC76L/yYmgl5XmoxonX6wJweQ/v80 0nCtbcBxT6maUoIDuj5CfibyFDEUKvRhNGZo2x/A04w7ImU6gB1Mh7/qcWxZv7l3OXn4 RPkPW8Lld5mMu03BnjQrp9EsQg8AeZQ3uGzHVkJxEc+zm0NmBpYJ6sI+6WZkAf16bojq Ovz1cERtbhjT/O7jKX6xtc6k2/PU/HJkbm8psz6nFfB/WIv+H/tEHSA33n+S7T/47EcQ Lyww== X-Gm-Message-State: AFqh2ko95ODnq0p8gdCOsOTab37pYsOxlrEouU4wT9dTU0tNnL2YcYE7 KloqBPOBDUHChWwvpy8spsMyt854Lv6mSjdf X-Google-Smtp-Source: AMrXdXvdC7qxR/+ZPsAJ4YfSSBzNByhVR25GX6cvTzrlWTZzZJOOu7qLFg1I78xQoouF74gkllv2pQ== X-Received: by 2002:a17:906:1dcd:b0:84c:c121:dc53 with SMTP id v13-20020a1709061dcd00b0084cc121dc53mr46331606ejh.34.1673891531473; Mon, 16 Jan 2023 09:52:11 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.. (mob-5-90-75-145.net.vodafone.it. [5.90.75.145]) by smtp.gmail.com with ESMTPSA id fd7-20020a056402388700b00483dd234ac6sm11490723edb.96.2023.01.16.09.52.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Jan 2023 09:52:11 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Vincent Mailhol , Amarula patchwork , Krzysztof Kozlowski , michael@amarulasolutions.com, Rob Herring , Alexandre Torgue , Marc Kleine-Budde , Dario Binacchi , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v7 4/5] ARM: dts: stm32: add pin map for CAN controller on stm32f4 Date: Mon, 16 Jan 2023 18:51:51 +0100 Message-Id: <20230116175152.2839455-5-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230116175152.2839455-1-dario.binacchi@amarulasolutions.com> References: <20230116175152.2839455-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add pin configurations for using CAN controller on stm32f469-disco board. They are located on the Arduino compatible connector CN5 (CAN1) and on the extension connector CN12 (CAN2). Signed-off-by: Dario Binacchi --- (no changes since v3) Changes in v3: - Remove 'Dario Binacchi ' SOB. - Remove a blank line. Changes in v2: - Remove a blank line. arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 30 ++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi b/arch/arm/boot/dts/stm= 32f4-pinctrl.dtsi index 500bcc302d42..8a4d51f97248 100644 --- a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi @@ -448,6 +448,36 @@ pins2 { slew-rate =3D <2>; }; }; + + can1_pins_a: can1-0 { + pins1 { + pinmux =3D ; /* CAN1_TX */ + }; + pins2 { + pinmux =3D ; /* CAN1_RX */ + bias-pull-up; + }; + }; + + can2_pins_a: can2-0 { + pins1 { + pinmux =3D ; /* CAN2_TX */ + }; + pins2 { + pinmux =3D ; /* CAN2_RX */ + bias-pull-up; + }; + }; + + can2_pins_b: can2-1 { + pins1 { + pinmux =3D ; /* CAN2_TX */ + }; + pins2 { + pinmux =3D ; /* CAN2_RX */ + bias-pull-up; + }; + }; }; }; }; --=20 2.32.0