From nobody Mon Sep 15 05:50:35 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D3E5C54EBE for ; Mon, 16 Jan 2023 10:04:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229827AbjAPKE1 (ORCPT ); Mon, 16 Jan 2023 05:04:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51244 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229590AbjAPKER (ORCPT ); Mon, 16 Jan 2023 05:04:17 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 526B817CE6; Mon, 16 Jan 2023 02:04:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1673863456; x=1705399456; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=XRRLzzOXeevXebWQAE/XcwmvSXhfQ30Z0QGr+p2NfNk=; b=O4I37HOiEPC0MZ03tGo5k3YA6dsyJPndsoflo+4dhn57ozPcWDr3hG8z pAr8h3NDTZRSMpPVZrTtWe22dXJ2GVQafNFDywvTnzKdoqmBaRa7ze5gR h3IgTeRADCK6YA6/G/bzn3misiIbMGb00Kp0FLi5nLJ2j1Jo+9MgxOXwM //6d46NCOtW1NNs6rPB4lbQ9JYpi4nU2/SNn6uLzzEOicJ6TelJdxANfN XuKlo7S5EN6L+NzdJgODSYLM4EDOLNvcVGwPB4oxjwNdex9XmgK13rjZg QSoYQii57CGnRsLFS/8JKoOk+eJhYRWEDJ/BcQxBQwF/ZaFShhgg550ru g==; X-IronPort-AV: E=Sophos;i="5.97,220,1669100400"; d="scan'208";a="196807029" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 16 Jan 2023 03:04:15 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Mon, 16 Jan 2023 03:04:15 -0700 Received: from che-lt-i67786lx.microchip.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Mon, 16 Jan 2023 03:04:11 -0700 From: Rakesh Sankaranarayanan To: , CC: , , , , , , , , , , , Subject: [PATCH net 1/2] net: dsa: microchip: ksz9477: port map correction in ALU table entry register Date: Mon, 16 Jan 2023 15:34:59 +0530 Message-ID: <20230116100500.614444-2-rakesh.sankaranarayanan@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230116100500.614444-1-rakesh.sankaranarayanan@microchip.com> References: <20230116100500.614444-1-rakesh.sankaranarayanan@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" ALU table entry 2 register in KSZ9477 have bit positions reserved for forwarding port map. This field is referred in ksz9477_fdb_del() for clearing forward port map and alu table. But current fdb_del refer ALU table entry 3 register for accessing forward port map. Update ksz9477_fdb_del() to get forward port map from correct alu table entry register. With this bug, issue can be observed while deleting static MAC entries. Delete any specific MAC entry using "bridge fdb del" command. This should clear all the specified MAC entries. But it is observed that entries with self static alone are retained. Tested on LAN9370 EVB since ksz9477_fdb_del() is used common across LAN937x and KSZ series. Fixes: b987e98e50ab ("dsa: add DSA switch driver for Microchip KSZ9477") Signed-off-by: Rakesh Sankaranarayanan Reviewed-by: Vladimir Oltean --- drivers/net/dsa/microchip/ksz9477.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz9477.c b/drivers/net/dsa/microchi= p/ksz9477.c index 47b54ecf2c6f..6178a96e389f 100644 --- a/drivers/net/dsa/microchip/ksz9477.c +++ b/drivers/net/dsa/microchip/ksz9477.c @@ -540,10 +540,10 @@ int ksz9477_fdb_del(struct ksz_device *dev, int port, ksz_read32(dev, REG_SW_ALU_VAL_D, &alu_table[3]); =20 /* clear forwarding port */ - alu_table[2] &=3D ~BIT(port); + alu_table[1] &=3D ~BIT(port); =20 /* if there is no port to forward, clear table */ - if ((alu_table[2] & ALU_V_PORT_MAP) =3D=3D 0) { + if ((alu_table[1] & ALU_V_PORT_MAP) =3D=3D 0) { alu_table[0] =3D 0; alu_table[1] =3D 0; alu_table[2] =3D 0; --=20 2.34.1 From nobody Mon Sep 15 05:50:35 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82CECC46467 for ; Mon, 16 Jan 2023 10:04:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229852AbjAPKEm (ORCPT ); Mon, 16 Jan 2023 05:04:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51398 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229590AbjAPKEd (ORCPT ); Mon, 16 Jan 2023 05:04:33 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2F264193D0; Mon, 16 Jan 2023 02:04:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1673863464; x=1705399464; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=sTsxJqX2e2ybi62OwFJhMFA7w+2USmVJlU5/icGHZIQ=; b=hbSmm/XRHUUGsqxW/uJoyYZveKtb5oNR5Y7A+fyphEsTfi2VxkSryqA4 /OedHjItW2YkhpiijAQSUz+WcNQACP7t6baD9J7LJl6vBnEPNiIHWv7uI PkHMoHZZ1VbI5C2M12r2G5v797kocuNqR09yFITBroM8Pe/J4KPfycpjq bLOQZzRUUKWd/gojGPhpAmMvVLBFSQGfuNJy+RLHiCId5rdEdwspMe4Yq /TsKGRHmZDrU35IQbaH2dQbOmmMZzsdJiv+BrekudhfTPqSH1YvAGyK/A GVzAG/p6xc9ffvbQ3S0IUw8SEpEZhuDrXshVuVwOae0H//ER+CZbNgTv+ w==; X-IronPort-AV: E=Sophos;i="5.97,220,1669100400"; d="scan'208";a="132508148" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 16 Jan 2023 03:04:23 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Mon, 16 Jan 2023 03:04:21 -0700 Received: from che-lt-i67786lx.microchip.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Mon, 16 Jan 2023 03:04:16 -0700 From: Rakesh Sankaranarayanan To: , CC: , , , , , , , , , , , Subject: [PATCH net 2/2] net: dsa: microchip: lan937x: run phy initialization during each link update Date: Mon, 16 Jan 2023 15:35:00 +0530 Message-ID: <20230116100500.614444-3-rakesh.sankaranarayanan@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230116100500.614444-1-rakesh.sankaranarayanan@microchip.com> References: <20230116100500.614444-1-rakesh.sankaranarayanan@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" PHY initialization is supposed to run on every mode changes. "lan87xx_config_aneg()" verifies every mode change using "phy_modify_changed()" function. Earlier code had phy_modify_changed() followed by genphy_soft_reset. But soft_reset resets all the pre-configured register values to default state, and lost all the initialization done. With this reason gen_phy_reset was removed. But it need to go through init sequence each time the mode changed. Update lan97xx_config_aneg() to invoke phy_init once successful mode update is detected. PHY init sequence added in lan87xx_phy_init() have slave init commands executed every time. Update the init sequence to run slave init only if phydev is in slave mode. Test setup contains LAN9370 EVB connected to SAMA5D3 (Running DSA), and issue can be reproduced by connecting link to any of the available ports after SAMA5D3 boot-up. With this issue, port will fail to update link state. But once the SAMA5D3 is reset with LAN9370 link in connected state itself, on boot-up link state will be reported as UP. But Again after some time, if link is moved to DOWN state, it will not get reported. Fixes: b2cd2cde7d69 ("net: phy: LAN87xx: remove genphy_softreset in config_= aneg") Signed-off-by: Rakesh Sankaranarayanan --- drivers/net/phy/microchip_t1.c | 70 +++++++++++++++++++++++++++------- 1 file changed, 56 insertions(+), 14 deletions(-) diff --git a/drivers/net/phy/microchip_t1.c b/drivers/net/phy/microchip_t1.c index 8569a545e0a3..78618c8cb6bf 100644 --- a/drivers/net/phy/microchip_t1.c +++ b/drivers/net/phy/microchip_t1.c @@ -245,15 +245,42 @@ static int lan87xx_config_rgmii_delay(struct phy_devi= ce *phydev) PHYACC_ATTR_BANK_MISC, LAN87XX_CTRL_1, rc); } =20 +static int lan87xx_phy_init_cmd(struct phy_device *phydev, + const struct access_ereg_val *cmd_seq, int cnt) +{ + int ret, i; + + for (i =3D 0; i < cnt; i++) { + if (cmd_seq[i].mode =3D=3D PHYACC_ATTR_MODE_POLL && + cmd_seq[i].bank =3D=3D PHYACC_ATTR_BANK_SMI) { + ret =3D access_smi_poll_timeout(phydev, + cmd_seq[i].offset, + cmd_seq[i].val, + cmd_seq[i].mask); + } else { + ret =3D access_ereg(phydev, cmd_seq[i].mode, + cmd_seq[i].bank, cmd_seq[i].offset, + cmd_seq[i].val); + } + if (ret < 0) + return ret; + } + + return ret; +} + static int lan87xx_phy_init(struct phy_device *phydev) { - static const struct access_ereg_val init[] =3D { + static const struct access_ereg_val hw_init[] =3D { /* TXPD/TXAMP6 Configs */ { PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_AFE, T1_AFE_PORT_CFG1_REG, 0x002D, 0 }, /* HW_Init Hi and Force_ED */ { PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_SMI, T1_POWER_DOWN_CONTROL_REG, 0x0308, 0 }, + }; + + static const struct access_ereg_val slave_init[] =3D { /* Equalizer Full Duplex Freeze - T1 Slave */ { PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_DSP, T1_EQ_FD_STG1_FRZ_CFG, 0x0002, 0 }, @@ -267,6 +294,9 @@ static int lan87xx_phy_init(struct phy_device *phydev) T1_EQ_WT_FD_LCK_FRZ_CFG, 0x0002, 0 }, { PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_DSP, T1_PST_EQ_LCK_STG1_FRZ_CFG, 0x0002, 0 }, + }; + + static const struct access_ereg_val phy_init[] =3D { /* Slave Full Duplex Multi Configs */ { PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_DSP, T1_SLV_FD_MULT_CFG_REG, 0x0D53, 0 }, @@ -397,7 +427,7 @@ static int lan87xx_phy_init(struct phy_device *phydev) { PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_SMI, T1_POWER_DOWN_CONTROL_REG, 0x0300, 0 }, }; - int rc, i; + int rc; =20 /* phy Soft reset */ rc =3D genphy_soft_reset(phydev); @@ -405,21 +435,28 @@ static int lan87xx_phy_init(struct phy_device *phydev) return rc; =20 /* PHY Initialization */ - for (i =3D 0; i < ARRAY_SIZE(init); i++) { - if (init[i].mode =3D=3D PHYACC_ATTR_MODE_POLL && - init[i].bank =3D=3D PHYACC_ATTR_BANK_SMI) { - rc =3D access_smi_poll_timeout(phydev, - init[i].offset, - init[i].val, - init[i].mask); - } else { - rc =3D access_ereg(phydev, init[i].mode, init[i].bank, - init[i].offset, init[i].val); - } + rc =3D lan87xx_phy_init_cmd(phydev, hw_init, ARRAY_SIZE(hw_init)); + if (rc < 0) + return rc; + + rc =3D genphy_read_master_slave(phydev); + if (rc) + return rc; + + /* Following squence need to run only if phydev is in + * slave mode. + */ + if (phydev->master_slave_state =3D=3D MASTER_SLAVE_STATE_SLAVE) { + rc =3D lan87xx_phy_init_cmd(phydev, slave_init, + ARRAY_SIZE(slave_init)); if (rc < 0) return rc; } =20 + rc =3D lan87xx_phy_init_cmd(phydev, phy_init, ARRAY_SIZE(phy_init)); + if (rc < 0) + return rc; + return lan87xx_config_rgmii_delay(phydev); } =20 @@ -775,6 +812,7 @@ static int lan87xx_read_status(struct phy_device *phyde= v) static int lan87xx_config_aneg(struct phy_device *phydev) { u16 ctl =3D 0; + int ret; =20 switch (phydev->master_slave_set) { case MASTER_SLAVE_CFG_MASTER_FORCE: @@ -790,7 +828,11 @@ static int lan87xx_config_aneg(struct phy_device *phyd= ev) return -EOPNOTSUPP; } =20 - return phy_modify_changed(phydev, MII_CTRL1000, CTL1000_AS_MASTER, ctl); + ret =3D phy_modify_changed(phydev, MII_CTRL1000, CTL1000_AS_MASTER, ctl); + if (ret =3D=3D 1) + return phy_init_hw(phydev); + + return ret; } =20 static int lan87xx_get_sqi(struct phy_device *phydev) --=20 2.34.1