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[79.51.7.163]) by smtp.googlemail.com with ESMTPSA id h10-20020a05600c2caa00b003cfd58409desm37246783wmc.13.2023.01.15.08.10.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Jan 2023 08:10:21 -0800 (PST) From: Pierluigi Passaro X-Google-Original-From: Pierluigi Passaro To: andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Cc: eran.m@variscite.com, nate.d@variscite.com, francesco.f@variscite.com, pierluigi.p@variscite.com Subject: [PATCH] net: mdio: force deassert MDIO reset signal Date: Sun, 15 Jan 2023 17:10:06 +0100 Message-Id: <20230115161006.16431-1-pierluigi.p@variscite.com> X-Mailer: git-send-email 2.37.2 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" When the reset gpio is defined within the node of the device tree describing the PHY, the reset is initialized and managed only after calling the fwnode_mdiobus_phy_device_register function. However, before calling it, the MDIO communication is checked by the get_phy_device function. When this happen and the reset GPIO was somehow previously set down, the get_phy_device function fails, preventing the PHY detection. These changes force the deassert of the MDIO reset signal before checking the MDIO channel. The PHY may require a minimum deassert time before being responsive: use a reasonable sleep time after forcing the deassert of the MDIO reset signal. Once done, free the gpio descriptor to allow managing it later. Signed-off-by: Pierluigi Passaro Signed-off-by: FrancescoFerraro --- drivers/net/mdio/fwnode_mdio.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/net/mdio/fwnode_mdio.c b/drivers/net/mdio/fwnode_mdio.c index b782c35c4ac1..1f4b8c4c1f60 100644 --- a/drivers/net/mdio/fwnode_mdio.c +++ b/drivers/net/mdio/fwnode_mdio.c @@ -8,6 +8,8 @@ =20 #include #include +#include +#include #include #include #include @@ -118,6 +120,8 @@ int fwnode_mdiobus_register_phy(struct mii_bus *bus, bool is_c45 =3D false; u32 phy_id; int rc; + int reset_deassert_delay =3D 0; + struct gpio_desc *reset_gpio; =20 psec =3D fwnode_find_pse_control(child); if (IS_ERR(psec)) @@ -134,10 +138,31 @@ int fwnode_mdiobus_register_phy(struct mii_bus *bus, if (rc >=3D 0) is_c45 =3D true; =20 + reset_gpio =3D fwnode_gpiod_get_index(child, "reset", 0, GPIOD_OUT_LOW, "= PHY reset"); + if (reset_gpio =3D=3D ERR_PTR(-EPROBE_DEFER)) { + dev_dbg(&bus->dev, "reset signal for PHY@%u not ready\n", addr); + return -EPROBE_DEFER; + } else if (IS_ERR(reset_gpio)) { + if (reset_gpio =3D=3D ERR_PTR(-ENOENT)) + dev_dbg(&bus->dev, "reset signal for PHY@%u not defined\n", addr); + else + dev_dbg(&bus->dev, "failed to request reset for PHY@%u, error %ld\n", a= ddr, PTR_ERR(reset_gpio)); + reset_gpio =3D NULL; + } else { + dev_dbg(&bus->dev, "deassert reset signal for PHY@%u\n", addr); + fwnode_property_read_u32(child, "reset-deassert-us", + &reset_deassert_delay); + if (reset_deassert_delay) + fsleep(reset_deassert_delay); + } + if (is_c45 || fwnode_get_phy_id(child, &phy_id)) phy =3D get_phy_device(bus, addr, is_c45); else phy =3D phy_device_create(bus, addr, phy_id, 0, NULL); + + gpiochip_free_own_desc(reset_gpio); + if (IS_ERR(phy)) { rc =3D PTR_ERR(phy); goto clean_mii_ts; --=20 2.37.2