From nobody Sat Sep 21 06:35:54 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40350C54EBD for ; Fri, 13 Jan 2023 11:14:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241012AbjAMLOm (ORCPT ); Fri, 13 Jan 2023 06:14:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34166 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241070AbjAMLMj (ORCPT ); Fri, 13 Jan 2023 06:12:39 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D8DC7482B2; Fri, 13 Jan 2023 03:07:23 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 6A4176602DCF; Fri, 13 Jan 2023 11:07:21 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1673608042; bh=4mx6XyM8hGwLA7n3qCWYGercLU2KgOzCsmr207lR5WM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UtbxkOHKXZHpaTMs5zU55ksQ+TtinRUSiL9bPJ02p3AywAdvIEBHjaOFyfpWAElYk O+7USfbOpEO5rJEod+x8cBH8bX3SxURByoRKJXmmdLLXjgmc1HZKSCwgCg+twhfYfk +vtthbeFG0mu5/TWvnwU8b/71KhMVp1jxuA1Ir0FxippokKbSnyvT8pdLjcePFIZB2 pTI4FqWyEluM6aMTnC1RYsOArebn3bC6EEGRc8+/c7ufvOQgDWMil+SFUWgRsyPkW3 nQqRvZHa7d50DeRk58aeRq9nRcN0d+8SKnMj5mPK9DO4NRMLMP+3kC9G1tRFz5wCeq O/YQejl6HVCDA== From: AngeloGioacchino Del Regno To: mturquette@baylibre.com Cc: sboyd@kernel.org, matthias.bgg@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, wenst@chromium.org, johnson.wang@mediatek.com, miles.chen@mediatek.com, fparent@baylibre.com, chun-jie.chen@mediatek.com, sam.shih@mediatek.com, y.oudjana@protonmail.com, nfraprado@collabora.com, rex-bc.chen@mediatek.com, ryder.lee@kernel.org, daniel@makrotopia.org, jose.exposito89@gmail.com, yangyingliang@huawei.com, pablo.sun@mediatek.com, msp@baylibre.com, weiyi.lu@mediatek.com, ikjn@chromium.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, kernel@collabora.com Subject: [PATCH v3 15/23] clk: mediatek: mt8192: Join top_adj_divs and top_muxes Date: Fri, 13 Jan 2023 12:06:08 +0100 Message-Id: <20230113110616.111001-16-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230113110616.111001-1-angelogioacchino.delregno@collabora.com> References: <20230113110616.111001-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" These two are both mtk_composite arrays, one dependent on another, but that's something that the clock framework is supposed to sort out and anyway registering them separately isn't going to ease the framework's job in checking dependencies. Put the contents of top_adj_divs in top_muxes to join them together and register them in one shot. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- drivers/clk/mediatek/clk-mt8192.c | 16 +++------------- 1 file changed, 3 insertions(+), 13 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt8192.c b/drivers/clk/mediatek/clk-m= t8192.c index d012a229274e..1ffff53bbe90 100644 --- a/drivers/clk/mediatek/clk-mt8192.c +++ b/drivers/clk/mediatek/clk-mt8192.c @@ -698,9 +698,7 @@ static struct mtk_composite top_muxes[] =3D { MUX(CLK_TOP_APLL_I2S7_M_SEL, "apll_i2s7_m_sel", apll_i2s_m_parents, 0x320= , 23, 1), MUX(CLK_TOP_APLL_I2S8_M_SEL, "apll_i2s8_m_sel", apll_i2s_m_parents, 0x320= , 24, 1), MUX(CLK_TOP_APLL_I2S9_M_SEL, "apll_i2s9_m_sel", apll_i2s_m_parents, 0x320= , 25, 1), -}; - -static const struct mtk_composite top_adj_divs[] =3D { + /* APLL_DIV */ DIV_GATE(CLK_TOP_APLL12_DIV0, "apll12_div0", "apll_i2s0_m_sel", 0x320, 0,= 0x328, 8, 0), DIV_GATE(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll_i2s1_m_sel", 0x320, 1,= 0x328, 8, 8), DIV_GATE(CLK_TOP_APLL12_DIV2, "apll12_div2", "apll_i2s2_m_sel", 0x320, 2,= 0x328, 8, 16), @@ -1079,7 +1077,7 @@ static int clk_mt8192_top_probe(struct platform_devic= e *pdev) =20 top_clk_data =3D mtk_alloc_clk_data(CLK_TOP_NR_CLK); if (!top_clk_data) - return; + return -ENOMEM; =20 r =3D mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_cl= ks), top_clk_data); if (r) @@ -1101,16 +1099,10 @@ static int clk_mt8192_top_probe(struct platform_dev= ice *pdev) if (r) goto unregister_muxes; =20 - r =3D mtk_clk_register_composites(&pdev->dev, top_adj_divs, - ARRAY_SIZE(top_adj_divs), base, - &mt8192_clk_lock, top_clk_data); - if (r) - goto unregister_top_composites; - r =3D mtk_clk_register_gates(&pdev->dev, node, top_clks, ARRAY_SIZE(top_clks), top_clk_data); if (r) - goto unregister_adj_divs_composites; + goto unregister_top_composites; =20 r =3D clk_mt8192_reg_mfg_mux_notifier(&pdev->dev, top_clk_data->hws[CLK_TOP_MFG_PLL_SEL]->clk); @@ -1125,8 +1117,6 @@ static int clk_mt8192_top_probe(struct platform_devic= e *pdev) =20 unregister_gates: mtk_clk_unregister_gates(top_clks, ARRAY_SIZE(top_clks), top_clk_data); -unregister_adj_divs_composites: - mtk_clk_unregister_composites(top_adj_divs, ARRAY_SIZE(top_adj_divs), top= _clk_data); unregister_top_composites: mtk_clk_unregister_composites(top_muxes, ARRAY_SIZE(top_muxes), top_clk_d= ata); unregister_muxes: --=20 2.39.0