From nobody Mon Sep 15 11:15:23 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CAF40C61DB3 for ; Thu, 12 Jan 2023 11:53:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234757AbjALLxT (ORCPT ); Thu, 12 Jan 2023 06:53:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60274 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233780AbjALLwl (ORCPT ); Thu, 12 Jan 2023 06:52:41 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1E3271C921 for ; Thu, 12 Jan 2023 03:42:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1673523751; x=1705059751; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=kbR/Rr1hHSRdYw6eJSne8aqgPO3vKuwNYF/xGLJgTqA=; b=WoDh9Fu/CCO9KUc4pNMMTWDIxbyhsow6jic1/0Lhz05jU+CjDdWcKCh6 eQwXl1e58s1EI9FmnF53HJ8Y3ZKj/UiXOqBmCUyDzp11yqmWfvDzcHjnZ XQ92g8lw8zfLdd6ODy+3qqLRWwfD/efTuRUPhgehzjlvjzCcElBPBepa6 bo5otPnAg1BJmW0ycfUZL2IsZrFghtlSkRds39BhmdzlaO1FE9xqrmzkY vJBn3a2tG9xOslnCP5S5n6Sr6+tqvzegjJ5o0CpUL4yGGcAKJkyik8IO9 p8JWi4eAEdhC/XIRbqAMFDdqgNdt3NrZYcaq2vKws/BcKI+IN5vctjzo+ Q==; X-IronPort-AV: E=Sophos;i="5.97,319,1669100400"; d="scan'208";a="131994640" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 12 Jan 2023 04:42:29 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Thu, 12 Jan 2023 04:42:29 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Thu, 12 Jan 2023 04:42:27 -0700 From: Claudiu Beznea To: , CC: , Claudiu Beznea Subject: [PATCH 1/3] clocksource/drivers/timer-microchip-pit64b: move COMPILE_TEST on type definition Date: Thu, 12 Jan 2023 13:42:10 +0200 Message-ID: <20230112114212.1161136-2-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230112114212.1161136-1-claudiu.beznea@microchip.com> References: <20230112114212.1161136-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Move COMPILE_TEST to menu type definition. This, along with commit f611af4c3bfa ("ARM: at91: Kconfig: implement PIT64B selection") and the next one in this series allows simply for driver to compile only on ARM based platforms which allows further implementing delay timer on top of PIT64B. Signed-off-by: Claudiu Beznea --- drivers/clocksource/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 4469e7f555e9..0e87d478a2fa 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -705,8 +705,8 @@ config INGENIC_OST Support for the Operating System Timer of the Ingenic JZ SoCs. =20 config MICROCHIP_PIT64B - bool "Microchip PIT64B support" - depends on OF || COMPILE_TEST + bool "Microchip PIT64B support" if COMPILE_TEST + depends on OF select TIMER_OF help This option enables Microchip PIT64B timer for Atmel --=20 2.34.1 From nobody Mon Sep 15 11:15:23 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B9C2BC54EBC for ; Thu, 12 Jan 2023 11:53:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236530AbjALLxb (ORCPT ); Thu, 12 Jan 2023 06:53:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60276 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234036AbjALLwm (ORCPT ); Thu, 12 Jan 2023 06:52:42 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1ACFD5F4BA for ; Thu, 12 Jan 2023 03:42:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1673523754; x=1705059754; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nobcDiLUT9+yL7uqUczxO6o6KxX+J0prL7igRy1oq3I=; b=ZsbymbgfBt9Wz24RES0x7E1yUZ5l+93p5ro59TwzsqqWkYp5r2EKTh6I aSvKcVwYxmF2LzEQX+T7IGWrMQLi/y7n5rR21mrYkpgBJ+iVwWmNW61M0 YXXfPXMy9QXggG/Libd/ybvmfG3L+RgUTBTO2ozvsLwKP+u83ftGGS68N e3MMe2mfmhDF8adItOab/bdbpO4qX+ThvVR67WxxFxVExHjHWbGdQlJr2 FSvs4pffDexiIe3FlOfCLBY582ldKU8R2hhX+S31br+SpDTai6J6B7EnS 0THexxXraZ8Fcv30w2yW+HQbW/nFGeDqJxfKZQJHtXif7JCt/FR2ARCCw A==; X-IronPort-AV: E=Sophos;i="5.97,319,1669100400"; d="scan'208";a="191905709" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 12 Jan 2023 04:42:33 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Thu, 12 Jan 2023 04:42:31 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Thu, 12 Jan 2023 04:42:29 -0700 From: Claudiu Beznea To: , CC: , Claudiu Beznea Subject: [PATCH 2/3] clocksource/drivers/timer-microchip-pit64b: select driver only on ARM Date: Thu, 12 Jan 2023 13:42:11 +0200 Message-ID: <20230112114212.1161136-3-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230112114212.1161136-1-claudiu.beznea@microchip.com> References: <20230112114212.1161136-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Microchip PIT64B is currently available on ARM based devices. Thus select it only for ARM. This allows implementing delay timer. Signed-off-by: Claudiu Beznea --- drivers/clocksource/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 0e87d478a2fa..d47825e72dc2 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -706,7 +706,7 @@ config INGENIC_OST =20 config MICROCHIP_PIT64B bool "Microchip PIT64B support" if COMPILE_TEST - depends on OF + depends on OF && ARM select TIMER_OF help This option enables Microchip PIT64B timer for Atmel --=20 2.34.1 From nobody Mon Sep 15 11:15:23 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B8E2C54EBD for ; Thu, 12 Jan 2023 11:53:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236838AbjALLxg (ORCPT ); Thu, 12 Jan 2023 06:53:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60282 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230150AbjALLwm (ORCPT ); Thu, 12 Jan 2023 06:52:42 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 366B71D0FF for ; Thu, 12 Jan 2023 03:42:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1673523756; x=1705059756; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=z5KTL4EaTIbo9QWWW/1WpQc0bvQTdKHy2Kuwm2BBH5Q=; b=2fC4DMGMEHNuG63/jfCL4zxEUFKC4RO54xWCmzwVin+vcSrnMU8NnFmG RglurIC+EEUC8qyJuT1b8ytFr4ZL6PcgQUHrf1xaNeydxgMTBOENNebSe SA0+gr/RUpM7i9pLUPGRjJlFOoR7AA3uyMtzWL91nQ5UI1WbOj+fOCZDr q9uwf8eIyOeEVhNU3vsX9Zd3Qb6SMyfKnpNUYZPQt6UEys/VRDlanQa1t BdHGU22K86g+NDGlOrwbMsNbFRD/CGUaI3PPw3hUnsrGoSreF8fB3Sasa 15IfWGV7Gf0VAdjIhRD7tZMsymcduHQyCpMC7TxximkpNCtWbd68v1pOo g==; X-IronPort-AV: E=Sophos;i="5.97,319,1669100400"; d="scan'208";a="191905716" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 12 Jan 2023 04:42:34 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Thu, 12 Jan 2023 04:42:33 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Thu, 12 Jan 2023 04:42:31 -0700 From: Claudiu Beznea To: , CC: , Claudiu Beznea Subject: [PATCH 3/3] clocksource/drivers/timer-microchip-pit64b: add delay timer Date: Thu, 12 Jan 2023 13:42:12 +0200 Message-ID: <20230112114212.1161136-4-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230112114212.1161136-1-claudiu.beznea@microchip.com> References: <20230112114212.1161136-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add delay timer. Signed-off-by: Claudiu Beznea --- drivers/clocksource/timer-microchip-pit64b.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/clocksource/timer-microchip-pit64b.c b/drivers/clockso= urce/timer-microchip-pit64b.c index d5f1436f33d9..57209bb38c70 100644 --- a/drivers/clocksource/timer-microchip-pit64b.c +++ b/drivers/clocksource/timer-microchip-pit64b.c @@ -9,6 +9,7 @@ =20 #include #include +#include #include #include #include @@ -92,6 +93,8 @@ struct mchp_pit64b_clksrc { static void __iomem *mchp_pit64b_cs_base; /* Default cycles for clockevent timer. */ static u64 mchp_pit64b_ce_cycles; +/* Delay timer. */ +static struct delay_timer mchp_pit64b_dt; =20 static inline u64 mchp_pit64b_cnt_read(void __iomem *base) { @@ -169,6 +172,11 @@ static u64 notrace mchp_pit64b_sched_read_clk(void) return mchp_pit64b_cnt_read(mchp_pit64b_cs_base); } =20 +static unsigned long notrace mchp_pit64b_dt_read(void) +{ + return mchp_pit64b_cnt_read(mchp_pit64b_cs_base); +} + static int mchp_pit64b_clkevt_shutdown(struct clock_event_device *cedev) { struct mchp_pit64b_timer *timer =3D clkevt_to_mchp_pit64b_timer(cedev); @@ -376,6 +384,10 @@ static int __init mchp_pit64b_init_clksrc(struct mchp_= pit64b_timer *timer, =20 sched_clock_register(mchp_pit64b_sched_read_clk, 64, clk_rate); =20 + mchp_pit64b_dt.read_current_timer =3D mchp_pit64b_dt_read; + mchp_pit64b_dt.freq =3D clk_rate; + register_current_timer_delay(&mchp_pit64b_dt); + return 0; } =20 --=20 2.34.1